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a2c5833233
The result of running etc/update-copyright.py --this-year, fixing all the files whose mode is changed by the script, plus a build with --enable-maintainer-mode --enable-cgen-maint=yes, then checking out */po/*.pot which we don't update frequently. The copy of cgen was with commit d1dd5fcc38ead reverted as that commit breaks building of bfp opcodes files.
202 lines
6.8 KiB
Plaintext
202 lines
6.8 KiB
Plaintext
@c Copyright (C) 2002-2022 Free Software Foundation, Inc.
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@c Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
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@c This is part of the GAS manual.
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@c For copying conditions, see the file as.texinfo.
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@ifset GENERIC
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@page
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@node IA-64-Dependent
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@chapter IA-64 Dependent Features
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@end ifset
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@ifclear GENERIC
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@node Machine Dependencies
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@chapter IA-64 Dependent Features
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@end ifclear
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@cindex IA-64 support
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@menu
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* IA-64 Options:: Options
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* IA-64 Syntax:: Syntax
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@c * IA-64 Floating Point:: Floating Point // to be written
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@c * IA-64 Directives:: IA-64 Machine Directives // to be written
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* IA-64 Opcodes:: Opcodes
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@end menu
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@node IA-64 Options
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@section Options
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@cindex IA-64 options
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@cindex options for IA-64
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@table @option
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@cindex @code{-mconstant-gp} command-line option, IA-64
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@item -mconstant-gp
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This option instructs the assembler to mark the resulting object file
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as using the ``constant GP'' model. With this model, it is assumed
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that the entire program uses a single global pointer (GP) value. Note
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that this option does not in any fashion affect the machine code
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emitted by the assembler. All it does is turn on the EF_IA_64_CONS_GP
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flag in the ELF file header.
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@item -mauto-pic
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This option instructs the assembler to mark the resulting object file
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as using the ``constant GP without function descriptor'' data model.
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This model is like the ``constant GP'' model, except that it
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additionally does away with function descriptors. What this means is
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that the address of a function refers directly to the function's code
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entry-point. Normally, such an address would refer to a function
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descriptor, which contains both the code entry-point and the GP-value
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needed by the function. Note that this option does not in any fashion
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affect the machine code emitted by the assembler. All it does is
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turn on the EF_IA_64_NOFUNCDESC_CONS_GP flag in the ELF file header.
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@item -milp32
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@itemx -milp64
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@itemx -mlp64
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@itemx -mp64
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These options select the data model. The assembler defaults to @code{-mlp64}
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(LP64 data model).
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@item -mle
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@itemx -mbe
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These options select the byte order. The @code{-mle} option selects little-endian
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byte order (default) and @code{-mbe} selects big-endian byte order. Note that
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IA-64 machine code always uses little-endian byte order.
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@item -mtune=itanium1
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@itemx -mtune=itanium2
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Tune for a particular IA-64 CPU, @var{itanium1} or @var{itanium2}. The
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default is @var{itanium2}.
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@item -munwind-check=warning
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@itemx -munwind-check=error
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These options control what the assembler will do when performing
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consistency checks on unwind directives. @code{-munwind-check=warning}
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will make the assembler issue a warning when an unwind directive check
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fails. This is the default. @code{-munwind-check=error} will make the
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assembler issue an error when an unwind directive check fails.
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@item -mhint.b=ok
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@itemx -mhint.b=warning
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@itemx -mhint.b=error
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These options control what the assembler will do when the @samp{hint.b}
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instruction is used. @code{-mhint.b=ok} will make the assembler accept
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@samp{hint.b}. @code{-mint.b=warning} will make the assembler issue a
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warning when @samp{hint.b} is used. @code{-mhint.b=error} will make
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the assembler treat @samp{hint.b} as an error, which is the default.
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@item -x
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@itemx -xexplicit
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These options turn on dependency violation checking.
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@item -xauto
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This option instructs the assembler to automatically insert stop bits where necessary
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to remove dependency violations. This is the default mode.
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@item -xnone
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This option turns off dependency violation checking.
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@item -xdebug
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This turns on debug output intended to help tracking down bugs in the dependency
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violation checker.
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@item -xdebugn
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This is a shortcut for -xnone -xdebug.
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@item -xdebugx
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This is a shortcut for -xexplicit -xdebug.
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@end table
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@cindex IA-64 Syntax
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@node IA-64 Syntax
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@section Syntax
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The assembler syntax closely follows the IA-64 Assembly Language
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Reference Guide.
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@menu
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* IA-64-Chars:: Special Characters
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* IA-64-Regs:: Register Names
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* IA-64-Bits:: Bit Names
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* IA-64-Relocs:: Relocations
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@end menu
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@node IA-64-Chars
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@subsection Special Characters
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@cindex line comment character, IA-64
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@cindex IA-64 line comment character
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@samp{//} is the line comment token.
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@cindex line separator, IA-64
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@cindex statement separator, IA-64
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@cindex IA-64 line separator
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@samp{;} can be used instead of a newline to separate statements.
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@node IA-64-Regs
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@subsection Register Names
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@cindex IA-64 registers
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@cindex register names, IA-64
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The 128 integer registers are referred to as @samp{r@var{n}}.
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The 128 floating-point registers are referred to as @samp{f@var{n}}.
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The 128 application registers are referred to as @samp{ar@var{n}}.
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The 128 control registers are referred to as @samp{cr@var{n}}.
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The 64 one-bit predicate registers are referred to as @samp{p@var{n}}.
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The 8 branch registers are referred to as @samp{b@var{n}}.
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In addition, the assembler defines a number of aliases:
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@samp{gp} (@samp{r1}), @samp{sp} (@samp{r12}), @samp{rp} (@samp{b0}),
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@samp{ret0} (@samp{r8}), @samp{ret1} (@samp{r9}), @samp{ret2} (@samp{r10}),
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@samp{ret3} (@samp{r9}), @samp{farg@var{n}} (@samp{f8+@var{n}}), and
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@samp{fret@var{n}} (@samp{f8+@var{n}}).
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For convenience, the assembler also defines aliases for all named application
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and control registers. For example, @samp{ar.bsp} refers to the register
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backing store pointer (@samp{ar17}). Similarly, @samp{cr.eoi} refers to
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the end-of-interrupt register (@samp{cr67}).
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@node IA-64-Bits
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@subsection IA-64 Processor-Status-Register (PSR) Bit Names
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@cindex IA-64 Processor-status-Register bit names
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@cindex PSR bits
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@cindex bit names, IA-64
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The assembler defines bit masks for each of the bits in the IA-64
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processor status register. For example, @samp{psr.ic} corresponds to
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a value of 0x2000. These masks are primarily intended for use with
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the @samp{ssm}/@samp{sum} and @samp{rsm}/@samp{rum}
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instructions, but they can be used anywhere else where an integer
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constant is expected.
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@node IA-64-Relocs
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@subsection Relocations
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@cindex IA-64 relocations
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In addition to the standard IA-64 relocations, the following relocations are
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implemented by @code{@value{AS}}:
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@table @code
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@item @@slotcount(@var{V})
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Convert the address offset @var{V} into a slot count. This pseudo
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function is available only on VMS. The expression @var{V} must be
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known at assembly time: it can't reference undefined symbols or symbols in
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different sections.
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@end table
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@node IA-64 Opcodes
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@section Opcodes
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For detailed information on the IA-64 machine instruction set, see the
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@c Attempt to work around a very overfull hbox.
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@iftex
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IA-64 Assembly Language Reference Guide available at
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@smallfonts
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@example
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http://developer.intel.com/design/itanium/arch_spec.htm
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@end example
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@textfonts
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@end iftex
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@ifnottex
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@uref{http://developer.intel.com/design/itanium/arch_spec.htm,IA-64 Architecture Handbook}.
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@end ifnottex
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