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Peter Bergner 0a24685343 PowerPC: Create new MMA instruction masks and use them
The MMA instructions use XX3_MASK|3<<21 as an instruction mask, but that
misses the RC bit/bit 31, so if we disassemble a .long that represents an
MMA instruction except that it also has bit 31 set, we will erroneously
disassemble it to that MMA instruction.  We create new masks defines that
contain bit 31 so that doesn't happen anymore.

opcodes/
	* ppc-opc.c (XACC_MASK, XX3ACC_MASK): New defines.
	(P_GER_MASK, xxmfacc, xxmtacc, xxsetaccz, xvi8ger4pp, xvi8ger4,
	xvf16ger2pp, xvf16ger2, xvf32gerpp, xvf32ger, xvi4ger8pp, xvi4ger8,
	xvi16ger2spp, xvi16ger2s, xvbf16ger2pp, xvbf16ger2, xvf64gerpp,
	xvf64ger, xvi16ger2, xvf16ger2np, xvf32gernp, xvi8ger4spp, xvi16ger2pp,
	xvbf16ger2np, xvf64gernp, xvf16ger2pn, xvf32gerpn, xvbf16ger2pn,
	xvf64gerpn, xvf16ger2nn, xvf32gernn, xvbf16ger2nn, xvf64gernn: Use them.
2022-07-21 14:53:52 -05:00
bfd i386: Don't allow GOTOFF relocation against IFUNC symbol for PIC 2022-07-21 11:40:27 -07:00
binutils PR29390, DW_CFA_AARCH64_negate_ra_state vs. DW_CFA_GNU_window_save 2022-07-21 16:37:06 +09:30
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opcodes PowerPC: Create new MMA instruction masks and use them 2022-07-21 14:53:52 -05:00
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configure [gdb/build] Fix build breaker with --enable-shared 2022-06-27 15:36:19 +02:00
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