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On RELA targets the addend can affect JALX target's alignment, so only verify it once the whole relocation calculation has completed. bfd/ * elfxx-mips.c (mips_elf_calculate_relocation) <R_MIPS16_26> <R_MIPS_26, R_MICROMIPS_26_S1>: Include the addend in JALX's target alignment verification. ld/ * testsuite/ld-mips-elf/unaligned-jalx-addend-0.d: New test. * testsuite/ld-mips-elf/unaligned-jalx-addend-1.d: New test. * testsuite/ld-mips-elf/unaligned-jalx-addend-mips16-0.d: New test. * testsuite/ld-mips-elf/unaligned-jalx-addend-mips16-1.d: New test. * testsuite/ld-mips-elf/unaligned-jalx-addend-micromips-0.d: New test. * testsuite/ld-mips-elf/unaligned-jalx-addend-micromips-1.d: New test. * testsuite/ld-mips-elf/unaligned-jalx-addend-0.s: New test source. * testsuite/ld-mips-elf/unaligned-jalx-addend-1.s: New test source. * testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
23 lines
317 B
ArmAsm
23 lines
317 B
ArmAsm
.text
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.align 4
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.globl foo
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.ent foo
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foo:
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jal bar0 + 1
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jal bar0 + 2
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jal bar0 + 3
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jal bar1 + 1
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jal bar1 + 3
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jal bar1 + 4
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jal bar2 - 1
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jal bar2 - 2
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jal bar2 - 3
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jal bar3 - 1
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jal bar3 - 3
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jal bar3 - 4
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.end foo
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# Force some (non-delay-slot) zero bytes, to make 'objdump' print ...
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.align 4, 0
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.space 16
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