binutils-gdb/ld/testsuite/ld-powerpc/relaxr.d
Alan Modra ed6b7ef4bc * ld-powerpc/powerpc.exp: Modify emulation option passed to ld
when little-endian.
	* ld-powerpc/apuinfo-nul.rd: Update for le output.
	* ld-powerpc/apuinfo.rd: Likewise.
	* ld-powerpc/plt1.d: Likewise.
	* ld-powerpc/relax.d: Likewise.
	* ld-powerpc/relaxr.d: Likewise.
	* ld-powerpc/sdadyn.d: Likewise.
	* ld-powerpc/tls.d: Likewise.
	* ld-powerpc/tls.g: Likewise.
	* ld-powerpc/tls.t: Likewise.
	* ld-powerpc/tls32.d: Likewise.
	* ld-powerpc/tls32.g: Likewise.
	* ld-powerpc/tls32.t: Likewise.
	* ld-powerpc/tlsexe.d: Likewise.
	* ld-powerpc/tlsexe.g: Likewise.
	* ld-powerpc/tlsexe.r: Likewise.
	* ld-powerpc/tlsexe.t: Likewise.
	* ld-powerpc/tlsexe32.d: Likewise.
	* ld-powerpc/tlsexe32.g: Likewise.
	* ld-powerpc/tlsexe32.r: Likewise.
	* ld-powerpc/tlsexe32.t: Likewise.
	* ld-powerpc/tlsexetoc.d: Likewise.
	* ld-powerpc/tlsexetoc.g: Likewise.
	* ld-powerpc/tlsexetoc.r: Likewise.
	* ld-powerpc/tlsexetoc.t: Likewise.
	* ld-powerpc/tlsmark.d: Likewise.
	* ld-powerpc/tlsmark32.d: Likewise.
	* ld-powerpc/tlsopt1.d: Likewise.
	* ld-powerpc/tlsopt1_32.d: Likewise.
	* ld-powerpc/tlsopt2.d: Likewise.
	* ld-powerpc/tlsopt2_32.d: Likewise.
	* ld-powerpc/tlsopt3.d: Likewise.
	* ld-powerpc/tlsopt3_32.d: Likewise.
	* ld-powerpc/tlsopt4.d: Likewise.
	* ld-powerpc/tlsopt4_32.d: Likewise.
	* ld-powerpc/tlsso.d: Likewise.
	* ld-powerpc/tlsso.g: Likewise.
	* ld-powerpc/tlsso.r: Likewise.
	* ld-powerpc/tlsso.t: Likewise.
	* ld-powerpc/tlsso32.d: Likewise.
	* ld-powerpc/tlsso32.g: Likewise.
	* ld-powerpc/tlsso32.r: Likewise.
	* ld-powerpc/tlsso32.t: Likewise.
	* ld-powerpc/tlstoc.d: Likewise.
	* ld-powerpc/tlstoc.g: Likewise.
	* ld-powerpc/tlstoc.t: Likewise.
	* ld-powerpc/tlstocso.d: Likewise.
	* ld-powerpc/tlstocso.g: Likewise.
	* ld-powerpc/tlstocso.t: Likewise.
	* ld-powerpc/tocopt.out: Likewise.
2012-10-29 09:25:53 +00:00

27 lines
934 B
Makefile

.*: file format .*
Disassembly of section .text:
00000000 <_start>:
0: (48 00 00 15|15 00 00 48) bl 14 <_start\+0x14>
4: (48 00 00 21|21 00 00 48) bl 24 <_start\+0x24>
8: (48 00 00 0d|0d 00 00 48) bl 14 <_start\+0x14>
8: R_PPC_NONE \*ABS\*
c: (48 00 00 19|19 00 00 48) bl 24 <_start\+0x24>
c: R_PPC_NONE \*ABS\*
10: (48 00 00 00|00 00 00 48) b 10 <_start\+0x10>
10: R_PPC_REL24 _start
14: (3d 80 00 00|00 00 80 3d) lis r12,0
1(6|4): R_PPC_ADDR16_HA near
18: (39 8c 00 00|00 00 8c 39) addi r12,r12,0
1(a|8): R_PPC_ADDR16_LO near
1c: (7d 89 03 a6|a6 03 89 7d) mtctr r12
20: (4e 80 04 20|20 04 80 4e) bctr
24: (3d 80 00 00|00 00 80 3d) lis r12,0
2(6|4): R_PPC_ADDR16_HA far
28: (39 8c 00 00|00 00 8c 39) addi r12,r12,0
2(a|8): R_PPC_ADDR16_LO far
2c: (7d 89 03 a6|a6 03 89 7d) mtctr r12
30: (4e 80 04 20|20 04 80 4e) bctr