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b11dcf4e7f
* cgen-asm.in (@arch@_cgen_assemble_insn): CGEN_INSN_RELAX renamed to CGEN_INSN_RELAXED. * fr30-asm.c,fr30-desc.c,fr30-desc.h: Regenerate. * frv-asm.c,frv-desc.c,frv-desc.h: Regenerate. * ip2k-asm.c,ip2k-desc.c,ip2k-desc.h: Regenerate. * iq2000-asm.c,iq2000-desc.c,iq2000-desc.h: Regenerate. * m32r-asm.c,m32r-desc.c,m32r-desc.h,m32r-opc.c: Regenerate. * openrisc-asm.c,openrisc-desc.c,openrisc-desc.h: Regenerate. * xstormy16-asm.c,xstormy16-desc.c,xstormy16-desc.h: Regenerate. gas: * cgen.c (gas_cgen_finish_insn): CGEN_INSN_RELAX renamed to CGEN_INSN_RELAXED. * config/tc-fr30.c (md_estimate_size_before_relax): Ditto. * config/tc-m32r.c (md_estimate_size_before_relax): Ditto. * config/tc-openrisc.c (md_estimate_size_before_relax): Ditto.
641 lines
17 KiB
C
641 lines
17 KiB
C
/* tc-fr30.c -- Assembler for the Fujitsu FR30.
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Copyright 1998, 1999, 2000, 2001, 2002, 2003
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Free Software Foundation, Inc.
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This file is part of GAS, the GNU Assembler.
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GAS is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2, or (at your option)
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any later version.
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GAS is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with GAS; see the file COPYING. If not, write to
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the Free Software Foundation, 59 Temple Place - Suite 330,
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Boston, MA 02111-1307, USA. */
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#include <stdio.h>
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#include "as.h"
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#include "safe-ctype.h"
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#include "subsegs.h"
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#include "symcat.h"
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#include "opcodes/fr30-desc.h"
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#include "opcodes/fr30-opc.h"
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#include "cgen.h"
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/* Structure to hold all of the different components describing
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an individual instruction. */
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typedef struct
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{
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const CGEN_INSN * insn;
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const CGEN_INSN * orig_insn;
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CGEN_FIELDS fields;
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#if CGEN_INT_INSN_P
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CGEN_INSN_INT buffer [1];
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#define INSN_VALUE(buf) (*(buf))
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#else
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unsigned char buffer [CGEN_MAX_INSN_SIZE];
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#define INSN_VALUE(buf) (buf)
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#endif
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char * addr;
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fragS * frag;
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int num_fixups;
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fixS * fixups [GAS_CGEN_MAX_FIXUPS];
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int indices [MAX_OPERAND_INSTANCES];
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}
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fr30_insn;
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const char comment_chars[] = ";";
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const char line_comment_chars[] = "#";
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const char line_separator_chars[] = "|";
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const char EXP_CHARS[] = "eE";
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const char FLT_CHARS[] = "dD";
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#define FR30_SHORTOPTS ""
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const char * md_shortopts = FR30_SHORTOPTS;
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struct option md_longopts[] =
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{
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{NULL, no_argument, NULL, 0}
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};
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size_t md_longopts_size = sizeof (md_longopts);
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int
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md_parse_option (c, arg)
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int c ATTRIBUTE_UNUSED;
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char *arg ATTRIBUTE_UNUSED;
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{
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switch (c)
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{
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default:
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return 0;
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}
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return 1;
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}
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void
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md_show_usage (stream)
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FILE * stream;
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{
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fprintf (stream, _(" FR30 specific command line options:\n"));
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}
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/* The target specific pseudo-ops which we support. */
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const pseudo_typeS md_pseudo_table[] =
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{
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{ "word", cons, 4 },
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{ NULL, NULL, 0 }
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};
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void
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md_begin ()
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{
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/* Initialize the `cgen' interface. */
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/* Set the machine number and endian. */
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gas_cgen_cpu_desc = fr30_cgen_cpu_open (CGEN_CPU_OPEN_MACHS, 0,
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CGEN_CPU_OPEN_ENDIAN,
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CGEN_ENDIAN_BIG,
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CGEN_CPU_OPEN_END);
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fr30_cgen_init_asm (gas_cgen_cpu_desc);
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/* This is a callback from cgen to gas to parse operands. */
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cgen_set_parse_operand_fn (gas_cgen_cpu_desc, gas_cgen_parse_operand);
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}
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void
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md_assemble (str)
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char *str;
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{
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static int last_insn_had_delay_slot = 0;
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fr30_insn insn;
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char *errmsg;
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/* Initialize GAS's cgen interface for a new instruction. */
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gas_cgen_init_parse ();
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insn.insn = fr30_cgen_assemble_insn
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(gas_cgen_cpu_desc, str, & insn.fields, insn.buffer, & errmsg);
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if (!insn.insn)
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{
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as_bad (errmsg);
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return;
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}
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/* Doesn't really matter what we pass for RELAX_P here. */
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gas_cgen_finish_insn (insn.insn, insn.buffer,
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CGEN_FIELDS_BITSIZE (& insn.fields), 1, NULL);
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/* Warn about invalid insns in delay slots. */
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if (last_insn_had_delay_slot
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&& CGEN_INSN_ATTR_VALUE (insn.insn, CGEN_INSN_NOT_IN_DELAY_SLOT))
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as_warn (_("Instruction %s not allowed in a delay slot."),
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CGEN_INSN_NAME (insn.insn));
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last_insn_had_delay_slot
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= CGEN_INSN_ATTR_VALUE (insn.insn, CGEN_INSN_DELAY_SLOT);
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}
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/* The syntax in the manual says constants begin with '#'.
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We just ignore it. */
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void
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md_operand (expressionP)
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expressionS * expressionP;
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{
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if (* input_line_pointer == '#')
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{
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input_line_pointer ++;
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expression (expressionP);
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}
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}
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valueT
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md_section_align (segment, size)
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segT segment;
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valueT size;
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{
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int align = bfd_get_section_alignment (stdoutput, segment);
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return ((size + (1 << align) - 1) & (-1 << align));
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}
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symbolS *
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md_undefined_symbol (name)
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char *name ATTRIBUTE_UNUSED;
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{
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return 0;
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}
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/* Interface to relax_segment. */
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/* FIXME: Build table by hand, get it working, then machine generate. */
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const relax_typeS md_relax_table[] =
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{
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/* The fields are:
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1) most positive reach of this state,
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2) most negative reach of this state,
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3) how many bytes this mode will add to the size of the current frag
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4) which index into the table to try if we can't fit into this one. */
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/* The first entry must be unused because an `rlx_more' value of zero ends
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each list. */
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{1, 1, 0, 0},
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/* The displacement used by GAS is from the end of the 2 byte insn,
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so we subtract 2 from the following. */
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/* 16 bit insn, 8 bit disp -> 10 bit range.
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This doesn't handle a branch in the right slot at the border:
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the "& -4" isn't taken into account. It's not important enough to
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complicate things over it, so we subtract an extra 2 (or + 2 in -ve
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case). */
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{511 - 2 - 2, -512 - 2 + 2, 0, 2 },
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/* 32 bit insn, 24 bit disp -> 26 bit range. */
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{0x2000000 - 1 - 2, -0x2000000 - 2, 2, 0 },
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/* Same thing, but with leading nop for alignment. */
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{0x2000000 - 1 - 2, -0x2000000 - 2, 4, 0 }
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};
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#if 0
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long
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fr30_relax_frag (segment, fragP, stretch)
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segT segment;
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fragS * fragP;
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long stretch;
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{
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/* Address of branch insn. */
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long address = fragP->fr_address + fragP->fr_fix - 2;
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long growth = 0;
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/* Keep 32 bit insns aligned on 32 bit boundaries. */
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if (fragP->fr_subtype == 2)
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{
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if ((address & 3) != 0)
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{
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fragP->fr_subtype = 3;
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growth = 2;
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}
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}
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else if (fragP->fr_subtype == 3)
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{
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if ((address & 3) == 0)
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{
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fragP->fr_subtype = 2;
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growth = -2;
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}
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}
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else
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{
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growth = relax_frag (segment, fragP, stretch);
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/* Long jump on odd halfword boundary? */
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if (fragP->fr_subtype == 2 && (address & 3) != 0)
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{
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fragP->fr_subtype = 3;
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growth += 2;
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}
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}
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return growth;
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}
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#endif
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/* Return an initial guess of the length by which a fragment must grow to
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hold a branch to reach its destination.
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Also updates fr_type/fr_subtype as necessary.
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Called just before doing relaxation.
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Any symbol that is now undefined will not become defined.
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The guess for fr_var is ACTUALLY the growth beyond fr_fix.
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Whatever we do to grow fr_fix or fr_var contributes to our returned value.
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Although it may not be explicit in the frag, pretend fr_var starts with a
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0 value. */
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int
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md_estimate_size_before_relax (fragP, segment)
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fragS * fragP;
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segT segment;
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{
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/* The only thing we have to handle here are symbols outside of the
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current segment. They may be undefined or in a different segment in
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which case linker scripts may place them anywhere.
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However, we can't finish the fragment here and emit the reloc as insn
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alignment requirements may move the insn about. */
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if (S_GET_SEGMENT (fragP->fr_symbol) != segment)
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{
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#if 0
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int old_fr_fix = fragP->fr_fix;
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#endif
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/* The symbol is undefined in this segment.
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Change the relaxation subtype to the max allowable and leave
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all further handling to md_convert_frag. */
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fragP->fr_subtype = 2;
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#if 0 /* Can't use this, but leave in for illustration. */
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/* Change 16 bit insn to 32 bit insn. */
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fragP->fr_opcode[0] |= 0x80;
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/* Increase known (fixed) size of fragment. */
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fragP->fr_fix += 2;
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/* Create a relocation for it. */
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fix_new (fragP, old_fr_fix, 4,
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fragP->fr_symbol,
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fragP->fr_offset, 1 /* pcrel */,
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/* FIXME: Can't use a real BFD reloc here.
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gas_cgen_md_apply_fix3 can't handle it. */
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BFD_RELOC_FR30_26_PCREL);
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/* Mark this fragment as finished. */
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frag_wane (fragP);
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return fragP->fr_fix - old_fr_fix;
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#else
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{
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const CGEN_INSN * insn;
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int i;
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/* Update the recorded insn.
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Fortunately we don't have to look very far.
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FIXME: Change this to record in the instruction the next higher
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relaxable insn to use. */
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for (i = 0, insn = fragP->fr_cgen.insn; i < 4; i++, insn++)
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{
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if ((strcmp (CGEN_INSN_MNEMONIC (insn),
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CGEN_INSN_MNEMONIC (fragP->fr_cgen.insn))
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== 0)
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&& CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAXED))
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break;
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}
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if (i == 4)
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abort ();
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fragP->fr_cgen.insn = insn;
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return 2;
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}
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#endif
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}
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/* Return the size of the variable part of the frag. */
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return md_relax_table[fragP->fr_subtype].rlx_length;
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}
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/* *fragP has been relaxed to its final size, and now needs to have
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the bytes inside it modified to conform to the new size.
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Called after relaxation is finished.
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fragP->fr_type == rs_machine_dependent.
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fragP->fr_subtype is the subtype of what the address relaxed to. */
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void
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md_convert_frag (abfd, sec, fragP)
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bfd *abfd ATTRIBUTE_UNUSED;
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segT sec ATTRIBUTE_UNUSED;
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fragS *fragP ATTRIBUTE_UNUSED;
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{
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#if 0
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char * opcode;
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char * displacement;
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int target_address;
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int opcode_address;
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int extension;
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int addend;
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opcode = fragP->fr_opcode;
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/* Address opcode resides at in file space. */
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opcode_address = fragP->fr_address + fragP->fr_fix - 2;
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switch (fragP->fr_subtype)
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{
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case 1 :
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extension = 0;
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displacement = & opcode[1];
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break;
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case 2 :
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opcode[0] |= 0x80;
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extension = 2;
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displacement = & opcode[1];
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break;
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case 3 :
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opcode[2] = opcode[0] | 0x80;
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md_number_to_chars (opcode, PAR_NOP_INSN, 2);
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opcode_address += 2;
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extension = 4;
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displacement = & opcode[3];
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break;
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default :
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abort ();
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}
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if (S_GET_SEGMENT (fragP->fr_symbol) != sec)
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{
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/* symbol must be resolved by linker */
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if (fragP->fr_offset & 3)
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as_warn (_("Addend to unresolved symbol not on word boundary."));
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addend = fragP->fr_offset >> 2;
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}
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else
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{
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/* Address we want to reach in file space. */
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target_address = S_GET_VALUE (fragP->fr_symbol) + fragP->fr_offset;
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addend = (target_address - (opcode_address & -4)) >> 2;
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}
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/* Create a relocation for symbols that must be resolved by the linker.
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Otherwise output the completed insn. */
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if (S_GET_SEGMENT (fragP->fr_symbol) != sec)
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{
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assert (fragP->fr_subtype != 1);
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assert (fragP->fr_cgen.insn != 0);
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gas_cgen_record_fixup (fragP,
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/* Offset of branch insn in frag. */
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fragP->fr_fix + extension - 4,
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fragP->fr_cgen.insn,
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4 /*length*/,
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/* FIXME: quick hack */
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#if 0
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CGEN_OPERAND_ENTRY (fragP->fr_cgen.opindex),
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#else
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CGEN_OPERAND_ENTRY (FR30_OPERAND_DISP24),
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#endif
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fragP->fr_cgen.opinfo,
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fragP->fr_symbol, fragP->fr_offset);
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}
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#define SIZE_FROM_RELAX_STATE(n) ((n) == 1 ? 1 : 3)
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md_number_to_chars (displacement, (valueT) addend,
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SIZE_FROM_RELAX_STATE (fragP->fr_subtype));
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fragP->fr_fix += extension;
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#endif
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}
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/* Functions concerning relocs. */
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/* The location from which a PC relative jump should be calculated,
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given a PC relative reloc. */
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long
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md_pcrel_from_section (fixP, sec)
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fixS * fixP;
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segT sec;
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{
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if (fixP->fx_addsy != (symbolS *) NULL
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&& (! S_IS_DEFINED (fixP->fx_addsy)
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|| S_GET_SEGMENT (fixP->fx_addsy) != sec))
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{
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/* The symbol is undefined (or is defined but not in this section).
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Let the linker figure it out. */
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return 0;
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}
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return (fixP->fx_frag->fr_address + fixP->fx_where) & ~1;
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}
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/* Return the bfd reloc type for OPERAND of INSN at fixup FIXP.
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Returns BFD_RELOC_NONE if no reloc type can be found.
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*FIXP may be modified if desired. */
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bfd_reloc_code_real_type
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md_cgen_lookup_reloc (insn, operand, fixP)
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const CGEN_INSN *insn ATTRIBUTE_UNUSED;
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const CGEN_OPERAND *operand;
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fixS *fixP;
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{
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switch (operand->type)
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{
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case FR30_OPERAND_LABEL9: fixP->fx_pcrel = 1; return BFD_RELOC_FR30_9_PCREL;
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case FR30_OPERAND_LABEL12: fixP->fx_pcrel = 1; return BFD_RELOC_FR30_12_PCREL;
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case FR30_OPERAND_DISP10: return BFD_RELOC_FR30_10_IN_8;
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case FR30_OPERAND_DISP9: return BFD_RELOC_FR30_9_IN_8;
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case FR30_OPERAND_DISP8: return BFD_RELOC_FR30_8_IN_8;
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case FR30_OPERAND_UDISP6: return BFD_RELOC_FR30_6_IN_4;
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case FR30_OPERAND_I8: return BFD_RELOC_8;
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case FR30_OPERAND_I32: return BFD_RELOC_FR30_48;
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case FR30_OPERAND_I20: return BFD_RELOC_FR30_20;
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default : /* avoid -Wall warning */
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break;
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}
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return BFD_RELOC_NONE;
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}
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/* Write a value out to the object file, using the appropriate endianness. */
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void
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md_number_to_chars (buf, val, n)
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char * buf;
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valueT val;
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int n;
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{
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number_to_chars_bigendian (buf, val, n);
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}
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/* Turn a string in input_line_pointer into a floating point constant of type
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type, and store the appropriate bytes in *litP. The number of LITTLENUMS
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emitted is stored in *sizeP . An error message is returned, or NULL on OK.
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*/
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/* Equal to MAX_PRECISION in atof-ieee.c */
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#define MAX_LITTLENUMS 6
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char *
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md_atof (type, litP, sizeP)
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char type;
|
||
char * litP;
|
||
int * sizeP;
|
||
{
|
||
int i;
|
||
int prec;
|
||
LITTLENUM_TYPE words [MAX_LITTLENUMS];
|
||
char * t;
|
||
|
||
switch (type)
|
||
{
|
||
case 'f':
|
||
case 'F':
|
||
case 's':
|
||
case 'S':
|
||
prec = 2;
|
||
break;
|
||
|
||
case 'd':
|
||
case 'D':
|
||
case 'r':
|
||
case 'R':
|
||
prec = 4;
|
||
break;
|
||
|
||
/* FIXME: Some targets allow other format chars for bigger sizes here. */
|
||
|
||
default:
|
||
* sizeP = 0;
|
||
return _("Bad call to md_atof()");
|
||
}
|
||
|
||
t = atof_ieee (input_line_pointer, type, words);
|
||
if (t)
|
||
input_line_pointer = t;
|
||
* sizeP = prec * sizeof (LITTLENUM_TYPE);
|
||
|
||
for (i = 0; i < prec; i++)
|
||
{
|
||
md_number_to_chars (litP, (valueT) words[i],
|
||
sizeof (LITTLENUM_TYPE));
|
||
litP += sizeof (LITTLENUM_TYPE);
|
||
}
|
||
|
||
return 0;
|
||
}
|
||
|
||
/* Worker function for fr30_is_colon_insn(). */
|
||
static char restore_colon PARAMS ((int));
|
||
|
||
static char
|
||
restore_colon (advance_i_l_p_by)
|
||
int advance_i_l_p_by;
|
||
{
|
||
char c;
|
||
|
||
/* Restore the colon, and advance input_line_pointer to
|
||
the end of the new symbol. */
|
||
* input_line_pointer = ':';
|
||
input_line_pointer += advance_i_l_p_by;
|
||
c = * input_line_pointer;
|
||
* input_line_pointer = 0;
|
||
|
||
return c;
|
||
}
|
||
|
||
/* Determines if the symbol starting at START and ending in
|
||
a colon that was at the location pointed to by INPUT_LINE_POINTER
|
||
(but which has now been replaced bu a NUL) is in fact an
|
||
LDI:8, LDI:20, LDI:32, CALL:D. JMP:D, RET:D or Bcc:D instruction.
|
||
If it is, then it restores the colon, advances INPUT_LINE_POINTER
|
||
to the real end of the instruction/symbol, and returns the character
|
||
that really terminated the symbol. Otherwise it returns 0. */
|
||
char
|
||
fr30_is_colon_insn (start)
|
||
char * start;
|
||
{
|
||
char * i_l_p = input_line_pointer;
|
||
|
||
/* Check to see if the symbol parsed so far is 'ldi' */
|
||
if ( (start[0] != 'l' && start[0] != 'L')
|
||
|| (start[1] != 'd' && start[1] != 'D')
|
||
|| (start[2] != 'i' && start[2] != 'I')
|
||
|| start[3] != 0)
|
||
{
|
||
/* Nope - check to see a 'd' follows the colon. */
|
||
if ( (i_l_p[1] == 'd' || i_l_p[1] == 'D')
|
||
&& (i_l_p[2] == ' ' || i_l_p[2] == '\t' || i_l_p[2] == '\n'))
|
||
{
|
||
/* Yup - it might be delay slot instruction. */
|
||
int i;
|
||
static char * delay_insns [] =
|
||
{
|
||
"call", "jmp", "ret", "bra", "bno",
|
||
"beq", "bne", "bc", "bnc", "bn",
|
||
"bp", "bv", "bnv", "blt", "bge",
|
||
"ble", "bgt", "bls", "bhi"
|
||
};
|
||
|
||
for (i = sizeof (delay_insns) / sizeof (delay_insns[0]); i--;)
|
||
{
|
||
char * insn = delay_insns[i];
|
||
int len = strlen (insn);
|
||
|
||
if (start [len] != 0)
|
||
continue;
|
||
|
||
while (len --)
|
||
if (TOLOWER (start [len]) != insn [len])
|
||
break;
|
||
|
||
if (len == -1)
|
||
return restore_colon (1);
|
||
}
|
||
}
|
||
|
||
/* Nope - it is a normal label. */
|
||
return 0;
|
||
}
|
||
|
||
/* Check to see if the text following the colon is '8' */
|
||
if (i_l_p[1] == '8' && (i_l_p[2] == ' ' || i_l_p[2] == '\t'))
|
||
return restore_colon (2);
|
||
|
||
/* Check to see if the text following the colon is '20' */
|
||
else if (i_l_p[1] == '2' && i_l_p[2] =='0' && (i_l_p[3] == ' ' || i_l_p[3] == '\t'))
|
||
return restore_colon (3);
|
||
|
||
/* Check to see if the text following the colon is '32' */
|
||
else if (i_l_p[1] == '3' && i_l_p[2] =='2' && (i_l_p[3] == ' ' || i_l_p[3] == '\t'))
|
||
return restore_colon (3);
|
||
|
||
return 0;
|
||
}
|
||
|
||
bfd_boolean
|
||
fr30_fix_adjustable (fixP)
|
||
fixS * fixP;
|
||
{
|
||
/* We need the symbol name for the VTABLE entries */
|
||
if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
|
||
|| fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
|
||
return 0;
|
||
|
||
return 1;
|
||
}
|