mirror of
https://sourceware.org/git/binutils-gdb.git
synced 2024-12-09 04:21:49 +08:00
d031aafbfe
* bfd/archures.c (bfd_arch_mt): Renamed. (bfd_mt_arch): Renamed. (bfd_archures_list): Adjusted. * bfd/bfd-in2.h: Rebuilt. * bfd/config.bfd (mt): Remove special case targ_archs. (mt-*-elf): Rename bfd_elf32_mt_vec. * bfd/configure: Rebuilt. * bfd/configure.in (bfd_elf32_mt_vec): Renamed. (selarchs) Remove mt special case. * bfd/cpu-mt.c (arch_info_struct): Adjust. (bfd_mt_arch): Renamed, adjust. * bfd/elf32-mt.c (mt_reloc_type_lookup, mt_info_to_howto_rela, mt_elf_relocate_hi16, mt_final_link_relocate, mt_relocate_section, mt_elf_howto_table): Renamed, adjusted. (mt_elf_gc_mark_hook, mt_elf_gc_sweep_hook, mt_elf_check_relocs, elf32_mt_machine, mt_elf_object_p, mt_elf_set_private_flags, mt_elf_copy_private_bfd_data, mt_elf_merge_private_bfd_data, mt_elf_print_private_bfd_data): Renamed, adjusted. (TARGET_BIG_SYM, TARGET_BIG_NAME, ELF_ARCH, ELF_MACHINE_CODE, ELF_MAXPAGESIZE, elf_info_to_howto, elf_backend_relocate_section, bfd_elf32_bfd_reloc_type_lookup, elf_backend_gc_mark_hook, elf_backend_gc_sweep_hook, elf_backend_check_relocs, eld_backend_object_p, bfd_elf32_bfd_set_private_flags, bfd_elf32_bfd_copy_private_bfd_data, bfd_elf32_bfd_merge_private_bfd_data, bfd_elf32_bfd_print_private_bfd_data): Adjusted. * bfd/libbfd.h: Regenerated. * bfd/reloc.c (BFD_RELOC_MT_PC16, BFD_RELOC_MT_HI16, BFD_RELOC_MT_LO16, BFD_RELOC_MT_GNU_VTINHERIT, BFD_RELOC_MT_GNU_VTENTRY, BFD_RELOC_MT_PCINSN8): Renamed. * bfd/targets.c (bfd_elf32_mt_vec): Renamed. (_bfd_target_vector): Adjusted. * binutils/readelf.c (guess_is_rela): Use EM_MT. (dump_relocations, get_machine_name): Adjust. * cpu/mt.cpu (define-arch, define-isa): Set name to mt. (define-mach): Adjust. * cpu/mt.opc (CGEN_ASM_HASH): Update. (mt_asm_hash, mt_cgen_insn_supported): Renamed. (parse_loopsize, parse_imm16): Adjust. * gas/configure: Rebuilt. * gas/configure.in (mt): Remove special case. * gas/config/tc-mt.c (opcodes/mt-desc.h, opcodes/mt-opc.h): Change #includes. (mt_insn, mt_mach, mt_mach_bitmask, mt_flags, mt_architectures): Rename, adjust. (md_parse_option, md_show_usage, md_begin, md_assemble, md_cgen_lookup_reloc, md_atof): Adjust. (mt_force_relocation, mt_apply_fix, mt_fix_adjustable): Rename, adjust. * gas/config/tc-mt.h (TC_MT): Rename. (LISTING_HEADER, TARGET_ARCH, TARGET_FORMAT): Adjust. (md_apply_fix): Adjust. (mt_apply_fix, mt_fix_adjustable, mt_force_relocation): Rename. (TC_FORCE_RELOCATION, tc_fix_adjustable): Adjust. * gdb/mt-tdep.c (mt_arch_constants, mt_gdb_regnums): Rename, adjust. (mt_register_name, mt_register_type, mt_register_reggroup_p, mt_return_value, mt_skip_prologue, mt_breapoint_from_pc, mt_pseudo_register_read, mt_pseudo_register_write, mt_frame_align, mt_registers_info, mt_push_dummy_call, mt_unwind_cache, mt_frame_unwind_cache, mt_unwind_pc, mt_unwind_dummy_id, mt_frame_this_id, mt_frame_prev_register, mt_frame_base_address, mt_frame_unwind, mt_frame_sniffer, mt_frame_base, mt_gdbarch_init, _initialize_mt_tdep): Rename & adjust. * include/dis-asm.h (print_insn_mt): Renamed. * include/elf/common.h (EM_MT): Renamed. * include/elf/mt.h: Rename relocs, cpu & other defines. * ld/emulparams/elf32mt.sh (ARCH, OUTPUT_FORMAT): Adjust. * opcodes/Makefile.am (HFILES, CFILES, ALL_MACHINES): Adjust. (stamp-mt): Adjust rule. (mt-asm.lo, mt-desc.lo, mt-dis.lo, mt-ibld.lo, mt-opc.lo): Rename & adjust. * opcodes/Makefile.in: Rebuilt. * opcodes/configure: Rebuilt. * opcodes/configure.in (bfd_mt_arch): Rename & adjust. * opcodes/disassemble.c (ARCH_mt): Renamed. (disassembler): Adjust. * opcodes/mt-asm.c: Renamed, rebuilt. * opcodes/mt-desc.c: Renamed, rebuilt. * opcodes/mt-desc.h: Renamed, rebuilt. * opcodes/mt-dis.c: Renamed, rebuilt. * opcodes/mt-ibld.c: Renamed, rebuilt. * opcodes/mt-opc.c: Renamed, rebuilt. * opcodes/mt-opc.h: Renamed, rebuilt. * sid/Makefile.in: Rebuilt. * sid/aclocal.m4: Rebuilt. * sid/configure: Rebuilt. * sid/sid.spec: Adjust. * sid/bsp/Makefile.am: Adjust. * sid/bsp/Makefile.in: Rebuilt. * sid/bsp/aclocal.m4: Rebuilt. * sid/bsp/configrun-sid.in: Adjust. * sid/bsp/pregen/Makefile.in: Rebuilt. * sid/bsp/pregen/mt-gdb.conf: Renamed & rebuilt. * sid/bsp/pregen/mt-gloss.conf: Renamed & rebuilt. * sid/bsp/pregen/pregen-configs.in: Adjust. * sid/component/aclocal.m4: Rebuilt. * sid/component/configure: Rebuilt. * sid/component/tconfig.in: Adjust. * sid/component/bochs/aclocal.m4: Rebuilt. * sid/component/cache/Makefile.in: Rebuilt. * sid/component/cgen-cpu/Makefile.in: Rebuilt. * sid/component/cgen-cpu/aclocal.m4: Rebuilt. * sid/component/cgen-cpu/compCGEN.cxx: Adjust. * sid/component/cgen-cpu/configure: Rebuilt. * sid/component/cgen-cpu/configure.in: Rebult. * sid/component/cgen-cpu/mt/Makefile.am: Adjust. * sid/component/cgen-cpu/mt/Makefile.in: Rebuilt. * sid/component/cgen-cpu/mt/hw-cpu-mt.txt: Adjust. * sid/component/cgen-cpu/mt/mt-cpu.h: Rebuilt. * sid/component/cgen-cpu/mt/mt-decode.cxx: Rebuilt. * sid/component/cgen-cpu/mt/mt-decode.h: Rebuilt. * sid/component/cgen-cpu/mt/mt-defs.h: Rebuilt. * sid/component/cgen-cpu/mt/mt-desc.h: Rebuilt. * sid/component/cgen-cpu/mt/mt-sem.cxx: Rebuilt. * sid/component/cgen-cpu/mt/mt-write.cxx: Rebuilt. * sid/component/cgen-cpu/mt/mt.cxx: Adjust. * sid/component/cgen-cpu/mt/mt.h: Adjust. * sid/component/consoles/Makefile.in: Rebuilt. * sid/component/families/aclocal.m4: Rebuilt. * sid/component/families/configure: Rebuilt. * sid/component/gdb/Makefile.in: Rebuilt. * sid/component/gloss/Makefile.in: Rebuilt. * sid/component/glue/Makefile.in: Rebuilt. * sid/component/ide/Makefile.in: Rebuilt. * sid/component/interrupt/Makefile.in: Rebuilt. * sid/component/lcd/Makefile.in: Rebuilt. * sid/component/lcd/testsuite/Makefile.in: Rebuilt. * sid/component/loader/Makefile.am: Rebuilt. * sid/component/loader/Makefile.in: Rebuilt. * sid/component/mapper/Makefile.in: Rebuilt. * sid/component/mapper/testsuite/Makefile.in: Rebuilt. * sid/component/memory/Makefile.in: Rebuilt. * sid/component/mmu/Makefile.in: Rebuilt. * sid/component/parport/Makefile.in: Rebuilt. * sid/component/profiling/Makefile.in: Rebuilt. * sid/component/rtc/Makefile.in: Rebuilt. * sid/component/sched/Makefile.in: Rebuilt. * sid/component/testsuite/Makefile.in: Rebuilt. * sid/component/timers/aclocal.m4: Rebuilt. * sid/component/timers/configure: Rebuilt. * sid/component/uart/Makefile.in: Rebuilt. * sid/component/uart/testsuite/Makefile.in: Rebuilt. * sid/config/config.sub: Adjust. * sid/config/info.tcl.in: Adjust. * sid/config/sidtargets.m4: Adjust. * sid/doc/Makefile.in: Rebuilt. * sid/main/dynamic/Makefile.am: Rebuilt. * sid/main/dynamic/Makefile.in: Rebuilt. * sid/main/dynamic/aclocal.m4: Rebuilt. * sid/main/dynamic/configure: Rebuilt.
475 lines
12 KiB
C
475 lines
12 KiB
C
/* Morpho Technologies mRISC opcode support, for GNU Binutils. -*- C -*-
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Copyright 2001 Free Software Foundation, Inc.
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Contributed by Red Hat Inc; developed under contract from
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Morpho Technologies.
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This file is part of the GNU Binutils.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
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*/
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/*
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Each section is delimited with start and end markers.
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<arch>-opc.h additions use: "-- opc.h"
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<arch>-opc.c additions use: "-- opc.c"
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<arch>-asm.c additions use: "-- asm.c"
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<arch>-dis.c additions use: "-- dis.c"
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<arch>-ibd.h additions use: "-- ibd.h"
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*/
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/* -- opc.h */
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/* Check applicability of instructions against machines. */
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#define CGEN_VALIDATE_INSN_SUPPORTED
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/* Allows reason codes to be output when assembler errors occur. */
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#define CGEN_VERBOSE_ASSEMBLER_ERRORS
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/* Override disassembly hashing - there are variable bits in the top
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byte of these instructions. */
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#define CGEN_DIS_HASH_SIZE 8
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#define CGEN_DIS_HASH(buf, value) (((* (unsigned char *) (buf)) >> 5) % CGEN_DIS_HASH_SIZE)
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#define CGEN_ASM_HASH_SIZE 127
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#define CGEN_ASM_HASH(insn) mt_asm_hash (insn)
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extern unsigned int mt_asm_hash (const char *);
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extern int mt_cgen_insn_supported (CGEN_CPU_DESC, const CGEN_INSN *);
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/* -- opc.c */
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#include "safe-ctype.h"
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/* Special check to ensure that instruction exists for given machine. */
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int
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mt_cgen_insn_supported (CGEN_CPU_DESC cd, const CGEN_INSN *insn)
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{
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int machs = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_MACH);
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/* No mach attribute? Assume it's supported for all machs. */
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if (machs == 0)
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return 1;
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return ((machs & cd->machs) != 0);
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}
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/* A better hash function for instruction mnemonics. */
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unsigned int
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mt_asm_hash (const char* insn)
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{
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unsigned int hash;
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const char* m = insn;
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for (hash = 0; *m && ! ISSPACE (*m); m++)
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hash = (hash * 23) ^ (0x1F & TOLOWER (*m));
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/* printf ("%s %d\n", insn, (hash % CGEN_ASM_HASH_SIZE)); */
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return hash % CGEN_ASM_HASH_SIZE;
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}
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/* -- asm.c */
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/* Range checking for signed numbers. Returns 0 if acceptable
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and 1 if the value is out of bounds for a signed quantity. */
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static int
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signed_out_of_bounds (long val)
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{
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if ((val < -32768) || (val > 32767))
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return 1;
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return 0;
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}
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static const char *
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parse_loopsize (CGEN_CPU_DESC cd,
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const char **strp,
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int opindex,
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void *arg)
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{
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signed long * valuep = (signed long *) arg;
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const char *errmsg;
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bfd_reloc_code_real_type code = BFD_RELOC_NONE;
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enum cgen_parse_operand_result result_type;
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bfd_vma value;
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/* Is it a control transfer instructions? */
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if (opindex == (CGEN_OPERAND_TYPE) MT_OPERAND_LOOPSIZE)
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{
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code = BFD_RELOC_MT_PCINSN8;
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errmsg = cgen_parse_address (cd, strp, opindex, code,
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& result_type, & value);
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*valuep = value;
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return errmsg;
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}
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abort ();
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}
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static const char *
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parse_imm16 (CGEN_CPU_DESC cd,
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const char **strp,
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int opindex,
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void *arg)
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{
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signed long * valuep = (signed long *) arg;
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const char *errmsg;
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enum cgen_parse_operand_result result_type;
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bfd_reloc_code_real_type code = BFD_RELOC_NONE;
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bfd_vma value;
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/* Is it a control transfer instructions? */
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if (opindex == (CGEN_OPERAND_TYPE) MT_OPERAND_IMM16O)
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{
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code = BFD_RELOC_16_PCREL;
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errmsg = cgen_parse_address (cd, strp, opindex, code,
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& result_type, & value);
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if (errmsg == NULL)
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{
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if (signed_out_of_bounds (value))
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errmsg = _("Operand out of range. Must be between -32768 and 32767.");
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}
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*valuep = value;
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return errmsg;
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}
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/* If it's not a control transfer instruction, then
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we have to check for %OP relocating operators. */
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if (opindex == (CGEN_OPERAND_TYPE) MT_OPERAND_IMM16L)
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;
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else if (strncmp (*strp, "%hi16", 5) == 0)
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{
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*strp += 5;
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code = BFD_RELOC_HI16;
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}
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else if (strncmp (*strp, "%lo16", 5) == 0)
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{
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*strp += 5;
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code = BFD_RELOC_LO16;
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}
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/* If we found a %OP relocating operator, then parse it as an address.
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If not, we need to parse it as an integer, either signed or unsigned
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depending on which operand type we have. */
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if (code != BFD_RELOC_NONE)
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{
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/* %OP relocating operator found. */
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errmsg = cgen_parse_address (cd, strp, opindex, code,
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& result_type, & value);
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if (errmsg == NULL)
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{
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switch (result_type)
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{
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case (CGEN_PARSE_OPERAND_RESULT_NUMBER):
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if (code == BFD_RELOC_HI16)
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value = (value >> 16) & 0xFFFF;
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else if (code == BFD_RELOC_LO16)
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value = value & 0xFFFF;
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else
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errmsg = _("Biiiig Trouble in parse_imm16!");
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break;
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case (CGEN_PARSE_OPERAND_RESULT_QUEUED):
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/* No special processing for this case. */
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break;
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default:
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errmsg = _("%operator operand is not a symbol");
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break;
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}
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}
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*valuep = value;
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}
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else
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{
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/* Parse hex values like 0xffff as unsigned, and sign extend
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them manually. */
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int parse_signed = (opindex == (CGEN_OPERAND_TYPE)MT_OPERAND_IMM16);
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if ((*strp)[0] == '0'
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&& ((*strp)[1] == 'x' || (*strp)[1] == 'X'))
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parse_signed = 0;
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/* No relocating operator. Parse as an number. */
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if (parse_signed)
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{
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/* Parse as as signed integer. */
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errmsg = cgen_parse_signed_integer (cd, strp, opindex, valuep);
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if (errmsg == NULL)
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{
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#if 0
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/* Manual range checking is needed for the signed case. */
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if (*valuep & 0x8000)
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value = 0xffff0000 | *valuep;
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else
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value = *valuep;
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if (signed_out_of_bounds (value))
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errmsg = _("Operand out of range. Must be between -32768 and 32767.");
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/* Truncate to 16 bits. This is necessary
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because cgen will have sign extended *valuep. */
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*valuep &= 0xFFFF;
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#endif
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}
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}
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else
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{
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/* MT_OPERAND_IMM16Z. Parse as an unsigned integer. */
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errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, (unsigned long *) valuep);
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if (opindex == (CGEN_OPERAND_TYPE) MT_OPERAND_IMM16
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&& *valuep >= 0x8000
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&& *valuep <= 0xffff)
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*valuep -= 0x10000;
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}
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}
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return errmsg;
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}
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static const char *
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parse_dup (CGEN_CPU_DESC cd,
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const char **strp,
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int opindex,
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unsigned long *valuep)
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{
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const char *errmsg = NULL;
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if (strncmp (*strp, "dup", 3) == 0 || strncmp (*strp, "DUP", 3) == 0)
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{
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*strp += 3;
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*valuep = 1;
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}
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else if (strncmp (*strp, "xx", 2) == 0 || strncmp (*strp, "XX", 2) == 0)
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{
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*strp += 2;
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*valuep = 0;
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}
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else
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errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, valuep);
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return errmsg;
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}
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static const char *
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parse_ball (CGEN_CPU_DESC cd,
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const char **strp,
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int opindex,
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unsigned long *valuep)
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{
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const char *errmsg = NULL;
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if (strncmp (*strp, "all", 3) == 0 || strncmp (*strp, "ALL", 3) == 0)
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{
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*strp += 3;
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*valuep = 1;
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}
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else if (strncmp (*strp, "one", 3) == 0 || strncmp (*strp, "ONE", 3) == 0)
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{
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*strp += 3;
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*valuep = 0;
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}
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else
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errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, valuep);
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return errmsg;
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}
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static const char *
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parse_xmode (CGEN_CPU_DESC cd,
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const char **strp,
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int opindex,
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unsigned long *valuep)
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{
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const char *errmsg = NULL;
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if (strncmp (*strp, "pm", 2) == 0 || strncmp (*strp, "PM", 2) == 0)
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{
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*strp += 2;
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*valuep = 1;
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}
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else if (strncmp (*strp, "xm", 2) == 0 || strncmp (*strp, "XM", 2) == 0)
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{
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*strp += 2;
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*valuep = 0;
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}
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else
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errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, valuep);
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return errmsg;
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}
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static const char *
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parse_rc (CGEN_CPU_DESC cd,
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const char **strp,
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int opindex,
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unsigned long *valuep)
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{
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const char *errmsg = NULL;
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if (strncmp (*strp, "r", 1) == 0 || strncmp (*strp, "R", 1) == 0)
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{
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*strp += 1;
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*valuep = 1;
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}
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else if (strncmp (*strp, "c", 1) == 0 || strncmp (*strp, "C", 1) == 0)
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{
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*strp += 1;
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*valuep = 0;
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}
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else
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errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, valuep);
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return errmsg;
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}
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static const char *
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parse_cbrb (CGEN_CPU_DESC cd,
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const char **strp,
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int opindex,
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unsigned long *valuep)
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{
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const char *errmsg = NULL;
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if (strncmp (*strp, "rb", 2) == 0 || strncmp (*strp, "RB", 2) == 0)
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{
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*strp += 2;
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*valuep = 1;
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}
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else if (strncmp (*strp, "cb", 2) == 0 || strncmp (*strp, "CB", 2) == 0)
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||
{
|
||
*strp += 2;
|
||
*valuep = 0;
|
||
}
|
||
else
|
||
errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, valuep);
|
||
|
||
return errmsg;
|
||
}
|
||
|
||
static const char *
|
||
parse_rbbc (CGEN_CPU_DESC cd,
|
||
const char **strp,
|
||
int opindex,
|
||
unsigned long *valuep)
|
||
{
|
||
const char *errmsg = NULL;
|
||
|
||
if (strncmp (*strp, "rt", 2) == 0 || strncmp (*strp, "RT", 2) == 0)
|
||
{
|
||
*strp += 2;
|
||
*valuep = 0;
|
||
}
|
||
else if (strncmp (*strp, "br1", 3) == 0 || strncmp (*strp, "BR1", 3) == 0)
|
||
{
|
||
*strp += 3;
|
||
*valuep = 1;
|
||
}
|
||
else if (strncmp (*strp, "br2", 3) == 0 || strncmp (*strp, "BR2", 3) == 0)
|
||
{
|
||
*strp += 3;
|
||
*valuep = 2;
|
||
}
|
||
else if (strncmp (*strp, "cs", 2) == 0 || strncmp (*strp, "CS", 2) == 0)
|
||
{
|
||
*strp += 2;
|
||
*valuep = 3;
|
||
}
|
||
else
|
||
errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, valuep);
|
||
|
||
return errmsg;
|
||
}
|
||
|
||
static const char *
|
||
parse_type (CGEN_CPU_DESC cd,
|
||
const char **strp,
|
||
int opindex,
|
||
unsigned long *valuep)
|
||
{
|
||
const char *errmsg = NULL;
|
||
|
||
if (strncmp (*strp, "odd", 3) == 0 || strncmp (*strp, "ODD", 3) == 0)
|
||
{
|
||
*strp += 3;
|
||
*valuep = 0;
|
||
}
|
||
else if (strncmp (*strp, "even", 4) == 0 || strncmp (*strp, "EVEN", 4) == 0)
|
||
{
|
||
*strp += 4;
|
||
*valuep = 1;
|
||
}
|
||
else if (strncmp (*strp, "oe", 2) == 0 || strncmp (*strp, "OE", 2) == 0)
|
||
{
|
||
*strp += 2;
|
||
*valuep = 2;
|
||
}
|
||
else
|
||
errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, valuep);
|
||
|
||
if ((errmsg == NULL) && (*valuep == 3))
|
||
errmsg = _("invalid operand. type may have values 0,1,2 only.");
|
||
|
||
return errmsg;
|
||
}
|
||
|
||
/* -- dis.c */
|
||
static void print_dollarhex (CGEN_CPU_DESC, PTR, long, unsigned, bfd_vma, int);
|
||
static void print_pcrel (CGEN_CPU_DESC, PTR, long, unsigned, bfd_vma, int);
|
||
|
||
static void
|
||
print_dollarhex (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
|
||
void * dis_info,
|
||
long value,
|
||
unsigned int attrs ATTRIBUTE_UNUSED,
|
||
bfd_vma pc ATTRIBUTE_UNUSED,
|
||
int length ATTRIBUTE_UNUSED)
|
||
{
|
||
disassemble_info *info = (disassemble_info *) dis_info;
|
||
|
||
info->fprintf_func (info->stream, "$%lx", value);
|
||
|
||
if (0)
|
||
print_normal (cd, dis_info, value, attrs, pc, length);
|
||
}
|
||
|
||
static void
|
||
print_pcrel (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
|
||
void * dis_info,
|
||
long value,
|
||
unsigned int attrs ATTRIBUTE_UNUSED,
|
||
bfd_vma pc ATTRIBUTE_UNUSED,
|
||
int length ATTRIBUTE_UNUSED)
|
||
{
|
||
print_address (cd, dis_info, value + pc, attrs, pc, length);
|
||
}
|
||
|
||
/* -- */
|
||
|
||
|
||
|
||
|
||
|