mirror of
https://sourceware.org/git/binutils-gdb.git
synced 2024-12-27 04:52:05 +08:00
f9830ec165
This patch adds constraints for read and write only system registers with the msr and mrs instructions. The code will treat having both flags set and none set as the same. These flags add constraints that must be matched up. e.g. a system register with a READ only flag set, can only be used with mrs. If The constraint fails a warning is emitted. Examples of the warnings generated: test.s: Assembler messages: test.s:5: Warning: specified register cannot be written to at operand 1 -- `msr dbgdtrrx_el0,x3' test.s:7: Warning: specified register cannot be read from at operand 2 -- `mrs x3,dbgdtrtx_el0' test.s:8: Warning: specified register cannot be written to at operand 1 -- `msr midr_el1,x3' and disassembly notes: 0000000000000000 <main>: 0: d5130503 msr dbgdtrtx_el0, x3 4: d5130503 msr dbgdtrtx_el0, x3 8: d5330503 mrs x3, dbgdtrrx_el0 c: d5330503 mrs x3, dbgdtrrx_el0 10: d5180003 msr midr_el1, x3 ; note: writing to a read-only register. Note that because dbgdtrrx_el0 and dbgdtrtx_el0 have the same encoding, during disassembly the constraints are use to disambiguate between the two. An exact constraint match is always prefered over partial ones if available. As always the warnings can be suppressed with -w and also be made errors using warnings as errors. binutils/ PR binutils/21446 * doc/binutils.texi (-M): Document AArch64 options. gas/ PR binutils/21446 * testsuite/gas/aarch64/illegal-sysreg-2.s: Fix pmbidr_el1 test. * testsuite/gas/aarch64/illegal-sysreg-2.l: Likewise. * testsuite/gas/aarch64/illegal-sysreg-2.d: Likewise. * testsuite/gas/aarch64/sysreg-diagnostic.s: New. * testsuite/gas/aarch64/sysreg-diagnostic.l: New. * testsuite/gas/aarch64/sysreg-diagnostic.d: New. include/ PR binutils/21446 * opcode/aarch64.h (F_SYS_READ, F_SYS_WRITE): New. opcodes/ PR binutils/21446 * aarch64-asm.c (opintl.h): Include. (aarch64_ins_sysreg): Enforce read/write constraints. * aarch64-dis.c (aarch64_ext_sysreg): Likewise. * aarch64-opc.h (F_DEPRECATED, F_ARCHEXT, F_HASXT): Moved here. (F_REG_READ, F_REG_WRITE): New. * aarch64-opc.c (aarch64_print_operand): Generate notes for AARCH64_OPND_SYSREG. (F_DEPRECATED, F_ARCHEXT, F_HASXT): Move to aarch64-opc.h. (aarch64_sys_regs): Add constraints to currentel, midr_el1, ctr_el0, mpidr_el1, revidr_el1, aidr_el1, dczid_el0, id_dfr0_el1, id_pfr0_el1, id_pfr1_el1, id_afr0_el1, id_mmfr0_el1, id_mmfr1_el1, id_mmfr2_el1, id_mmfr3_el1, id_mmfr4_el1, id_isar0_el1, id_isar1_el1, id_isar2_el1, id_isar3_el1, id_isar4_el1, id_isar5_el1, mvfr0_el1, mvfr1_el1, mvfr2_el1, ccsidr_el1, id_aa64pfr0_el1, id_aa64pfr1_el1, id_aa64dfr0_el1, id_aa64dfr1_el1, id_aa64isar0_el1, id_aa64isar1_el1, id_aa64mmfr0_el1, id_aa64mmfr1_el1, id_aa64mmfr2_el1, id_aa64afr0_el1, id_aa64afr0_el1, id_aa64afr1_el1, id_aa64zfr0_el1, clidr_el1, csselr_el1, vsesr_el2, erridr_el1, erxfr_el1, rvbar_el1, rvbar_el2, rvbar_el3, isr_el1, tpidrro_el0, cntfrq_el0, cntpct_el0, cntvct_el0, mdccsr_el0, dbgdtrrx_el0, dbgdtrtx_el0, osdtrrx_el1, osdtrtx_el1, mdrar_el1, oslar_el1, oslsr_el1, dbgauthstatus_el1, pmbidr_el1, pmsidr_el1, pmswinc_el0, pmceid0_el0, pmceid1_el0. * aarch64-tbl.h (aarch64_opcode_table): Add constraints to msr (F_SYS_WRITE), mrs (F_SYS_READ).
286 lines
7.4 KiB
Plaintext
286 lines
7.4 KiB
Plaintext
2018-05-15 Tamar Christina <tamar.christina@arm.com>
|
||
|
||
PR binutils/21446
|
||
* opcode/aarch64.h (F_SYS_READ, F_SYS_WRITE): New.
|
||
|
||
2018-05-15 Tamar Christina <tamar.christina@arm.com>
|
||
|
||
PR binutils/21446
|
||
* opcode/aarch64.h (aarch64_operand_error): Add non_fatal.
|
||
(aarch64_print_operand): Support notes.
|
||
|
||
2018-05-15 Tamar Christina <tamar.christina@arm.com>
|
||
|
||
PR binutils/21446
|
||
* opcode/aarch64.h (aarch64_opnd_info): Change sysreg to struct.
|
||
(aarch64_decode_insn): Accept error struct.
|
||
|
||
2018-05-15 Francois H. Theron <francois.theron@netronome.com>
|
||
|
||
* opcode/nfp.h: Use uint64_t instead of bfd_vma.
|
||
|
||
2018-05-10 John Darrington <john@darrington.wattle.id.au>
|
||
|
||
* elf/common.h (EM_S12Z): New macro.
|
||
|
||
2018-05-09 Sebastian Rasmussen <sebras@gmail.com>
|
||
|
||
* mach-o/unwind.h (MACH_O_UNWIND_X86_64_RBP_FRAME_REGISTERS):
|
||
Rename from MACH_O_UNWIND_X86_64_RBP_FRAME_REGSITERS.
|
||
(MACH_O_UNWIND_X86_EBP_FRAME_REGISTERS): Rename from
|
||
MACH_O_UNWIND_X86_EBP_FRAME_REGSITERS.
|
||
|
||
2018-05-08 Jim Wilson <jimw@sifive.com>
|
||
|
||
* opcode/riscv-opc.h (MATCH_C_SRLI64, MASK_C_SRLI64): New.
|
||
(MATCH_C_SRAI64, MASK_C_SRAI64): New.
|
||
(MATCH_C_SLLI64, MASK_C_SLLI64): New.
|
||
|
||
2018-05-07 Peter Bergner <bergner@vnet.ibm.com.com>
|
||
|
||
* opcode/ppc.h (powerpc_num_opcodes): Change type to unsigned.
|
||
(vle_num_opcodes): Likewise.
|
||
(spe2_num_opcodes): Likewise.
|
||
|
||
2018-05-04 Alan Modra <amodra@gmail.com>
|
||
|
||
* ansidecl.h: Import from gcc.
|
||
* coff/internal.h (struct internal_scnhdr): Add ATTRIBUTE_NONSTRING
|
||
to s_name.
|
||
(struct internal_syment): Add ATTRIBUTE_NONSTRING to _n_name.
|
||
|
||
2018-04-30 Francois H. Theron <francois.theron@netronome.com>
|
||
|
||
* dis-asm.h: Added print_nfp_disassembler_options prototype.
|
||
* elf/common.h: Added EM_NFP, officially assigned. See Google Group
|
||
Generic System V Application Binary Interface.
|
||
* elf/nfp.h: New, for NFP support.
|
||
* opcode/nfp.h: New, for NFP support.
|
||
|
||
2018-04-25 Christophe Lyon <christophe.lyon@st.com>
|
||
Mickaël Guêné <mickael.guene@st.com>
|
||
|
||
* elf/arm.h: Add R_ARM_TLS_GD32_FDPIC, R_ARM_TLS_LDM32_FDPIC,
|
||
R_ARM_TLS_IE32_FDPIC.
|
||
|
||
2018-04-25 Christophe Lyon <christophe.lyon@st.com>
|
||
Mickaël Guêné <mickael.guene@st.com>
|
||
|
||
* elf/arm.h (R_ARM_GOTFUNCDESC, R_ARM_GOTOFFFUNCDESC)
|
||
(R_ARM_FUNCDESC)
|
||
(R_ARM_FUNCDESC_VALUE): Define new relocations.
|
||
|
||
2018-04-25 Christophe Lyon <christophe.lyon@st.com>
|
||
Mickaël Guêné <mickael.guene@st.com>
|
||
|
||
* elf/arm.h (EF_ARM_FDPIC): New.
|
||
|
||
2018-04-18 Alan Modra <amodra@gmail.com>
|
||
|
||
* coff/mipspe.h: Delete.
|
||
|
||
2018-04-18 Alan Modra <amodra@gmail.com>
|
||
|
||
* aout/dynix3.h: Delete.
|
||
|
||
2018-04-17 Andrew Sadek <andrew.sadek.se@gmail.com>
|
||
|
||
Microblaze Target: PIC data text relative
|
||
|
||
* bfdlink.h (Add flag): Add new flag @ 'bfd_link_info' struct.
|
||
* elf/microblaze.h (Add 3 new relocations):
|
||
R_MICROBLAZE_TEXTPCREL_64, R_MICROBLAZE_TEXTREL_64
|
||
and R_MICROBLAZE_TEXTREL_32_LO for relax function.
|
||
|
||
2018-04-17 Alan Modra <amodra@gmail.com>
|
||
|
||
* elf/i370.h: Revert removal.
|
||
* elf/i860.h: Likewise.
|
||
* elf/i960.h: Likewise.
|
||
|
||
2018-04-16 Alan Modra <amodra@gmail.com>
|
||
|
||
* coff/sparc.h: Delete.
|
||
|
||
2018-04-16 Alan Modra <amodra@gmail.com>
|
||
|
||
* aout/host.h: Remove m68k-aout and m68k-coff support.
|
||
* aout/hp300hpux.h: Delete.
|
||
* coff/apollo.h: Delete.
|
||
* coff/aux-coff.h: Delete.
|
||
* coff/m68k.h: Delete.
|
||
|
||
2018-04-16 Alan Modra <amodra@gmail.com>
|
||
|
||
* dis-asm.h: Remove sh5 and sh64 support.
|
||
|
||
2018-04-16 Alan Modra <amodra@gmail.com>
|
||
|
||
* coff/internal.h: Remove w65 support.
|
||
* coff/w65.h: Delete.
|
||
|
||
2018-04-16 Alan Modra <amodra@gmail.com>
|
||
|
||
* coff/we32k.h: Delete.
|
||
|
||
2018-04-16 Alan Modra <amodra@gmail.com>
|
||
|
||
* coff/internal.h: Remove m88k support.
|
||
* coff/m88k.h: Delete.
|
||
* opcode/m88k.h: Delete.
|
||
|
||
2018-04-16 Alan Modra <amodra@gmail.com>
|
||
|
||
* elf/i370.h: Delete.
|
||
* opcode/i370.h: Delete.
|
||
|
||
2018-04-16 Alan Modra <amodra@gmail.com>
|
||
|
||
* coff/h8500.h: Delete.
|
||
* coff/internal.h: Remove h8500 support.
|
||
|
||
2018-04-16 Alan Modra <amodra@gmail.com>
|
||
|
||
* coff/h8300.h: Delete.
|
||
|
||
2018-04-16 Alan Modra <amodra@gmail.com>
|
||
|
||
* ieee.h: Delete.
|
||
|
||
2018-04-16 Alan Modra <amodra@gmail.com>
|
||
|
||
* aout/host.h: Remove newsos3 support.
|
||
|
||
2018-04-16 Alan Modra <amodra@gmail.com>
|
||
|
||
* nlm/ChangeLog-9315: Delete.
|
||
* nlm/alpha-ext.h: Delete.
|
||
* nlm/common.h: Delete.
|
||
* nlm/external.h: Delete.
|
||
* nlm/i386-ext.h: Delete.
|
||
* nlm/internal.h: Delete.
|
||
* nlm/ppc-ext.h: Delete.
|
||
* nlm/sparc32-ext.h: Delete.
|
||
|
||
2018-04-16 Alan Modra <amodra@gmail.com>
|
||
|
||
* opcode/tahoe.h: Delete.
|
||
|
||
2018-04-11 Alan Modra <amodra@gmail.com>
|
||
|
||
* aout/adobe.h: Delete.
|
||
* aout/reloc.h: Delete.
|
||
* coff/i860.h: Delete.
|
||
* coff/i960.h: Delete.
|
||
* elf/i860.h: Delete.
|
||
* elf/i960.h: Delete.
|
||
* opcode/i860.h: Delete.
|
||
* opcode/i960.h: Delete.
|
||
* aout/aout64.h (enum reloc_type): Trim off 29k and other unused values.
|
||
* aout/ar.h (ARMAGB): Remove.
|
||
* coff/internal.h (struct internal_aouthdr, struct internal_scnhdr,
|
||
union internal_auxent): Remove i960 support.
|
||
|
||
2018-04-09 Alan Modra <amodra@gmail.com>
|
||
|
||
* elf/ppc.h (R_PPC_PLTSEQ, R_PPC_PLTCALL): Define.
|
||
* elf/ppc64.h (R_PPC64_PLTSEQ, R_PPC64_PLTCALL): Define.
|
||
|
||
2018-03-28 Renlin Li <renlin.li@arm.com>
|
||
|
||
PR ld/22970
|
||
* elf/aarch64.h: Add relocation number for
|
||
R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12,
|
||
R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12_NC,
|
||
R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12,
|
||
R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12_NC,
|
||
R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12,
|
||
R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12_NC,
|
||
R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12,
|
||
R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12_NC.
|
||
|
||
2018-03-28 Nick Clifton <nickc@redhat.com>
|
||
|
||
PR 22988
|
||
* opcode/aarch64.h (enum aarch64_opnd): Add
|
||
AARCH64_OPND_SVE_ADDR_R.
|
||
|
||
2018-03-21 H.J. Lu <hongjiu.lu@intel.com>
|
||
|
||
* elf/common.h (DF_1_KMOD): New.
|
||
(DF_1_WEAKFILTER): Likewise.
|
||
(DF_1_NOCOMMON): Likewise.
|
||
|
||
2018-03-14 Kito Cheng <kito.cheng@gmail.com>
|
||
|
||
* opcode/riscv.h (OP_MASK_FUNCT3): New.
|
||
(OP_SH_FUNCT3): Likewise.
|
||
(OP_MASK_FUNCT7): Likewise.
|
||
(OP_SH_FUNCT7): Likewise.
|
||
(OP_MASK_OP2): Likewise.
|
||
(OP_SH_OP2): Likewise.
|
||
(OP_MASK_CFUNCT4): Likewise.
|
||
(OP_SH_CFUNCT4): Likewise.
|
||
(OP_MASK_CFUNCT3): Likewise.
|
||
(OP_SH_CFUNCT3): Likewise.
|
||
(riscv_insn_types): Likewise.
|
||
|
||
2018-03-13 Nick Clifton <nickc@redhat.com>
|
||
|
||
PR 22113
|
||
* coff/pe.h (struct pex64_unwind_info): Add a rawUnwindCodesEnd
|
||
field.
|
||
|
||
2018-03-08 H.J. Lu <hongjiu.lu@intel.com>
|
||
|
||
* opcode/i386 (OLDGCC_COMPAT): Removed.
|
||
|
||
2018-02-27 Thomas Preud'homme <thomas.preudhomme@arm.com>
|
||
|
||
* opcode/arm.h (ARM_FEATURE_COPY): Remove macro definition.
|
||
|
||
2018-02-20 Maciej W. Rozycki <macro@mips.com>
|
||
|
||
* opcode/mips.h: Remove `M' operand code.
|
||
|
||
2018-02-12 Zebediah Figura <z.figura12@gmail.com>
|
||
|
||
* coff/msdos.h: New header.
|
||
* coff/pe.h: Move common defines to msdos.h.
|
||
* coff/powerpc.h: Likewise.
|
||
|
||
2018-01-13 Nick Clifton <nickc@redhat.com>
|
||
|
||
2.30 branch created.
|
||
|
||
2018-01-11 H.J. Lu <hongjiu.lu@intel.com>
|
||
|
||
PR ld/22393
|
||
* bfdlink.h (bfd_link_info): Add separate_code.
|
||
|
||
2018-01-04 Jim Wilson <jimw@sifive.com>
|
||
|
||
* opcode/riscv-opc.h (CSR_SBADADDR): Rename to CSR_STVAL. Rename
|
||
DECLARE_CSR entry. Add alias to map sbadaddr to CSR_STVAL.
|
||
(CSR_MBADADDR): Rename to CSR_MTVAL. Rename DECLARE_CSR entry.
|
||
Add alias to map mbadaddr to CSR_MTVAL.
|
||
|
||
2018-01-03 Alan Modra <amodra@gmail.com>
|
||
|
||
Update year range in copyright notice of all files.
|
||
|
||
For older changes see ChangeLog-2017
|
||
|
||
Copyright (C) 2018 Free Software Foundation, Inc.
|
||
|
||
Copying and distribution of this file, with or without modification,
|
||
are permitted in any medium without royalty provided the copyright
|
||
notice and this notice are preserved.
|
||
|
||
Local Variables:
|
||
mode: change-log
|
||
left-margin: 8
|
||
fill-column: 74
|
||
version-control: never
|
||
End:
|