Jan Beulich 059edf8b97 x86: merge/move logic determining the EVEX disp8 shift ... Fold redundant case blocks and move the extra adjustments logic into the single case block that actually needs it - there's no need to go through the extra logic for all the other cases. Also utilize there that vex.b cannot be set at this point, due to earlier logic. Reduce the comment there, which was partly stale anyway.		2020-07-14 10:29:55 +02:00
..
po	Fix spelling mistakes in some of the binutils sub-directories.	2020-07-06 10:54:36 +01:00
.gitignore
aarch64-asm-2.c	AArch64: add GAS support for UDF instruction	2020-04-30 15:47:30 +01:00
aarch64-asm.c	[AArch64, Binutils] Add missing TSB instruction	2020-04-20 10:58:16 +01:00
aarch64-asm.h	[AArch64, Binutils] Add missing TSB instruction	2020-04-20 10:58:16 +01:00
aarch64-dis-2.c	AArch64: add GAS support for UDF instruction	2020-04-30 15:47:30 +01:00
aarch64-dis.c	[AArch64, Binutils] Add missing TSB instruction	2020-04-20 10:58:16 +01:00
aarch64-dis.h	[AArch64, Binutils] Add missing TSB instruction	2020-04-20 10:58:16 +01:00
aarch64-gen.c	Indent labels	2020-02-26 10:37:25 +10:30
aarch64-opc-2.c	AArch64: add GAS support for UDF instruction	2020-04-30 15:47:30 +01:00
aarch64-opc.c	[PATCH]: aarch64: Refactor representation of system registers	2020-06-11 12:34:37 +01:00
aarch64-opc.h	AArch64: add GAS support for UDF instruction	2020-04-30 15:47:30 +01:00
aarch64-tbl.h	AArch64: add GAS support for UDF instruction	2020-04-30 15:47:30 +01:00
aclocal.m4
alpha-dis.c	Indent labels	2020-02-26 10:37:25 +10:30
alpha-opc.c
arc-dis.c	Fix spelling mistakes in some of the binutils sub-directories.	2020-07-06 10:54:36 +01:00
arc-dis.h
arc-ext-tbl.h
arc-ext.c	Replace "if (x) free (x)" with "free (x)", opcodes	2020-05-21 10:45:33 +09:30
arc-ext.h
arc-fxi.h
arc-nps400-tbl.h
arc-opc.c	arc: Update vector instructions.	2020-07-07 16:01:48 +03:00
arc-regs.h	[ARC][committed] Update int_vector_base aux register.	2020-02-25 10:27:07 +02:00
arc-tbl.h	arc: Update vector instructions.	2020-07-07 16:01:48 +03:00
arm-dis.c	C++ comments	2020-06-29 10:07:56 +09:30
avr-dis.c
bfin-dis.c
bpf-asm.c
bpf-desc.c	cpu,gas,opcodes: remove no longer needed workaround from the BPF port	2020-06-04 16:17:42 +02:00
bpf-desc.h	cpu,gas,opcodes: support for eBPF JMP32 instruction class	2020-04-16 09:52:57 +02:00
bpf-dis.c	cpu,gas,opcodes: remove no longer needed workaround from the BPF port	2020-06-04 16:17:42 +02:00
bpf-ibld.c	opcodes: discriminate endianness and insn-endianness in CGEN ports	2020-06-04 16:17:42 +02:00
bpf-opc.c	cpu,gas,opcodes: remove no longer needed workaround from the BPF port	2020-06-04 16:17:42 +02:00
bpf-opc.h	cpu,opcodes: add instruction semantics to bpf.cpu and minor fixes	2020-05-28 21:52:31 +02:00
cgen-asm.c
cgen-asm.in
cgen-bitset.c
cgen-dis.c	bpf stack smashing detected	2020-06-05 16:22:46 +09:30
cgen-dis.in	opcodes: discriminate endianness and insn-endianness in CGEN ports	2020-06-04 16:17:42 +02:00
cgen-ibld.in	opcodes: discriminate endianness and insn-endianness in CGEN ports	2020-06-04 16:17:42 +02:00
cgen-opc.c	opcodes: discriminate endianness and insn-endianness in CGEN ports	2020-06-04 16:17:42 +02:00
cgen.sh
ChangeLog	x86: merge/move logic determining the EVEX disp8 shift	2020-07-14 10:29:55 +02:00
ChangeLog-0001
ChangeLog-0203
ChangeLog-2004
ChangeLog-2005
ChangeLog-2006
ChangeLog-2007
ChangeLog-2008
ChangeLog-2009
ChangeLog-2010
ChangeLog-2011
ChangeLog-2012
ChangeLog-2013
ChangeLog-2014
ChangeLog-2015
ChangeLog-2016
ChangeLog-2017
ChangeLog-2018
ChangeLog-2019
ChangeLog-9297
ChangeLog-9899
config.in
configure	Update version to 2.35.50 and regenerate files	2020-07-04 10:34:23 +01:00
configure.ac
configure.com
cr16-dis.c	ubsan: cr16: left shift cannot be represented in type 'int'	2020-01-04 19:20:33 +10:30
cr16-opc.c	C++ comments	2020-06-29 10:07:56 +09:30
cris-dis.c
cris-opc.c
crx-dis.c
crx-opc.c
csky-dis.c
csky-opc.h
d10v-dis.c
d10v-opc.c
d30v-dis.c	ubsan: d30v: negation of -2147483648	2020-02-04 14:10:40 +10:30
d30v-opc.c
dep-in.sed
dis-buf.c
dis-init.c
disassemble.c	cpu,gas,opcodes: remove no longer needed workaround from the BPF port	2020-06-04 16:17:42 +02:00
disassemble.h	Re: H8300 use of uninitialised value	2020-03-26 20:02:42 +10:30
dlx-dis.c
epiphany-asm.c
epiphany-desc.c	opcodes: support insn endianness in cgen_cpu_open	2020-06-04 16:17:42 +02:00
epiphany-desc.h
epiphany-dis.c	opcodes: discriminate endianness and insn-endianness in CGEN ports	2020-06-04 16:17:42 +02:00
epiphany-ibld.c	opcodes: discriminate endianness and insn-endianness in CGEN ports	2020-06-04 16:17:42 +02:00
epiphany-opc.c
epiphany-opc.h
fr30-asm.c
fr30-desc.c	opcodes: support insn endianness in cgen_cpu_open	2020-06-04 16:17:42 +02:00
fr30-desc.h
fr30-dis.c	opcodes: discriminate endianness and insn-endianness in CGEN ports	2020-06-04 16:17:42 +02:00
fr30-ibld.c	opcodes: discriminate endianness and insn-endianness in CGEN ports	2020-06-04 16:17:42 +02:00
fr30-opc.c
fr30-opc.h
frv-asm.c
frv-desc.c	opcodes: support insn endianness in cgen_cpu_open	2020-06-04 16:17:42 +02:00
frv-desc.h
frv-dis.c	opcodes: discriminate endianness and insn-endianness in CGEN ports	2020-06-04 16:17:42 +02:00
frv-ibld.c	opcodes: discriminate endianness and insn-endianness in CGEN ports	2020-06-04 16:17:42 +02:00
frv-opc.c
frv-opc.h
ft32-dis.c	C++ comments	2020-06-29 10:07:56 +09:30
ft32-opc.c
h8300-dis.c	Re: H8300 use of uninitialised value	2020-03-26 20:02:42 +10:30
hppa-dis.c	ubsan: hppa: negation of -2147483648	2020-01-20 15:45:50 +10:30
i386-dis-evex-len.h	x86: most VBROADCAST{F,I}{32,64}x* only accept memory operands	2020-07-06 13:43:34 +02:00
i386-dis-evex-mod.h	x86: most VBROADCAST{F,I}{32,64}x* only accept memory operands	2020-07-06 13:43:34 +02:00
i386-dis-evex-prefix.h	x86: extend %BW use to VP{COMPRESS,EXPAND}{B,W}	2020-07-14 10:29:25 +02:00
i386-dis-evex-reg.h
i386-dis-evex-w.h	x86: extend %BW use to VP{COMPRESS,EXPAND}{B,W}	2020-07-14 10:29:25 +02:00
i386-dis-evex.h	x86: drop EVEX table entries that can be made served by VEX ones	2020-07-06 13:42:33 +02:00
i386-dis.c	x86: merge/move logic determining the EVEX disp8 shift	2020-07-14 10:29:55 +02:00
i386-gen.c	x86: Add support for Intel AMX instructions	2020-07-10 05:18:34 -07:00
i386-init.h	x86: Add support for Intel AMX instructions	2020-07-10 05:18:34 -07:00
i386-opc.c
i386-opc.h	x86: Add support for Intel AMX instructions	2020-07-10 05:18:34 -07:00
i386-opc.tbl	x86: Add support for Intel AMX instructions	2020-07-10 05:18:34 -07:00
i386-reg.tbl	x86: Add support for Intel AMX instructions	2020-07-10 05:18:34 -07:00
i386-tbl.h	x86: Add support for Intel AMX instructions	2020-07-10 05:18:34 -07:00
ia64-asmtab.c
ia64-asmtab.h
ia64-dis.c
ia64-gen.c
ia64-ic.tbl
ia64-opc-a.c
ia64-opc-b.c
ia64-opc-d.c
ia64-opc-f.c
ia64-opc-i.c
ia64-opc-m.c
ia64-opc-x.c
ia64-opc.c
ia64-opc.h
ia64-raw.tbl
ia64-war.tbl
ia64-waw.tbl
ip2k-asm.c
ip2k-desc.c	opcodes: support insn endianness in cgen_cpu_open	2020-06-04 16:17:42 +02:00
ip2k-desc.h
ip2k-dis.c	opcodes: discriminate endianness and insn-endianness in CGEN ports	2020-06-04 16:17:42 +02:00
ip2k-ibld.c	opcodes: discriminate endianness and insn-endianness in CGEN ports	2020-06-04 16:17:42 +02:00
ip2k-opc.c
ip2k-opc.h
iq2000-asm.c
iq2000-desc.c	opcodes: support insn endianness in cgen_cpu_open	2020-06-04 16:17:42 +02:00
iq2000-desc.h
iq2000-dis.c	opcodes: discriminate endianness and insn-endianness in CGEN ports	2020-06-04 16:17:42 +02:00
iq2000-ibld.c	opcodes: discriminate endianness and insn-endianness in CGEN ports	2020-06-04 16:17:42 +02:00
iq2000-opc.c
iq2000-opc.h
lm32-asm.c
lm32-desc.c	opcodes: support insn endianness in cgen_cpu_open	2020-06-04 16:17:42 +02:00
lm32-desc.h
lm32-dis.c	opcodes: discriminate endianness and insn-endianness in CGEN ports	2020-06-04 16:17:42 +02:00
lm32-ibld.c	opcodes: discriminate endianness and insn-endianness in CGEN ports	2020-06-04 16:17:42 +02:00
lm32-opc.c
lm32-opc.h
lm32-opinst.c
m32c-asm.c
m32c-desc.c	opcodes: support insn endianness in cgen_cpu_open	2020-06-04 16:17:42 +02:00
m32c-desc.h
m32c-dis.c	opcodes: discriminate endianness and insn-endianness in CGEN ports	2020-06-04 16:17:42 +02:00
m32c-ibld.c	opcodes: discriminate endianness and insn-endianness in CGEN ports	2020-06-04 16:17:42 +02:00
m32c-opc.c
m32c-opc.h
m32r-asm.c
m32r-desc.c	opcodes: support insn endianness in cgen_cpu_open	2020-06-04 16:17:42 +02:00
m32r-desc.h
m32r-dis.c	opcodes: discriminate endianness and insn-endianness in CGEN ports	2020-06-04 16:17:42 +02:00
m32r-ibld.c	opcodes: discriminate endianness and insn-endianness in CGEN ports	2020-06-04 16:17:42 +02:00
m32r-opc.c
m32r-opc.h
m32r-opinst.c
m68hc11-dis.c
m68hc11-opc.c
m68k-dis.c
m68k-opc.c	Disallow PC relative for CMPI on MC68000/10	2020-04-21 16:53:36 +02:00
m10200-dis.c	ubsan: m10300: shift exponent -4	2020-01-10 17:32:33 +10:30
m10200-opc.c
m10300-dis.c	ubsan: m10300: shift exponent -4	2020-01-10 17:32:33 +10:30
m10300-opc.c
MAINTAINERS
Makefile.am	x86: Also pass -P to $(CPP) when processing i386-opc.tbl	2020-03-09 08:23:46 -07:00
Makefile.in	x86: Also pass -P to $(CPP) when processing i386-opc.tbl	2020-03-09 08:23:46 -07:00
makefile.vms
mcore-dis.c
mcore-opc.h
mep-asm.c	Replace "if (x) free (x)" with "free (x)", opcodes	2020-05-21 10:45:33 +09:30
mep-desc.c	opcodes: support insn endianness in cgen_cpu_open	2020-06-04 16:17:42 +02:00
mep-desc.h
mep-dis.c	opcodes: discriminate endianness and insn-endianness in CGEN ports	2020-06-04 16:17:42 +02:00
mep-ibld.c	opcodes: discriminate endianness and insn-endianness in CGEN ports	2020-06-04 16:17:42 +02:00
mep-opc.c
mep-opc.h
metag-dis.c	metag uninitialized memory read	2020-03-20 12:35:51 +10:30
microblaze-dis.c
microblaze-dis.h
microblaze-opc.h
microblaze-opcm.h
micromips-opc.c
mips16-opc.c
mips-dis.c
mips-formats.h
mips-opc.c
mmix-dis.c
mmix-opc.c
moxie-dis.c
moxie-opc.c	C++ comments	2020-06-29 10:07:56 +09:30
msp430-decode.c
msp430-decode.opc
msp430-dis.c
mt-asm.c
mt-desc.c	opcodes: support insn endianness in cgen_cpu_open	2020-06-04 16:17:42 +02:00
mt-desc.h
mt-dis.c	opcodes: discriminate endianness and insn-endianness in CGEN ports	2020-06-04 16:17:42 +02:00
mt-ibld.c	opcodes: discriminate endianness and insn-endianness in CGEN ports	2020-06-04 16:17:42 +02:00
mt-opc.c
mt-opc.h
nds32-asm.c	Indent labels	2020-02-26 10:37:25 +10:30
nds32-asm.h
nds32-dis.c	NDS32 disassembly of odd sized sections	2020-03-20 12:35:51 +10:30
nds32-opc.h
nfp-dis.c	Indent labels	2020-02-26 10:37:25 +10:30
nios2-dis.c	ubsan: nios2: undefined shift	2020-05-28 22:08:42 +09:30
nios2-opc.c
ns32k-dis.c	asan: ns32k: use of uninitialized value	2020-05-28 21:11:32 +09:30
opc2c.c
opintl.h	Fix spelling errors	2020-01-17 12:34:03 -06:00
or1k-asm.c	or1k: Regenerate opcodes after removing 32-bit support	2020-05-19 20:41:03 +09:00
or1k-desc.c	opcodes: support insn endianness in cgen_cpu_open	2020-06-04 16:17:42 +02:00
or1k-desc.h	or1k: Regenerate opcodes after removing 32-bit support	2020-05-19 20:41:03 +09:00
or1k-dis.c	opcodes: discriminate endianness and insn-endianness in CGEN ports	2020-06-04 16:17:42 +02:00
or1k-ibld.c	opcodes: discriminate endianness and insn-endianness in CGEN ports	2020-06-04 16:17:42 +02:00
or1k-opc.c	or1k: Regenerate opcodes after removing 32-bit support	2020-05-19 20:41:03 +09:00
or1k-opc.h	or1k: Regenerate opcodes after removing 32-bit support	2020-05-19 20:41:03 +09:00
or1k-opinst.c	or1k: Regenerate opcodes after removing 32-bit support	2020-05-19 20:41:03 +09:00
pdp11-dis.c
pdp11-opc.c
pj-dis.c
pj-opc.c
ppc-dis.c	Power10 tidies	2020-06-06 14:44:32 +09:30
ppc-opc.c	Power10 dcbf, sync, and wait extensions.	2020-05-19 18:09:51 -05:00
pru-dis.c
pru-opc.c
riscv-dis.c	RISC-V: Support debug and float CSR as the unprivileged ones.	2020-06-30 09:54:55 +08:00
riscv-opc.c	RISC-V: Report warning when linking the objects with different priv specs.	2020-06-22 10:01:14 +08:00
rl78-decode.c
rl78-decode.opc
rl78-dis.c
rx-decode.c
rx-decode.opc
rx-dis.c
s12z-dis.c	s12z disassembler tidy	2020-03-22 23:20:15 +10:30
s12z-opc.c	C++ comments	2020-06-29 10:07:56 +09:30
s12z-opc.h
s390-dis.c
s390-mkopc.c
s390-opc.c
s390-opc.txt	S/390: z13: Accept vector alignment hints	2020-05-26 18:15:41 +02:00
score7-dis.c	score formatting	2020-01-13 12:12:41 +10:30
score-dis.c	score formatting	2020-01-13 12:12:41 +10:30
score-opc.h
sh-dis.c	Fix the disassmbly of SH instructions which have an unsigned 8-bit immediate operand.	2020-04-29 13:13:55 +01:00
sh-opc.h	Also use unsigned 8-bit immediate values for the LDRC and SETRC insns.	2020-04-29 16:09:38 +01:00
sparc-dis.c	Replace "if (x) free (x)" with "free (x)", opcodes	2020-05-21 10:45:33 +09:30
sparc-opc.c
spu-dis.c
spu-opc.c
stamp-h.in
sysdep.h
tic4x-dis.c	Replace "if (x) free (x)" with "free (x)", opcodes	2020-05-21 10:45:33 +09:30
tic6x-dis.c
tic30-dis.c
tic54x-dis.c	C++ comments	2020-06-29 10:07:56 +09:30
tic54x-opc.c
tilegx-dis.c
tilegx-opc.c	ubsan: tilepro: signed integer overflow	2020-01-10 17:32:33 +10:30
tilepro-dis.c
tilepro-opc.c	ubsan: tilepro: signed integer overflow	2020-01-10 17:32:33 +10:30
v850-dis.c
v850-opc.c
vax-dis.c
visium-dis.c	Indent labels	2020-02-26 10:37:25 +10:30
visium-opc.c
wasm32-dis.c	ubsan: wasm32: signed integer overflow	2020-01-13 16:44:27 +10:30
xc16x-asm.c
xc16x-desc.c	opcodes: support insn endianness in cgen_cpu_open	2020-06-04 16:17:42 +02:00
xc16x-desc.h
xc16x-dis.c	opcodes: discriminate endianness and insn-endianness in CGEN ports	2020-06-04 16:17:42 +02:00
xc16x-ibld.c	opcodes: discriminate endianness and insn-endianness in CGEN ports	2020-06-04 16:17:42 +02:00
xc16x-opc.c
xc16x-opc.h
xgate-dis.c	C++ comments	2020-06-29 10:07:56 +09:30
xgate-opc.c
xstormy16-asm.c
xstormy16-desc.c	opcodes: support insn endianness in cgen_cpu_open	2020-06-04 16:17:42 +02:00
xstormy16-desc.h
xstormy16-dis.c	opcodes: discriminate endianness and insn-endianness in CGEN ports	2020-06-04 16:17:42 +02:00
xstormy16-ibld.c	opcodes: discriminate endianness and insn-endianness in CGEN ports	2020-06-04 16:17:42 +02:00
xstormy16-opc.c
xstormy16-opc.h
xtensa-dis.c	Replace "if (x) free (x)" with "free (x)", opcodes	2020-05-21 10:45:33 +09:30
z8k-dis.c	ubsan: z8k: left shift cannot be represented in type 'int'	2020-01-14 10:57:52 +10:30
z8k-opc.h	ubsan: z8k: index 10 out of bounds for type 'unsigned int const[10]'	2020-01-08 21:51:32 +10:30
z8kgen.c	ubsan: z8k: index 10 out of bounds for type 'unsigned int const[10]'	2020-01-08 21:51:32 +10:30
z80-dis.c	Uninitialised memory read in z80-dis.c	2020-03-25 08:54:18 +10:30