mirror of
https://sourceware.org/git/binutils-gdb.git
synced 2024-12-21 04:42:53 +08:00
1368b914e9
Now that all port tests live under testsuite/sim/*/, and none live in testsuite/ directly, flatten the structure by moving all of the dirs under testsuite/sim/ to testsuite/ directly. We need to stop passing --tool to dejagnu so that it searches all dirs and not just ones that start with "sim". Since we have no other dirs in this tree, and no plans to add any, should be fine.
104 lines
2.9 KiB
Plaintext
104 lines
2.9 KiB
Plaintext
# frv testcase for mqcpxrs $GRi,$GRj,$ACCk
|
|
# mach: all
|
|
|
|
.include "testutils.inc"
|
|
|
|
start
|
|
|
|
.global mqcpxrs
|
|
mqcpxrs:
|
|
; Positive operands
|
|
set_fr_iimmed 2,4,fr8 ; multiply small numbers
|
|
set_fr_iimmed 3,5,fr10
|
|
set_fr_iimmed 3,1,fr9 ; multiply by 0
|
|
set_fr_iimmed 2,0,fr11
|
|
mqcpxrs fr8,fr10,acc0
|
|
test_accg_immed 0xff,accg0
|
|
test_acc_immed -14,acc0
|
|
test_accg_immed 0,accg1
|
|
test_acc_immed 6,acc1
|
|
|
|
set_fr_iimmed 2,1,fr8 ; multiply by 1
|
|
set_fr_iimmed 1,1,fr10
|
|
set_fr_iimmed 0x3fff,2,fr9 ; 15 bit result
|
|
set_fr_iimmed 2,0x0007,fr11
|
|
mqcpxrs fr8,fr10,acc0
|
|
test_accg_immed 0,accg0
|
|
test_acc_immed 1,acc0
|
|
test_accg_immed 0,accg1
|
|
test_acc_limmed 0,0x7ff0,acc1
|
|
|
|
set_fr_iimmed 0x4000,2,fr8 ; 16 bit result
|
|
set_fr_iimmed 2,0x2000,fr10
|
|
set_fr_iimmed 0x7fff,0x0000,fr9 ; max positive result
|
|
set_fr_iimmed 0x7fff,0x7fff,fr11
|
|
mqcpxrs fr8,fr10,acc0
|
|
test_accg_immed 0,accg0
|
|
test_acc_limmed 0x0000,0x4000,acc0
|
|
test_accg_immed 0,accg1
|
|
test_acc_limmed 0x3fff,0x0001,acc1
|
|
|
|
; Mixed operands
|
|
set_fr_iimmed 2,0xfffd,fr8 ; multiply small numbers
|
|
set_fr_iimmed 0xfffd,1,fr10
|
|
set_fr_iimmed 0xfffe,2,fr9 ; multiply by 1
|
|
set_fr_iimmed 1,0xfffe,fr11
|
|
mqcpxrs fr8,fr10,acc0
|
|
test_accg_immed 0xff,accg0
|
|
test_acc_immed -3,acc0
|
|
test_accg_immed 0,accg1
|
|
test_acc_immed 2,acc1
|
|
|
|
set_fr_iimmed 0xfffe,0,fr8 ; multiply by 0
|
|
set_fr_iimmed 1,0xfffe,fr10
|
|
set_fr_iimmed 0x2001,0xfffe,fr9 ; 15 bit result
|
|
set_fr_iimmed 0xfffe,0xfff9,fr11
|
|
mqcpxrs fr8,fr10,acc0
|
|
test_accg_immed 0xff,accg0
|
|
test_acc_immed -2,acc0
|
|
test_accg_immed 0xff,accg1
|
|
test_acc_limmed 0xffff,0xbff0,acc1
|
|
|
|
set_fr_iimmed 0x4000,0xfffe,fr8 ; 16 bit result
|
|
set_fr_iimmed 0xfffe,0x0003,fr10
|
|
set_fr_iimmed 0x7fff,0x8000,fr9 ; max negative result
|
|
set_fr_iimmed 0x8000,0x8000,fr11
|
|
mqcpxrs fr8,fr10,acc0
|
|
test_accg_immed 0xff,accg0
|
|
test_acc_limmed 0xffff,0x8006,acc0
|
|
test_accg_immed 0xff,accg1
|
|
test_acc_limmed 0x8000,0x8000,acc1
|
|
|
|
; Negative operands
|
|
set_fr_iimmed 0x8000,0x7fff,fr8 ; max positive result
|
|
set_fr_iimmed 0x8000,0x8000,fr10
|
|
set_fr_iimmed 0xfffe,0xfffc,fr9 ; multiply small numbers
|
|
set_fr_iimmed 0xfffd,0xfffb,fr11
|
|
mqcpxrs fr8,fr10,acc0
|
|
test_accg_immed 0,accg0
|
|
test_acc_limmed 0x7fff,0x8000,acc0
|
|
test_accg_immed 0xff,accg1
|
|
test_acc_immed -14,acc1
|
|
|
|
set_fr_iimmed 0xffff,0xffff,fr8 ; multiply by -1
|
|
set_fr_iimmed 0xfffe,0xffff,fr10
|
|
set_fr_iimmed 0x7fff,0x0000,fr9 ; almost max positive result
|
|
set_fr_iimmed 0x7fff,0x8001,fr11
|
|
mqcpxrs fr8,fr10,acc0
|
|
test_accg_immed 0,accg0
|
|
test_acc_immed 1,acc0
|
|
test_accg_immed 0,accg1
|
|
test_acc_immed 0x3fff0001,acc1
|
|
|
|
set_fr_iimmed 0x8000,0x0000,fr8 ; max positive result
|
|
set_fr_iimmed 0x8000,0x8000,fr10
|
|
set_fr_iimmed 0x8000,0x0000,fr9 ; max positive result
|
|
set_fr_iimmed 0x8000,0x8000,fr11
|
|
mqcpxrs fr8,fr10,acc0
|
|
test_accg_immed 0,accg0
|
|
test_acc_immed 0x40000000,acc0
|
|
test_accg_immed 0,accg1
|
|
test_acc_immed 0x40000000,acc1
|
|
|
|
pass
|