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https://sourceware.org/git/binutils-gdb.git
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7361da2c95
bfd/ * aoutx.h (NAME (aout, machine_type)): Add mips32r6 and mips64r6. * archures.c (bfd_architecture): Likewise. * bfd-in2.h (bfd_architecture): Likewise. (bfd_reloc_code_real): Add relocs BFD_RELOC_MIPS_21_PCREL_S2, BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3 and BFD_RELOC_MIPS_19_PCREL_S2. * cpu-mips.c (arch_info_struct): Add mips32r6 and mips64r6. * elf32-mips.c: Define relocs R_MIPS_PC21_S2, R_MIPS_PC26_S2 R_MIPS_PC18_S3, R_MIPS_PC19_S2, R_MIPS_PCHI16 and R_MIPS_PCLO16. (mips_reloc_map): Add entries for BFD_RELOC_MIPS_21_PCREL_S2, BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3, BFD_RELOC_MIPS_19_PCREL_S2, BFD_RELOC_HI16_S_PCREL and BFD_RELOC_LO16_PCREL. * elf64-mips.c: Define REL, and RELA relocations R_MIPS_PC21_S2, R_MIPS_PC26_S2, R_MIPS_PC18_S3, R_MIPS_PC19_S2, R_MIPS_PCHI16 and R_MIPS_PCLO16. (mips_reloc_map): Add entries for BFD_RELOC_MIPS_21_PCREL_S2, BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3, BFD_RELOC_MIPS_19_PCREL_S2, BFD_RELOC_HI16_S_PCREL and BFD_RELOC_LO16_PCREL. * elfn32-mips.c: Likewise. * elfxx-mips.c (MIPSR6_P): New define. (mipsr6_exec_plt_entry): New array. (hi16_reloc_p): Add support for R_MIPS_PCHI16. (lo16_reloc_p): Add support for R_MIPS_PCLO16. (aligned_pcrel_reloc_p): New function. (mips_elf_relocation_needs_la25_stub): Add support for relocs: R_MIPS_PC21_S2 and R_MIPS_PC26_S2. (mips_elf_calculate_relocation): Add support for relocs: R_MIPS_PC21_S2, R_MIPS_PC26_S2, R_MIPS_PC18_S3, R_MIPS_PC19_S2, R_MIPS_PCHI16 and R_MIPS_PCLO16. (_bfd_elf_mips_mach): Add support for mips32r6 and mips64r6. (mips_elf_add_lo16_rel_addend): Add support for R_MIPS_PCHI16. (_bfd_mips_elf_check_relocs): Add support for relocs: R_MIPS_PC21_S2 and R_MIPS_PC26_S2. (_bfd_mips_elf_relocate_section): Add a check for unaligned pc relative relocs. (_bfd_mips_elf_finish_dynamic_symbol): Add support for MIPS r6 plt entry. (mips_set_isa_flags): Add support for mips32r6 and mips64r6. (_bfd_mips_elf_print_private_bfd_data): Likewise. (mips_32bit_flags_p): Add support for mips32r6. * libbfd.h (bfd_reloc_code_real_names): Add entries for BFD_RELOC_MIPS_21_PCREL_S2, BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3 and BFD_RELOC_MIPS_19_PCREL_S2. * reloc.c: Document relocs BFD_RELOC_MIPS_21_PCREL_S2, BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3 and BFD_RELOC_MIPS_19_PCREL_S2. binutils/ * readelf.c (get_machine_flags): Add support for mips32r6 and mips64r6. elfcpp/ * mips.h (E_MIPS_ARCH_32R6, E_MIPS_ARCH_64R6): New enum constants. gas/ * config/tc-mips.c (mips_nan2008): New static global. (mips_flag_nan2008): Removed. (LL_SC_FMT): New define. (COP12_FMT): Updated. (ISA_IS_R6): New define. (ISA_HAS_64BIT_REGS): Add mips64r6. (ISA_HAS_DROR): Likewise. (ISA_HAS_64BIT_FPRS): Add mips32r6 and mips64r6. (ISA_HAS_ROR): Likewise. (ISA_HAS_ODD_SINGLE_FPR): Likewise. (ISA_HAS_MXHC1): Likewise. (hilo_interlocks): Likewise. (md_longopts): Likewise. (ISA_HAS_LEGACY_NAN): New define. (options): Add OPTION_MIPS32R6 and OPTION_MIPS64R6. (mips_ase): Add field rem_rev. (mips_ases): Updated to add which ISA an ASE was removed in. (mips_isa_rev): Add support for mips32r6 and mips64r6. (mips_check_isa_supports_ase): Add support to check if an ASE has been removed in the specified MIPS ISA revision. (validate_mips_insn): Skip '-' character. (macro_build): Likewise. (mips_check_options): Prevent R6 working with fp32, mips16, micromips, or branch relaxation. (file_mips_check_options): Set R6 floating point registers to 64 bit. Also deal with the nan2008 option. (limited_pcrel_reloc_p): Add relocs: BFD_RELOC_MIPS_21_PCREL_S2, BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3, BFD_RELOC_MIPS_19_PCREL_S2, BFD_RELOC_HI16_S_PCREL and BFD_RELOC_LO16_PCREL. (operand_reg_mask): Add support for OP_SAME_RS_RT, OP_CHECK_PREV and OP_NON_ZERO_REG. (match_check_prev_operand): New static function. (match_same_rs_rt_operand): New static function. (match_non_zero_reg_operand): New static function. (match_operand): Added entries for: OP_SAME_RS_RT, OP_CHECK_PREV and OP_NON_ZERO_REG. (insns_between): Added case to deal with forbidden slots. (append_insn): Added support for relocs: BFD_RELOC_MIPS_21_PCREL_S2 and BFD_RELOC_MIPS_26_PCREL_S2. (match_insn): Add support for operands -A, -B, +' and +". Also skip '-' character. (mips_percent_op): Add entries for %pcrel_hi and %pcrel_lo. (md_parse_option): Add support for mips32r6 and mips64r6. Also update the nan option handling. (md_pcrel_from): Add cases for relocs: BFD_RELOC_MIPS_21_PCREL_S2, BFD_RELOC_MIPS_26_PCREL_S2. (mips_force_relocation): Prevent forced relaxation for MIPS r6. (md_apply_fix): Add support for relocs: BFD_RELOC_MIPS_21_PCREL_S2, BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3, BFD_RELOC_MIPS_19_PCREL_S2, BFD_RELOC_HI16_S_PCREL and BFD_RELOC_LO16_PCREL. (s_mipsset): Add support for mips32r6 and mips64r6. (s_nan): Update to support the new nan2008 framework. (tc_gen_reloc): Add relocs: BFD_RELOC_MIPS_21_PCREL_S2, BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3, BFD_RELOC_MIPS_19_PCREL_S2, BFD_RELOC_HI16_S_PCREL and BFD_RELOC_LO16_PCREL. (mips_elf_final_processing): Updated to use the mips_nan2008. (mips_cpu_info_table): Add entries for mips32r6 and mips64r6. (macro): Enable ldc2, sdc2, ll, lld, swc2, sc, scd, cache, pref macros for R6. (mips_fix_adjustable): Make PC relative R6 relocations relative to the symbol and not the section. * configure.ac: Add support for mips32r6 and mips64r6. * configure: Regenerate. * doc/c-mips.texi: Document the -mips32r6 and -mips64r6 command line options. * doc/as.texinfo: Likewise. gas/testsuite/ * gas/mips/24k-triple-stores-1.s: If testing for r6 prevent non-supported instructions from being tested. * gas/mips/24k-triple-stores-2.s: Likewise. * gas/mips/24k-triple-stores-3.s: Likewise. * gas/mips/24k-triple-stores-6.s: Likewise. * gas/mips/beq.s: Likewise. * gas/mips/eva.s: Likewise. * gas/mips/ld-zero-3.s: Likewise. * gas/mips/mips32-cp2.s: Likewise. * gas/mips/mips32.s: Likewise. * gas/mips/mips4.s: Likewise. * gas/mips/add.s: Don't test the add instructions if r6, and add padding. * gas/mips/add.d: Check for a triple dot not a nop at the end of the disassembly output. * gas/mips/micromips@add.d: Likewise. * gas/mips/mipsr6@24k-branch-delay-1.d: New file. * gas/mips/mipsr6@24k-triple-stores-1.d: New file. * gas/mips/mipsr6@24k-triple-stores-2-llsc.d: New file. * gas/mips/mipsr6@24k-triple-stores-2.d: New file. * gas/mips/mipsr6@24k-triple-stores-3.d: New file. * gas/mips/mipsr6@24k-triple-stores-6.d: New file. * gas/mips/mipsr6@add.d: New file. * gas/mips/mipsr6@attr-gnu-4-1-msingle-float.l: New file. * gas/mips/mipsr6@attr-gnu-4-1-msingle-float.s: New file. * gas/mips/mipsr6@attr-gnu-4-1-msoft-float.l: New file. * gas/mips/mipsr6@attr-gnu-4-1-msoft-float.s: New file. * gas/mips/mipsr6@attr-gnu-4-2-mdouble-float.l: New file. * gas/mips/mipsr6@attr-gnu-4-2-mdouble-float.s: New file. * gas/mips/mipsr6@beq.d: New file. * gas/mips/mipsr6@bge.d: New file. * gas/mips/mipsr6@bgeu.d: New file. * gas/mips/mipsr6@blt.d: New file. * gas/mips/mipsr6@bltu.d: New file. * gas/mips/mipsr6@branch-misc-1.d: New file. * gas/mips/mipsr6@branch-misc-2-64.d: New file. * gas/mips/mipsr6@branch-misc-2pic-64.d: New file. * gas/mips/mipsr6@branch-misc-4-64.d: New file. * gas/mips/mipsr6@cache.d: New file. * gas/mips/mipsr6@eva.d: New file. * gas/mips/mipsr6@jal-svr4pic-noreorder.d: New file. * gas/mips/mipsr6@jal-svr4pic.d: New file. * gas/mips/mipsr6@ld-zero-2.d: New file. * gas/mips/mipsr6@ld-zero-3.d: New file. * gas/mips/mipsr6@loc-swap-dis.d: New file. * gas/mips/mipsr6@mips32-cp2.d: New file. * gas/mips/mipsr6@mips32-imm.d: New file. * gas/mips/mipsr6@mips32.d: New file. * gas/mips/mipsr6@mips32r2.d: New file. * gas/mips/mipsr6@mips4-fp.d: New file. * gas/mips/mipsr6@mips4-fp.l: New file. * gas/mips/mipsr6@mips4-fp.s: New file. * gas/mips/mipsr6@mips4.d: New file. * gas/mips/mipsr6@mips5-fp.d: New file. * gas/mips/mipsr6@mips5-fp.l: New file. * gas/mips/mipsr6@mips5-fp.s: New file. * gas/mips/mipsr6@mips64.d: New file. * gas/mips/mipsr6@msa-branch.d: New file. * gas/mips/mipsr6@msa.d: New file. * gas/mips/mipsr6@pref.d: New file. * gas/mips/mipsr6@relax-swap3.d: New file. * gas/mips/r6-64-n32.d: New file. * gas/mips/r6-64-n64.d: New file. * gas/mips/r6-64-removed.l: New file. * gas/mips/r6-64-removed.s: New file. * gas/mips/r6-64.s: New file. * gas/mips/r6-attr-none-double.d: New file. * gas/mips/r6-n32.d: New file. * gas/mips/r6-n64.d: New file. * gas/mips/r6-removed.l: New file. * gas/mips/r6-removed.s: New file. * gas/mips/r6.d: New file. * gas/mips/r6.s: New file. * gas/mips/mipsr6@mips32-dsp.d: New file. * gas/mips/mipsr6@mips32-dspr2.d: New file. * gas/mips/mipsr6@mips32r2-ill.l: New file. * gas/mips/mipsr6@mips32r2-ill.s: New file. * gas/mips/cache.s: Add r6 instruction varients. * gas/mips/mips.exp: Add support for the mips32r6 and mips64r6 architectures. Also prevent non r6 supported tests from running. Finally, add in support for running the new r6 tests. (run_dump_test_arch): Add support for mipsr6 tests. (run_list_test_arch): Add support for using files of the form arch@testname.l . include/elf/ * mips.h: Add relocs: R_MIPS_PC21_S2, R_MIPS_PC26_S2, R_MIPS_PC18_S3, R_MIPS_PC19_S2, R_MIPS_PCHI16 and R_MIPS_PCLO16. (E_MIPS_ARCH_32R6): New define. (E_MIPS_ARCH_64R6): New define. include/opcode/ * mips.h (mips_operand_type): Add new entries: OP_SAME_RS_RT, OP_CHECK_PREV and OP_NON_ZERO_REG. Add descriptions for the MIPS R6 instruction arguments: -a, -b, -d, -s, -t, -u, -v, -w, -x, -y, -A, -B, +I, +O, +R, +:, +\, +", +; (mips_check_prev_operand): New struct. (INSN2_FORBIDDEN_SLOT): New define. (INSN_ISA32R6): New define. (INSN_ISA64R6): New define. (INSN_UPTO32R6): New define. (INSN_UPTO64R6): New define. (mips_isa_table): Add INSN_UPTO32R6 and INSN_UPTO64R6. (ISA_MIPS32R6): New define. (ISA_MIPS64R6): New define. (CPU_MIPS32R6): New define. (CPU_MIPS64R6): New define. (cpu_is_member): Add cases for CPU_MIPS32R6, and CPU_MIPS64R6. ld/ * ldmain.c (get_emulation): Add support for -mips32r6 and -mips64r6. opcodes/ * mips-dis.c (mips_arch_choices): Add entries for mips32r6 and mips64r6. (parse_mips_dis_option): Allow MSA and virtualization support for mips64r6. (mips_print_arg_state): Add fields dest_regno and seen_dest. (mips_seen_register): New function. (print_insn_arg): Refactored code to use mips_seen_register function. Add support for OP_SAME_RS_RT, OP_CHECK_PREV and OP_NON_ZERO_REG. Changed OP_REPEAT_DEST_REG case to print out the register rather than aborting. (print_insn_args): Add length argument. Add code to correctly calculate the instruction address for pc relative instructions. (validate_insn_args): New static function. (print_insn_mips): Prevent jalx disassembling for r6. Use validate_insn_args. (print_insn_micromips): Use validate_insn_args. all the arguments are valid. * mips-formats.h (PREV_CHECK): New define. * mips-opc.c (decode_mips_operand): Add support for -a, -b, -d, -s, -t, -u, -v, -w, -x, -y, -A, -B, +I, +O, +R, +:, +\, +", +; (RD_pc): New define. (FS): New define. (I37): New define. (I69): New define. (mips_builtin_opcodes): Add MIPS R6 instructions. Exclude recoded MIPS R6 instructions from MIPS R2 instructions.
145 lines
4.1 KiB
C
145 lines
4.1 KiB
C
/* mips-formats.h
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Copyright (C) 2013-2014 Free Software Foundation, Inc.
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This library is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
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any later version.
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It is distributed in the hope that it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; see the file COPYING3. If not,
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see <http://www.gnu.org/licenses/>. */
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/* For ARRAY_SIZE. */
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#include "libiberty.h"
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#define INT_ADJ(SIZE, LSB, MAX_VAL, SHIFT, PRINT_HEX) \
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{ \
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static const struct mips_int_operand op = { \
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{ OP_INT, SIZE, LSB }, MAX_VAL, 0, SHIFT, PRINT_HEX \
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}; \
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return &op.root; \
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}
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#define UINT(SIZE, LSB) \
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INT_ADJ(SIZE, LSB, (1 << (SIZE)) - 1, 0, FALSE)
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#define SINT(SIZE, LSB) \
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INT_ADJ(SIZE, LSB, (1 << ((SIZE) - 1)) - 1, 0, FALSE)
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#define HINT(SIZE, LSB) \
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INT_ADJ(SIZE, LSB, (1 << (SIZE)) - 1, 0, TRUE)
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#define BIT(SIZE, LSB, BIAS) \
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{ \
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static const struct mips_int_operand op = { \
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{ OP_INT, SIZE, LSB }, (1 << (SIZE)) - 1, BIAS, 0, TRUE \
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}; \
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return &op.root; \
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}
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#define MAPPED_INT(SIZE, LSB, MAP, PRINT_HEX) \
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{ \
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typedef char ATTRIBUTE_UNUSED \
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static_assert[(1 << (SIZE)) == ARRAY_SIZE (MAP)]; \
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static const struct mips_mapped_int_operand op = { \
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{ OP_MAPPED_INT, SIZE, LSB }, MAP, PRINT_HEX \
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}; \
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return &op.root; \
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}
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#define MSB(SIZE, LSB, BIAS, ADD_LSB, OPSIZE) \
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{ \
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static const struct mips_msb_operand op = { \
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{ OP_MSB, SIZE, LSB }, BIAS, ADD_LSB, OPSIZE \
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}; \
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return &op.root; \
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}
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#define REG(SIZE, LSB, BANK) \
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{ \
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static const struct mips_reg_operand op = { \
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{ OP_REG, SIZE, LSB }, OP_REG_##BANK, 0 \
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}; \
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return &op.root; \
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}
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#define OPTIONAL_REG(SIZE, LSB, BANK) \
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{ \
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static const struct mips_reg_operand op = { \
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{ OP_OPTIONAL_REG, SIZE, LSB }, OP_REG_##BANK, 0 \
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}; \
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return &op.root; \
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}
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#define MAPPED_REG(SIZE, LSB, BANK, MAP) \
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{ \
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typedef char ATTRIBUTE_UNUSED \
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static_assert[(1 << (SIZE)) == ARRAY_SIZE (MAP)]; \
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static const struct mips_reg_operand op = { \
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{ OP_REG, SIZE, LSB }, OP_REG_##BANK, MAP \
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}; \
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return &op.root; \
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}
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#define OPTIONAL_MAPPED_REG(SIZE, LSB, BANK, MAP) \
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{ \
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typedef char ATTRIBUTE_UNUSED \
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static_assert[(1 << (SIZE)) == ARRAY_SIZE (MAP)]; \
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static const struct mips_reg_operand op = { \
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{ OP_OPTIONAL_REG, SIZE, LSB }, OP_REG_##BANK, MAP \
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}; \
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return &op.root; \
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}
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#define REG_PAIR(SIZE, LSB, BANK, MAP) \
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{ \
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typedef char ATTRIBUTE_UNUSED \
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static_assert1[(1 << (SIZE)) == ARRAY_SIZE (MAP##1)]; \
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typedef char ATTRIBUTE_UNUSED \
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static_assert2[(1 << (SIZE)) == ARRAY_SIZE (MAP##2)]; \
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static const struct mips_reg_pair_operand op = { \
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{ OP_REG_PAIR, SIZE, LSB }, OP_REG_##BANK, MAP##1, MAP##2 \
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}; \
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return &op.root; \
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}
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#define PCREL(SIZE, LSB, IS_SIGNED, SHIFT, ALIGN_LOG2, INCLUDE_ISA_BIT, \
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FLIP_ISA_BIT) \
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{ \
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static const struct mips_pcrel_operand op = { \
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{ { OP_PCREL, SIZE, LSB }, \
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(1 << ((SIZE) - (IS_SIGNED))) - 1, 0, SHIFT, TRUE }, \
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ALIGN_LOG2, INCLUDE_ISA_BIT, FLIP_ISA_BIT \
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}; \
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return &op.root.root; \
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}
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#define JUMP(SIZE, LSB, SHIFT) \
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PCREL (SIZE, LSB, FALSE, SHIFT, SIZE + SHIFT, TRUE, FALSE)
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#define JALX(SIZE, LSB, SHIFT) \
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PCREL (SIZE, LSB, FALSE, SHIFT, SIZE + SHIFT, TRUE, TRUE)
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#define BRANCH(SIZE, LSB, SHIFT) \
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PCREL (SIZE, LSB, TRUE, SHIFT, 0, TRUE, FALSE)
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#define SPECIAL(SIZE, LSB, TYPE) \
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{ \
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static const struct mips_operand op = { OP_##TYPE, SIZE, LSB }; \
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return &op; \
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}
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#define PREV_CHECK(SIZE, LSB, GT_OK, LT_OK, EQ_OK, ZERO_OK) \
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{ \
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static const struct mips_check_prev_operand op = { \
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{ OP_CHECK_PREV, SIZE, LSB }, GT_OK, LT_OK, EQ_OK, ZERO_OK \
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}; \
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return &op.root; \
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}
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