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The h8300 sim has its own implementation for memory handling that I'd like to replace with the common sim memory code. However, it's got a weird bit of code it calls "eightbit mem" that makes this not as easy as it would otherwise be. The code has this comment: /* These define the size of main memory for the simulator. Note the size of main memory for the H8/300H is only 256k. Keeping it small makes the simulator run much faster and consume less memory. The linker knows about the limited size of the simulator's main memory on the H8/300H (via the h8300h.sc linker script). So if you change H8300H_MSIZE, be sure to fix the linker script too. Also note that there's a separate "eightbit" area aside from main memory. For simplicity, the simulator assumes any data memory reference outside of main memory refers to the eightbit area (in theory, this can only happen when simulating H8/300H programs). We make no attempt to catch overlapping addresses, wrapped addresses, etc etc. */ I've read the H8/300 Programming Manual and the H8/300H Software Manual and can't find documentation on it. The closest I can find is the bits about the exception vectors, but that sounds like a convention where the first 256 bytes of memory are used for a special purpose. The sim will actually allocate a sep memory buffer of 256 bytes and you address it by accessing anywhere outside of main memory. e.g. I would expect code to access it like: uint32_t *data = (void *)0; data[0] = reset_exception_vector; not like the sim expects like: uint8_t *data = (void *)0x1000000; data[0] = ...; The gcc manual has an "eightbit_data" attribute: Use this attribute on the H8/300, H8/300H, and H8S to indicate that the specified variable should be placed into the eight-bit data section. The compiler generates more efficient code for certain operations on data in the eight-bit data area. Note the eight-bit data area is limited to 256 bytes of data. And the gcc code implies that it's accessed via special addressing: eightbit_data: This variable lives in the 8-bit data area and can be referenced with 8-bit absolute memory addresses. I'm fairly certain these are referring to the 8-bit addressing modes that allow access to 0xff00 - 0xffff with only an 8-bit immediate. They aren't completely separate address spaces which this eightbit memory buffer occupies. But the sim doesn't access its eightbit memory based on specific insns, it does it purely on the addresses requested. Unfortunately, much of this code was authored by Michael Snyder, so I can't ask him :(. I asked Renesas support and they didn't know: https://renesasrulz.com/the_vault/f/archive-forum/6952/question-about-eightbit-memory So I've come to the conclusion that this was a little sim-specific hack done for <some convenience> and has no relation to real hardware. And as such, let's drop it until someone notices and can provide a reason for why we need to support it.
161 lines
4.3 KiB
C
161 lines
4.3 KiB
C
/* Main header for the Hitachi h8/300 architecture. */
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#include "config.h"
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#include "bfd.h"
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#ifndef SIM_MAIN_H
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#define SIM_MAIN_H
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#define DEBUG
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/* These define the size of main memory for the simulator.
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Note the size of main memory for the H8/300H is only 256k. Keeping it
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small makes the simulator run much faster and consume less memory.
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The linker knows about the limited size of the simulator's main memory
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on the H8/300H (via the h8300h.sc linker script). So if you change
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H8300H_MSIZE, be sure to fix the linker script too.
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Also note that there's a separate "eightbit" area aside from main
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memory. For simplicity, the simulator assumes any data memory reference
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outside of main memory refers to the eightbit area (in theory, this
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can only happen when simulating H8/300H programs). We make no attempt
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to catch overlapping addresses, wrapped addresses, etc etc. */
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#define H8300_MSIZE (1 << 16)
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/* avolkov:
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Next 2 macros are ugly for any workstation, but while they're work.
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Memory size MUST be configurable. */
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#define H8300H_MSIZE (1 << 24)
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#define H8300S_MSIZE (1 << 24)
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#define CSIZE 1024
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enum h8_regnum {
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R0_REGNUM = 0,
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R1_REGNUM = 1,
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R2_REGNUM = 2,
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R3_REGNUM = 3,
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R4_REGNUM = 4,
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R5_REGNUM = 5,
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R6_REGNUM = 6,
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R7_REGNUM = 7,
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SP_REGNUM = R7_REGNUM, /* Contains address of top of stack */
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FP_REGNUM = R6_REGNUM, /* Contains address of executing
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stack frame */
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CCR_REGNUM = 8, /* Contains processor status */
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PC_REGNUM = 9, /* Contains program counter */
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CYCLE_REGNUM = 10,
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EXR_REGNUM = 11,
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INST_REGNUM = 12,
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TICK_REGNUM = 13,
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MACH_REGNUM = 14,
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MACL_REGNUM = 15,
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SBR_REGNUM = 16,
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VBR_REGNUM = 17,
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ZERO_REGNUM = 18
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};
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enum h8_typecodes {
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OP_NULL,
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OP_REG, /* Register direct. */
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OP_LOWREG, /* Special reg syntax for "bra". */
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OP_DISP, /* Register indirect w/displacement. */
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/* Note: h8300, h8300h, and h8300s permit only pre-decr and post-incr. */
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OP_PREDEC, /* Register indirect w/pre-decrement. */
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OP_POSTDEC, /* Register indirect w/post-decrement. */
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OP_PREINC, /* Register indirect w/pre-increment. */
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OP_POSTINC, /* Register indirect w/post-increment. */
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OP_PCREL, /* PC Relative. */
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OP_MEM, /* Absolute memory address. */
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OP_CCR, /* Condition Code Register. */
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OP_IMM, /* Immediate value. */
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/*OP_ABS*/ /* Un-used (duplicates op_mem?). */
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OP_EXR, /* EXtended control Register. */
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OP_SBR, /* Vector Base Register. */
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OP_VBR, /* Short-address Base Register. */
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OP_MACH, /* Multiply Accumulator - high. */
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OP_MACL, /* Multiply Accumulator - low. */
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/* FIXME: memory indirect? */
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OP_INDEXB, /* Byte index mode */
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OP_INDEXW, /* Word index mode */
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OP_INDEXL /* Long index mode */
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};
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#include "sim-basics.h"
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#include "sim-base.h"
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/* Structure used to describe addressing */
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typedef struct
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{
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int type;
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int reg;
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int literal;
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} ea_type;
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/* Struct for instruction decoder. */
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typedef struct
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{
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ea_type src;
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ea_type dst;
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ea_type op3;
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int opcode;
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int next_pc;
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int oldpc;
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int cycles;
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#ifdef DEBUG
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struct h8_opcode *op;
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#endif
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} decoded_inst;
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struct _sim_cpu {
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unsigned int regs[20]; /* 8 GR's plus ZERO, SBR, and VBR. */
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unsigned int pc;
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int macS; /* MAC Saturating mode */
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int macV; /* MAC Overflow */
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int macN; /* MAC Negative */
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int macZ; /* MAC Zero */
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int delayed_branch;
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char **command_line; /* Pointer to command line arguments. */
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unsigned char *memory;
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int mask;
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sim_cpu_base base;
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};
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/* The sim_state struct. */
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struct sim_state {
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sim_cpu *cpu[MAX_NR_PROCESSORS];
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unsigned long memory_size;
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#ifdef ADEBUG
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int stats[O_LAST];
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#endif
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sim_state_base base;
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};
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/* The current state of the processor; registers, memory, etc. */
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#define cpu_set_pc(CPU, VAL) (((CPU)->pc) = (VAL))
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#define cpu_get_pc(CPU) (((CPU)->pc))
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/* Magic numbers used to distinguish an exit from a breakpoint. */
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#define LIBC_EXIT_MAGIC1 0xdead
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#define LIBC_EXIT_MAGIC2 0xbeef
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/* Local version of macros for decoding exit status.
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(included here rather than try to find target version of wait.h)
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*/
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#define SIM_WIFEXITED(V) (((V) & 0xff) == 0)
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#define SIM_WIFSTOPPED(V) (!SIM_WIFEXITED (V))
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#define SIM_WEXITSTATUS(V) (((V) >> 8) & 0xff)
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#define SIM_WSTOPSIG(V) ((V) & 0x7f)
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#endif /* SIM_MAIN_H */
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