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535 lines
11 KiB
C
535 lines
11 KiB
C
/* HP PA-RISC SOM object file format: definitions internal to BFD.
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Copyright (C) 1990, 91, 92, 93, 94 Free Software Foundation, Inc.
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Contributed by the Center for Software Science at the
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University of Utah (pa-gdb-bugs@cs.utah.edu).
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This file is part of BFD, the Binary File Descriptor library.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
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#ifndef _HPPA_H
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#define _HPPA_H
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#define BYTES_IN_WORD 4
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#define PA_PAGESIZE 0x1000
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#ifndef INLINE
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#ifdef __GNUC__
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#define INLINE inline
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#else
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#define INLINE
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#endif /* GNU C? */
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#endif /* INLINE */
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/* HP PA-RISC relocation types */
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enum hppa_reloc_field_selector_type
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{
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R_HPPA_FSEL = 0x0,
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R_HPPA_LSSEL = 0x1,
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R_HPPA_RSSEL = 0x2,
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R_HPPA_LSEL = 0x3,
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R_HPPA_RSEL = 0x4,
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R_HPPA_LDSEL = 0x5,
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R_HPPA_RDSEL = 0x6,
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R_HPPA_LRSEL = 0x7,
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R_HPPA_RRSEL = 0x8,
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R_HPPA_PSEL = 0x9,
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R_HPPA_LPSEL = 0xa,
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R_HPPA_RPSEL = 0xb,
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R_HPPA_TSEL = 0xc,
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R_HPPA_LTSEL = 0xd,
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R_HPPA_RTSEL = 0xe
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};
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/* /usr/include/reloc.h defines these to constants. We want to use
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them in enums, so #undef them before we start using them. We might
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be able to fix this another way by simply managing not to include
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/usr/include/reloc.h, but currently GDB picks up these defines
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somewhere. */
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#undef e_fsel
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#undef e_lssel
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#undef e_rssel
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#undef e_lsel
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#undef e_rsel
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#undef e_ldsel
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#undef e_rdsel
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#undef e_lrsel
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#undef e_rrsel
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#undef e_psel
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#undef e_lpsel
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#undef e_rpsel
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#undef e_tsel
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#undef e_ltsel
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#undef e_rtsel
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#undef e_one
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#undef e_two
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#undef e_pcrel
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#undef e_con
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#undef e_plabel
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#undef e_abs
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/* for compatibility */
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enum hppa_reloc_field_selector_type_alt
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{
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e_fsel = R_HPPA_FSEL,
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e_lssel = R_HPPA_LSSEL,
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e_rssel = R_HPPA_RSSEL,
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e_lsel = R_HPPA_LSEL,
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e_rsel = R_HPPA_RSEL,
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e_ldsel = R_HPPA_LDSEL,
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e_rdsel = R_HPPA_RDSEL,
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e_lrsel = R_HPPA_LRSEL,
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e_rrsel = R_HPPA_RRSEL,
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e_psel = R_HPPA_PSEL,
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e_lpsel = R_HPPA_LPSEL,
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e_rpsel = R_HPPA_RPSEL,
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e_tsel = R_HPPA_TSEL,
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e_ltsel = R_HPPA_LTSEL,
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e_rtsel = R_HPPA_RTSEL
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};
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enum hppa_reloc_expr_type
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{
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R_HPPA_E_ONE = 0,
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R_HPPA_E_TWO = 1,
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R_HPPA_E_PCREL = 2,
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R_HPPA_E_CON = 3,
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R_HPPA_E_PLABEL = 7,
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R_HPPA_E_ABS = 18
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};
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/* for compatibility */
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enum hppa_reloc_expr_type_alt
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{
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e_one = R_HPPA_E_ONE,
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e_two = R_HPPA_E_TWO,
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e_pcrel = R_HPPA_E_PCREL,
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e_con = R_HPPA_E_CON,
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e_plabel = R_HPPA_E_PLABEL,
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e_abs = R_HPPA_E_ABS
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};
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/* Relocations for function calls must be accompanied by parameter
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relocation bits. These bits describe exactly where the caller has
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placed the function's arguments and where it expects to find a return
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value.
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Both ELF and SOM encode this information within the addend field
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of the call relocation. (Note this could break very badly if one
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was to make a call like bl foo + 0x12345678).
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The high order 10 bits contain parameter relocation information,
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the low order 22 bits contain the constant offset. */
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#define HPPA_R_ARG_RELOC(a) (((a) >> 22) & 0x3FF)
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#define HPPA_R_CONSTANT(a) ((((int)(a)) << 10) >> 10)
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#define HPPA_R_ADDEND(r,c) (((r) << 22) + ((c) & 0x3FFFFF))
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/* Some functions to manipulate PA instructions. */
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static INLINE unsigned int
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assemble_3 (x)
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unsigned int x;
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{
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return (((x & 1) << 2) | ((x & 6) >> 1)) & 7;
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}
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static INLINE void
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dis_assemble_3 (x, r)
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unsigned int x;
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unsigned int *r;
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{
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*r = (((x & 4) >> 2) | ((x & 3) << 1)) & 7;
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}
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static INLINE unsigned int
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assemble_12 (x, y)
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unsigned int x, y;
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{
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return (((y & 1) << 11) | ((x & 1) << 10) | ((x & 0x7fe) >> 1)) & 0xfff;
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}
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static INLINE void
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dis_assemble_12 (as12, x, y)
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unsigned int as12;
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unsigned int *x, *y;
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{
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*y = (as12 & 0x800) >> 11;
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*x = ((as12 & 0x3ff) << 1) | ((as12 & 0x400) >> 10);
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}
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static INLINE unsigned long
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assemble_17 (x, y, z)
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unsigned int x, y, z;
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{
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unsigned long temp;
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temp = ((z & 1) << 16) |
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((x & 0x1f) << 11) |
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((y & 1) << 10) |
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((y & 0x7fe) >> 1);
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return temp & 0x1ffff;
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}
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static INLINE void
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dis_assemble_17 (as17, x, y, z)
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unsigned int as17;
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unsigned int *x, *y, *z;
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{
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*z = (as17 & 0x10000) >> 16;
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*x = (as17 & 0x0f800) >> 11;
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*y = (((as17 & 0x00400) >> 10) | ((as17 & 0x3ff) << 1)) & 0x7ff;
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}
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static INLINE unsigned long
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assemble_21 (x)
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unsigned int x;
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{
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unsigned long temp;
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temp = ((x & 1) << 20) |
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((x & 0xffe) << 8) |
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((x & 0xc000) >> 7) |
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((x & 0x1f0000) >> 14) |
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((x & 0x003000) >> 12);
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return temp & 0x1fffff;
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}
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static INLINE void
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dis_assemble_21 (as21, x)
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unsigned int as21, *x;
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{
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unsigned long temp;
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temp = (as21 & 0x100000) >> 20;
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temp |= (as21 & 0x0ffe00) >> 8;
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temp |= (as21 & 0x000180) << 7;
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temp |= (as21 & 0x00007c) << 14;
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temp |= (as21 & 0x000003) << 12;
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*x = temp;
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}
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static INLINE unsigned long
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sign_ext (x, len)
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unsigned int x, len;
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{
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return (x << (32 - len)) >> (32 - len);
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}
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static INLINE unsigned int
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ones (n)
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int n;
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{
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unsigned int len_ones;
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int i;
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i = 0;
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len_ones = 0;
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while (i < n)
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{
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len_ones = (len_ones << 1) | 1;
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i++;
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}
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return len_ones;
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}
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static INLINE void
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sign_unext (x, len, result)
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unsigned int x, len;
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unsigned int *result;
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{
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unsigned int len_ones;
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len_ones = ones (len);
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*result = x & len_ones;
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}
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static INLINE unsigned long
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low_sign_ext (x, len)
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unsigned int x, len;
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{
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unsigned int temp1, temp2;
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unsigned int len_ones;
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len_ones = ones (len);
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temp1 = (x & 1) << (len - 1);
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temp2 = ((x & 0xfffffffe) & len_ones) >> 1;
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return sign_ext ((temp1 | temp2), len);
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}
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static INLINE void
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low_sign_unext (x, len, result)
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unsigned int x, len;
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unsigned int *result;
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{
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unsigned int temp;
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unsigned int sign;
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unsigned int rest;
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unsigned int one_bit_at_len;
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unsigned int len_ones;
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len_ones = ones (len);
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one_bit_at_len = 1 << (len - 1);
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sign_unext (x, len, &temp);
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sign = temp & one_bit_at_len;
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sign >>= (len - 1);
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rest = temp & (len_ones ^ one_bit_at_len);
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rest <<= 1;
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*result = rest | sign;
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}
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/* Handle field selectors for PA instructions. */
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static INLINE unsigned long
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hppa_field_adjust (value, constant_value, r_field)
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unsigned long value;
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unsigned long constant_value;
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unsigned short r_field;
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{
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switch (r_field)
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{
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case e_fsel: /* F : no change */
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break;
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case e_lssel: /* LS : if (bit 21) then add 0x800
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arithmetic shift right 11 bits */
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if (value & 0x00000400)
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value += 0x800;
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value = (value & 0xfffff800) >> 11;
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break;
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case e_rssel: /* RS : Sign extend from bit 21 */
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if (value & 0x00000400)
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value |= 0xfffff800;
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else
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value &= 0x7ff;
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break;
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case e_lsel: /* L : Arithmetic shift right 11 bits */
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value = (value & 0xfffff800) >> 11;
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break;
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case e_rsel: /* R : Set bits 0-20 to zero */
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value = value & 0x7ff;
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break;
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case e_ldsel: /* LD : Add 0x800, arithmetic shift
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right 11 bits */
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value += 0x800;
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value = (value & 0xfffff800) >> 11;
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break;
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case e_rdsel: /* RD : Set bits 0-20 to one */
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value |= 0xfffff800;
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break;
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case e_lrsel: /* LR : L with "rounded" constant */
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value = value + ((constant_value + 0x1000) & 0xffffe000);
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value = (value & 0xfffff800) >> 11;
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break;
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case e_rrsel: /* RR : R with "rounded" constant */
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value = value + ((constant_value + 0x1000) & 0xffffe000);
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value = (value & 0x7ff) + constant_value - ((constant_value + 0x1000) & 0xffffe000);
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break;
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default:
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abort ();
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}
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return value;
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}
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/* PA-RISC OPCODES */
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#define get_opcode(insn) ((insn) & 0xfc000000) >> 26
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/* FIXME: this list is incomplete. It should also be an enumerated
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type rather than #defines. */
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#define LDO 0x0d
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#define LDB 0x10
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#define LDH 0x11
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#define LDW 0x12
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#define LDWM 0x13
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#define STB 0x18
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#define STH 0x19
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#define STW 0x1a
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#define STWM 0x1b
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#define COMICLR 0x24
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#define SUBI 0x25
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#define SUBIO 0x25
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#define ADDIT 0x2c
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#define ADDITO 0x2c
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#define ADDI 0x2d
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#define ADDIO 0x2d
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#define LDIL 0x08
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#define ADDIL 0x0a
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#define MOVB 0x32
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#define MOVIB 0x33
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#define COMBT 0x20
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#define COMBF 0x22
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#define COMIBT 0x21
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#define COMIBF 0x23
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#define ADDBT 0x28
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#define ADDBF 0x2a
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#define ADDIBT 0x29
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#define ADDIBF 0x2b
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#define BVB 0x30
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#define BB 0x31
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#define BL 0x3a
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#define BLE 0x39
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#define BE 0x38
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/* Given a machine instruction, return its format.
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FIXME: opcodes which do not map to a known format
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should return an error of some sort. */
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static char
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bfd_hppa_insn2fmt (insn)
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unsigned long insn;
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{
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char fmt = -1;
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unsigned char op = get_opcode (insn);
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switch (op)
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{
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case ADDI:
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case ADDIT:
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case SUBI:
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fmt = 11;
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break;
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case MOVB:
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case MOVIB:
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case COMBT:
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case COMBF:
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case COMIBT:
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case COMIBF:
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case ADDBT:
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case ADDBF:
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case ADDIBT:
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case ADDIBF:
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case BVB:
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case BB:
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fmt = 12;
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break;
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case LDO:
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case LDB:
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case LDH:
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case LDW:
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case LDWM:
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case STB:
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case STH:
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case STW:
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case STWM:
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fmt = 14;
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break;
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case BL:
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case BE:
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case BLE:
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fmt = 17;
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break;
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case LDIL:
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case ADDIL:
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fmt = 21;
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break;
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default:
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fmt = 32;
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break;
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}
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return fmt;
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}
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/* Insert VALUE into INSN using R_FORMAT to determine exactly what
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bits to change. */
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static unsigned long
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hppa_rebuild_insn (abfd, insn, value, r_format)
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bfd *abfd;
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unsigned long insn;
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unsigned long value;
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unsigned long r_format;
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{
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unsigned long const_part;
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unsigned long rebuilt_part;
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switch (r_format)
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{
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case 11:
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{
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unsigned w1, w;
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const_part = insn & 0xffffe002;
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dis_assemble_12 (value, &w1, &w);
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rebuilt_part = (w1 << 2) | w;
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return const_part | rebuilt_part;
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}
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case 12:
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{
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unsigned w1, w;
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const_part = insn & 0xffffe002;
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dis_assemble_12 (value, &w1, &w);
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rebuilt_part = (w1 << 2) | w;
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return const_part | rebuilt_part;
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}
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case 14:
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const_part = insn & 0xffffc000;
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low_sign_unext (value, 14, &rebuilt_part);
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return const_part | rebuilt_part;
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case 17:
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{
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unsigned w1, w2, w;
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const_part = insn & 0xffe0e002;
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dis_assemble_17 (value, &w1, &w2, &w);
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rebuilt_part = (w2 << 2) | (w1 << 16) | w;
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return const_part | rebuilt_part;
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}
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case 21:
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const_part = insn & 0xffe00000;
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dis_assemble_21 (value, &rebuilt_part);
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return const_part | rebuilt_part;
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case 32:
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const_part = 0;
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return value;
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default:
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abort ();
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}
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return insn;
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}
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#endif /* _HPPA_H */
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