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https://sourceware.org/git/binutils-gdb.git
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c0c468d562
BFD's bfd_get_mach () function returns a bfd specific value representing the architecture of the target which is populated from the Tag_CPU_arch build attribute value of that target. Among other users of that interfacem, objdump which uses it to print the architecture version of the binary being examinated and to decide what instruction is available if run with "-m arm" via its own mapping from bfd_mach_arm_X values to feature bits available. However, both BFD and objdump's most recent known architecture is Armv5TE. When encountering a newer architecture bfd_get_mach will return bfd_mach_arm_unknown. This is unfortunate since objdump uses that value to allow all instructions on all architectures which is already what it does by default, making the "-m arm" trick useless. This patch updates BFD and objdump's knowledge of Arm architecture versions up to the latest Armv8-M Baseline and Mainline, Armv8-R and Armv8.4-A architectures. Since several architecture versions (eg. 8.X-A) share the same Tag_CPU_arch build attribute value and bfd_mach_arm values, the mapping from bfd machine value to feature bits need to return the most featureful feature bits that would yield the given bfd machine value otherwise some instruction would not disassemble under "-m arm" mode. The patch rework that mapping to make this clearer and simplify writing the mapping rules. In particular, for simplicity all FPU instructions are allowed in all cases. Finally, the patch also rewrite the cpu_arch_ver table in GAS to use the TAG_CPU_ARCH_X macros rather than hardcode their value. 2018-07-02 Thomas Preud'homme <thomas.preudhomme@arm.com> bfd/ * archures.c (bfd_mach_arm_5TEJ, bfd_mach_arm_6, bfd_mach_arm_6KZ, bfd_mach_arm_6T2, bfd_mach_arm_6K, bfd_mach_arm_7, bfd_mach_arm_6M, bfd_mach_arm_6SM, bfd_mach_arm_7EM, bfd_mach_arm_8, bfd_mach_arm_8R, bfd_mach_arm_8M_BASE, bfd_mach_arm_8M_MAIN): Define. * bfd-in2.h: Regenerate. * cpu-arm.c (arch_info_struct): Add entries for above new bfd_mach_arm values. * elf32-arm.c (bfd_arm_get_mach_from_attributes): Add Tag_CPU_arch to bfd_mach_arm mapping logic for pre Armv4 and Armv5TEJ and later architectures. Force assert failure for any new Tag_CPU_arch value. gas/ * config/tc-arm.c (cpu_arch_ver): Use symbolic TAG_CPU_ARCH macros rather than hardcode their values. ld/ * arm-dis.c (select_arm_features): Fix typo in heading comment. Allow all FPU features and add mapping from new bfd_mach_arm values to allowed CPU feature bits. opcodes/ * testsuite/ld-arm/tls-descrelax-be8.d: Add architecture version in expected result. * testsuite/ld-arm/tls-descrelax-v7.d: Likewise. * testsuite/ld-arm/tls-longplt-lib.d: Likewise. * testsuite/ld-arm/tls-longplt.d: Likewise.
109 lines
4.0 KiB
Makefile
109 lines
4.0 KiB
Makefile
.*: file format elf32-.*
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architecture: armv7, flags 0x[0-9a-f]+:
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EXEC_P, HAS_SYMS, D_PAGED
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start address 0x[0-9a-f]+
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Disassembly of section .text:
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00008000 <foo>:
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8000: e59f0004 ldr r0, \[pc, #4\] ; 800c <foo\+0xc>
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8004: e79f0000 ldr r0, \[pc, r0\]
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8008: e320f000 nop \{0\}
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800c: 00008138 .word 0x00008138
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8010: e59f0004 ldr r0, \[pc, #4\] ; 801c <foo\+0x1c>
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8014: e79f0000 ldr r0, \[pc, r0\]
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8018: e320f000 nop \{0\}
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801c: 00008128 .word 0x00008128
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8020: e59f0004 ldr r0, \[pc, #4\] ; 802c <foo\+0x2c>
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8024: e320f000 nop \{0\}
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8028: e320f000 nop \{0\}
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802c: 0000000c .word 0x0000000c
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8030: e59f0004 ldr r0, \[pc, #4\] ; 803c <foo\+0x3c>
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8034: e1a00000 nop ; .*
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8038: e320f000 nop \{0\}
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803c: 0000000c .word 0x0000000c
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8040: e59f000c ldr r0, \[pc, #12\] ; 8054 <foo\+0x54>
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8044: e08f0000 add r0, pc, r0
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8048: e5901000 ldr r1, \[r0\]
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804c: e1a00001 mov r0, r1
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8050: e320f000 nop \{0\}
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8054: 000080f8 .word 0x000080f8
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8058: e59f000c ldr r0, \[pc, #12\] ; 806c <foo\+0x6c>
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805c: e08f0000 add r0, pc, r0
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8060: e5901000 ldr r1, \[r0\]
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8064: e1a00001 mov r0, r1
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8068: e320f000 nop \{0\}
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806c: 000080e0 .word 0x000080e0
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8070: e59f000c ldr r0, \[pc, #12\] ; 8084 <foo\+0x84>
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8074: e320f000 nop \{0\}
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8078: e320f000 nop \{0\}
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807c: e320f000 nop \{0\}
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8080: e320f000 nop \{0\}
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8084: 0000000c .word 0x0000000c
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8088: e59f000c ldr r0, \[pc, #12\] ; 809c <foo\+0x9c>
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808c: e1a00000 nop ; .*
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8090: e1a00000 nop ; .*
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8094: e1a00000 nop ; .*
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8098: e320f000 nop \{0\}
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809c: 0000000c .word 0x0000000c
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000080a0 <bar>:
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80a0: 4801 ldr r0, \[pc, #4\] ; \(80a8 <bar\+0x8>\)
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80a2: 4478 add r0, pc
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80a4: 6800 ldr r0, \[r0, #0\]
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80a6: 46c0 nop ; .*
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80a8: 0000809e .word 0x0000809e
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80ac: 4801 ldr r0, \[pc, #4\] ; \(80b4 <bar\+0x14>\)
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80ae: 4478 add r0, pc
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80b0: 6800 ldr r0, \[r0, #0\]
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80b2: 46c0 nop ; \(mov r8, r8\)
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80b4: 00008092 .word 0x00008092
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80b8: 4801 ldr r0, \[pc, #4\] ; \(80c0 <bar\+0x20>\)
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80ba: 4478 add r0, pc
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80bc: 6800 ldr r0, \[r0, #0\]
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80be: 46c0 nop ; \(mov r8, r8\)
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80c0: 0000808a .word 0x0000808a
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80c4: 4801 ldr r0, \[pc, #4\] ; \(80cc <bar\+0x2c>\)
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80c6: 46c0 nop ; \(mov r8, r8\)
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80c8: 46c0 nop ; \(mov r8, r8\)
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80ca: bf00 nop
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80cc: 0000000c .word 0x0000000c
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80d0: 4801 ldr r0, \[pc, #4\] ; \(80d8 <bar\+0x38>\)
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80d2: (f3af 8000)|(bf00 ) nop(.w)?
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#...
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80d6: 46c0 nop ; \(mov r8, r8\)
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80d8: 0000000c .word 0x0000000c
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80dc: 4801 ldr r0, \[pc, #4\] ; \(80e4 <bar\+0x44>\)
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80de: (f3af 8000)|(bf00 ) nop(.w)?
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#...
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80e2: 46c0 nop ; \(mov r8, r8\)
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80e4: 00000014 .word 0x00000014
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80e8: 4802 ldr r0, \[pc, #8\] ; \(80f4 <bar\+0x54>\)
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80ea: 4478 add r0, pc
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80ec: 6801 ldr r1, \[r0, #0\]
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80ee: 1c08 adds r0, r1, #0
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80f0: 46c0 nop ; \(mov r8, r8\)
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80f2: bf00 nop
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80f4: 00008056 .word 0x00008056
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80f8: 4802 ldr r0, \[pc, #8\] ; \(8104 <bar\+0x64>\)
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80fa: 4478 add r0, pc
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80fc: 6801 ldr r1, \[r0, #0\]
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80fe: 4608 mov r0, r1
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8100: 46c0 nop ; \(mov r8, r8\)
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8102: bf00 nop
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8104: 00008046 .word 0x00008046
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8108: 4802 ldr r0, \[pc, #8\] ; \(8114 <bar\+0x74>\)
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810a: 46c0 nop ; \(mov r8, r8\)
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810c: 46c0 nop ; \(mov r8, r8\)
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810e: 46c0 nop ; \(mov r8, r8\)
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8110: 46c0 nop ; \(mov r8, r8\)
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8112: bf00 nop
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8114: 0000000c .word 0x0000000c
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8118: 4802 ldr r0, \[pc, #8\] ; \(8124 <bar\+0x84>\)
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811a: 46c0 nop ; \(mov r8, r8\)
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811c: 46c0 nop ; \(mov r8, r8\)
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811e: 46c0 nop ; \(mov r8, r8\)
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8120: 46c0 nop ; \(mov r8, r8\)
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8122: bf00 nop
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8124: 0000000c .word 0x0000000c
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