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https://sourceware.org/git/binutils-gdb.git
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1368b914e9
Now that all port tests live under testsuite/sim/*/, and none live in testsuite/ directly, flatten the structure by moving all of the dirs under testsuite/sim/ to testsuite/ directly. We need to stop passing --tool to dejagnu so that it searches all dirs and not just ones that start with "sim". Since we have no other dirs in this tree, and no plans to add any, should be fine.
81 lines
1.7 KiB
ArmAsm
81 lines
1.7 KiB
ArmAsm
/* ALU test program.
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* Test instructions
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* (r7,r6) = +/- (r0,r1);
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* (r7,r6) = +/- (r0,r1)s;
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*/
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# mach: bfin
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.include "testutils.inc"
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start
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// test positive overflow
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R0.L = 0xffff;
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R0.H = 0x7fff;
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R1.L = 0x0001;
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R1.H = 0x0000;
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R7 = 0;
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ASTAT = R7;
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R6 = R0 + R1, R7 = R0 - R1 (NS);
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DBGA ( R6.L , 0x0000 );
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DBGA ( R6.H , 0x8000 );
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DBGA ( R7.L , 0xfffe );
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DBGA ( R7.H , 0x7fff );
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CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 );
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CC = AN; R7 = CC; DBGA ( R7.L , 0x1 );
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CC = V; R7 = CC; DBGA ( R7.L , 0x1 );
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CC = AC0; R7 = CC; DBGA ( R7.L , 0x1 );
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// test positive overflow
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R0.L = 0xffff;
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R0.H = 0x7fff;
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R1.L = 0x0001;
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R1.H = 0x0000;
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R7 = 0;
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ASTAT = R7;
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R7 = R0 + R1, R6 = R0 - R1 (NS);
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DBGA ( R6.L , 0xfffe );
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DBGA ( R6.H , 0x7fff );
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DBGA ( R7.L , 0x0000 );
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DBGA ( R7.H , 0x8000 );
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CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 );
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CC = AN; R7 = CC; DBGA ( R7.L , 0x1 );
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CC = V; R7 = CC; DBGA ( R7.L , 0x1 );
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CC = AC0; R7 = CC; DBGA ( R7.L , 0x1 );
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// test positive sat
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R0.L = 0xffff;
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R0.H = 0x7fff;
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R1.L = 0x0001;
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R1.H = 0x0000;
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R7 = 0;
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ASTAT = R7;
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R6 = R0 + R1, R7 = R0 - R1 (S);
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DBGA ( R6.L , 0xffff );
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DBGA ( R6.H , 0x7fff );
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DBGA ( R7.L , 0xfffe );
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DBGA ( R7.H , 0x7fff );
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CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 );
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CC = AN; R7 = CC; DBGA ( R7.L , 0x0 );
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CC = V; R7 = CC; DBGA ( R7.L , 0x1 );
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CC = AC0; R7 = CC; DBGA ( R7.L , 0x1 );
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// test positive sat
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R0.L = 0xffff;
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R0.H = 0x7fff;
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R1.L = 0x0001;
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R1.H = 0x0000;
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R7 = 0;
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ASTAT = R7;
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R7 = R0 + R1, R6 = R0 - R1 (S);
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DBGA ( R6.L , 0xfffe );
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DBGA ( R6.H , 0x7fff );
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DBGA ( R7.L , 0xffff );
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DBGA ( R7.H , 0x7fff );
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CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 );
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CC = AN; R7 = CC; DBGA ( R7.L , 0x0 );
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CC = V; R7 = CC; DBGA ( R7.L , 0x1 );
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CC = AC0; R7 = CC; DBGA ( R7.L , 0x1 );
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pass
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