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1368b914e9
Now that all port tests live under testsuite/sim/*/, and none live in testsuite/ directly, flatten the structure by moving all of the dirs under testsuite/sim/ to testsuite/ directly. We need to stop passing --tool to dejagnu so that it searches all dirs and not just ones that start with "sim". Since we have no other dirs in this tree, and no plans to add any, should be fine.
73 lines
1.1 KiB
ArmAsm
73 lines
1.1 KiB
ArmAsm
# Blackfin testcase for hardware single stepping
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# mach: bfin
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# sim: --environment operating
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#include "test.h"
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.include "testutils.inc"
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start
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# Set up exception handler
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imm32 P4, EVT3;
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loadsym R1, _evx;
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[P4] = R1;
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# Enable single stepping
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R0 = 1;
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SYSCFG = R0;
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# Lower to the code we want to single step through
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R1 = 1;
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imm32 R5, 0xffff
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R6 = 0;
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R7 = 0;
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loadsym R1, _usr;
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RETI = R1;
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RTI;
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_usr:
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# Single step and set a new bit every time
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BITSET (R7, 0);
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BITSET (R7, 1);
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BITSET (R7, 2);
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BITSET (R7, 3);
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BITSET (R7, 4);
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BITSET (R7, 5);
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BITSET (R7, 6);
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BITSET (R7, 7);
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BITSET (R7, 8);
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BITSET (R7, 9);
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BITSET (R7, 10);
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BITSET (R7, 11);
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BITSET (R7, 12);
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BITSET (R7, 13);
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BITSET (R7, 14);
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BITSET (R7, 15);
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JUMP fail_lvl;
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_evx:
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# Make sure exception reason is single step
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R3 = SEQSTAT;
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R4 = 0x3f;
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R3 = R3 & R4;
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R4 = 0x10;
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CC = R3 == R4;
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IF !CC JUMP fail_lvl;
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# Set a new bit in R6 every single step to match R7
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CC = R1;
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R6 = ROT R6 BY 1;
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CC = R6 == R7;
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IF !CC JUMP fail_lvl;
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# Do it through each bit
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CC = R5 == R6;
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IF CC JUMP pass_lvl;
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RTX;
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pass_lvl:
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dbg_pass;
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fail_lvl:
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dbg_fail;
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