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https://sourceware.org/git/binutils-gdb.git
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1368b914e9
Now that all port tests live under testsuite/sim/*/, and none live in testsuite/ directly, flatten the structure by moving all of the dirs under testsuite/sim/ to testsuite/ directly. We need to stop passing --tool to dejagnu so that it searches all dirs and not just ones that start with "sim". Since we have no other dirs in this tree, and no plans to add any, should be fine.
100 lines
1.8 KiB
ArmAsm
100 lines
1.8 KiB
ArmAsm
//Original:/proj/frio/dv/testcases/core/c_except_illopcode/c_except_illopcode.dsp
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// Spec Reference: c_exception illegal opcode
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# mach: bfin
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# sim: --environment operating
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#include "test.h"
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.include "testutils.inc"
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start
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include(std.inc)
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include(selfcheck.inc)
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INIT_R_REGS(0);
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INIT_P_REGS(0);
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//CHECK_INIT(p5, 0xe0000000);
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include(symtable.inc)
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CHECK_INIT_DEF(p5);
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// load address of exception handler
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P0 = 0x200C (Z); // 0xFFE0200C EVT3 EXCEPTION
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P0.H = 0xFFE0;
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R0 = exception_handler (Z); // wr address of exception handler to MMR EVT3
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R0.H = exception_handler;
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[ P0 ] = R0;
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// Jump to User mode and enable exceptions
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R0 = MidUserCode (Z);
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R0.H = MidUserCode;
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RETI = R0;
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RTI; // cause it to go to Midusercode, .dd cause exception
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BeginUserCode:
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P1 = 1;
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P2 = 2;
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P3 = 3;
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P4 = 4;
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CHECKREG(r0, 0x00000000);
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CHECKREG(r1, 0x00000001);
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CHECKREG(r2, 0x00000002);
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CHECKREG(r3, 0x00000003);
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// CHECKREG(r4, 0x00000098);
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CHECKREG(r5, 0x00000005);
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CHECKREG(r6, 0x00000006);
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CHECKREG(r7, 0x00000007);
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CHECKREG(p1, 0x00000001);
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CHECKREG(p2, 0x00000002);
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CHECKREG(p3, 0x00000003);
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CHECKREG(p4, 0x00000004);
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dbg_pass;
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//jump 2;
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//jump -2;
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.dd 0xFFFFFFFF
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.dd 0xFFFFFFFF
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.dd 0xFFFFFFFF
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.dd 0xFFFFFFFF
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.dd 0xFFFFFFFF
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.dd 0xFFFFFFFF
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.dd 0xFFFFFFFF
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.dd 0xFFFFFFFF
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//dbg_pass;
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MidUserCode:
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.dd 0xFFFFFFFF
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R0 = 0;
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R1 = 1;
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R2 = 2;
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R3 = 3;
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CC = R0;
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IF !CC JUMP BeginUserCode;
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.dd 0xFFFFFFFF
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.dd 0xFFFFFFFF
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.dd 0xFFFFFFFF
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.dd 0xFFFFFFFF
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.dd 0xFFFFFFFF
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.dd 0xFFFFFFFF
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.dd 0xFFFFFFFF
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.dd 0xFFFFFFFF
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//.code 0x800
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exception_handler:
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R4 = RETX; // error handler: RETX has the address of the same Illegal instr
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R5 = 5;
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R6 = 6;
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R7 = 7;
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R4 += 4; // we have to add 4 to point to next instr after return
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RETX = R4;
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RTX; // return from exception
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//nop;
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.section MEM_DATA_ADDR_1,"aw"
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.dd 0xDEADBEEF
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.dd 0xBAD00BAD
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