mirror of
https://sourceware.org/git/binutils-gdb.git
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1368b914e9
Now that all port tests live under testsuite/sim/*/, and none live in testsuite/ directly, flatten the structure by moving all of the dirs under testsuite/sim/ to testsuite/ directly. We need to stop passing --tool to dejagnu so that it searches all dirs and not just ones that start with "sim". Since we have no other dirs in this tree, and no plans to add any, should be fine.
428 lines
9.3 KiB
ArmAsm
428 lines
9.3 KiB
ArmAsm
//Original:/proj/frio/dv/testcases/core/c_dsp32shift_rot/c_dsp32shift_rot.dsp
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// Spec Reference: dsp32shift rot
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# mach: bfin
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.include "testutils.inc"
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start
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R0 = 0;
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ASTAT = R0;
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imm32 r0, 0x01230001;
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imm32 r1, 0x12345678;
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imm32 r2, 0x23456789;
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imm32 r3, 0x3456789a;
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imm32 r4, 0x456789ab;
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imm32 r5, 0x56789abc;
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imm32 r6, 0x6789abcd;
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imm32 r7, 0x789abcde;
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R1 = ROT R0 BY R0.L;
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R2 = ROT R1 BY R0.L;
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R3 = ROT R2 BY R0.L;
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R4 = ROT R3 BY R0.L;
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R5 = ROT R4 BY R0.L;
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R6 = ROT R5 BY R0.L;
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R7 = ROT R6 BY R0.L;
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R0 = ROT R7 BY R0.L;
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CHECKREG r1, 0x02460002;
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CHECKREG r0, 0x23000100;
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CHECKREG r2, 0x048C0004;
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CHECKREG r3, 0x09180008;
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CHECKREG r4, 0x12300010;
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CHECKREG r5, 0x24600020;
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CHECKREG r6, 0x48C00040;
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CHECKREG r7, 0x91800080;
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imm32 r0, 0x01230001;
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imm32 r1, 0x12345678;
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imm32 r2, 0x23456789;
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imm32 r3, 0x3456789a;
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imm32 r4, 0x456789ab;
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imm32 r5, 0x56789abc;
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imm32 r6, 0x6789abcd;
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imm32 r7, 0x789abcde;
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R1.L = 15;
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R2 = ROT R0 BY R1.L;
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R3 = ROT R1 BY R1.L;
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R4 = ROT R2 BY R1.L;
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R5 = ROT R3 BY R1.L;
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R6 = ROT R4 BY R1.L;
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R7 = ROT R5 BY R1.L;
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R0 = ROT R6 BY R1.L;
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R1 = ROT R7 BY R1.L;
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CHECKREG r0, 0x2C04C400;
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CHECKREG r1, 0x5C489000;
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CHECKREG r2, 0x8000C048;
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CHECKREG r3, 0x0007C48D;
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CHECKREG r4, 0x60242000;
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CHECKREG r5, 0xE2468001;
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CHECKREG r6, 0x10005809;
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CHECKREG r7, 0x4000B891;
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imm32 r0, 0x01230002;
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imm32 r1, 0x12345678;
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imm32 r2, 0x23456789;
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imm32 r3, 0x3456789a;
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imm32 r4, 0x456789ab;
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imm32 r5, 0x56789abc;
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imm32 r6, 0x6789abcd;
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imm32 r7, 0x789abcde;
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R2 = 16;
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R3 = ROT R0 BY R2.L;
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R4 = ROT R1 BY R2.L;
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R5 = ROT R2 BY R2.L;
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R6 = ROT R3 BY R2.L;
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R7 = ROT R4 BY R2.L;
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R0 = ROT R5 BY R2.L;
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R1 = ROT R6 BY R2.L;
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R2 = ROT R7 BY R2.L;
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CHECKREG r0, 0x00000008;
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CHECKREG r1, 0x00010048;
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CHECKREG r2, 0x2B3CC48D;
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CHECKREG r3, 0x00020091;
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CHECKREG r4, 0x5678891A;
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CHECKREG r5, 0x00100000;
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CHECKREG r6, 0x00910001;
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CHECKREG r7, 0x891A2B3C;
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imm32 r0, 0x01230003;
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imm32 r1, 0x12345678;
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imm32 r2, 0x23456789;
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imm32 r3, 0x3456789a;
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imm32 r4, 0x456789ab;
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imm32 r5, 0x56789abc;
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imm32 r6, 0x6789abcd;
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imm32 r7, 0x789abcde;
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R3.L = 31;
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R4 = ROT R0 BY R3.L;
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R5 = ROT R1 BY R3.L;
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R6 = ROT R2 BY R3.L;
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R7 = ROT R3 BY R3.L;
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R0 = ROT R4 BY R3.L;
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R1 = ROT R5 BY R3.L;
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R2 = ROT R6 BY R3.L;
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R3 = ROT R7 BY R3.L;
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CHECKREG r0, 0x60123000;
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CHECKREG r1, 0x11234567;
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CHECKREG r2, 0x62345678;
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CHECKREG r3, 0xE3456001;
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CHECKREG r4, 0x8048C000;
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CHECKREG r5, 0x448D159E;
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CHECKREG r6, 0x88D159E2;
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CHECKREG r7, 0x8D158007;
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imm32 r0, 0x01230004;
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imm32 r1, 0x12345678;
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imm32 r2, 0x23456789;
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imm32 r3, 0x3456789a;
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imm32 r4, 0x456789ab;
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imm32 r5, 0x56789abc;
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imm32 r6, 0x6789abcd;
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imm32 r7, 0x789abcde;
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R4.L = -1;
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R0 = ROT R0 BY R4.L;
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R1 = ROT R1 BY R4.L;
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R2 = ROT R2 BY R4.L;
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R3 = ROT R3 BY R4.L;
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R4 = ROT R4 BY R4.L;
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R5 = ROT R5 BY R4.L;
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R6 = ROT R6 BY R4.L;
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R7 = ROT R7 BY R4.L;
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CHECKREG r0, 0x80918002;
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CHECKREG r1, 0x091A2B3C;
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CHECKREG r2, 0x11A2B3C4;
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CHECKREG r3, 0x9A2B3C4D;
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CHECKREG r4, 0x22B3FFFF;
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CHECKREG r5, 0xAB3C4D5E;
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CHECKREG r6, 0x33C4D5E6;
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CHECKREG r7, 0xBC4D5E6F;
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imm32 r0, 0x01230005;
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imm32 r1, 0x12345678;
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imm32 r2, 0x23456789;
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imm32 r3, 0x3456789a;
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imm32 r4, 0x456789ab;
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imm32 r5, 0x56789abc;
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imm32 r6, 0x6789abcd;
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imm32 r7, 0x789abcde;
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R5.L = -15;
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R6 = ROT R0 BY R5.L;
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R7 = ROT R1 BY R5.L;
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R0 = ROT R2 BY R5.L;
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R1 = ROT R3 BY R5.L;
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R2 = ROT R4 BY R5.L;
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R3 = ROT R5 BY R5.L;
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R4 = ROT R6 BY R5.L;
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R5 = ROT R7 BY R5.L;
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CHECKREG r0, 0x9E26468A;
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CHECKREG r1, 0xE26A68AC;
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CHECKREG r2, 0x26AE8ACF;
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CHECKREG r3, 0xFFC4ACF1;
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CHECKREG r4, 0x091A0028;
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CHECKREG r5, 0x91A0B3C0;
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CHECKREG r6, 0x00140246;
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CHECKREG r7, 0x59E02468;
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imm32 r0, 0x01230006;
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imm32 r1, 0x12345678;
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imm32 r2, 0x23456789;
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imm32 r3, 0x3456789a;
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imm32 r4, 0x456789ab;
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imm32 r5, 0x56789abc;
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imm32 r6, 0x6789abcd;
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imm32 r7, 0x789abcde;
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R6.L = -16;
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R7 = ROT R0 BY R6.L;
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R0 = ROT R1 BY R6.L;
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R1 = ROT R2 BY R6.L;
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R2 = ROT R3 BY R6.L;
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R3 = ROT R4 BY R6.L;
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R4 = ROT R5 BY R6.L;
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R5 = ROT R6 BY R6.L;
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R6 = ROT R7 BY R6.L;
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CHECKREG r0, 0xACF01234;
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CHECKREG r1, 0xCF122345;
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CHECKREG r2, 0xF1343456;
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CHECKREG r3, 0x13564567;
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CHECKREG r4, 0x35795678;
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CHECKREG r5, 0xFFE16789;
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CHECKREG r6, 0x0247000C;
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CHECKREG r7, 0x000C0123;
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imm32 r0, 0x01230007;
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imm32 r1, 0x12345678;
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imm32 r2, 0x23456789;
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imm32 r3, 0x3456789a;
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imm32 r4, 0x456789ab;
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imm32 r5, 0x56789abc;
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imm32 r6, 0x6789abcd;
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imm32 r7, 0x789abcde;
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R7.L = -27;
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R0 = ROT R0 BY R7.L;
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R1 = ROT R1 BY R7.L;
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R2 = ROT R2 BY R7.L;
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R3 = ROT R3 BY R7.L;
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R4 = ROT R4 BY R7.L;
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R5 = ROT R5 BY R7.L;
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R6 = ROT R6 BY R7.L;
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R7 = ROT R7 BY R7.L;
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CHECKREG r0, 0x48C001C0;
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CHECKREG r1, 0x8D159E02;
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CHECKREG r2, 0xD159E244;
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CHECKREG r3, 0x159E2686;
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CHECKREG r4, 0x59E26AE8;
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CHECKREG r5, 0x9E26AF2A;
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CHECKREG r6, 0xE26AF36C;
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CHECKREG r7, 0x26BFF96F;
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imm32 r0, 0x01230008;
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imm32 r1, 0x12345678;
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imm32 r2, 0x23456789;
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imm32 r3, 0x3456789a;
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imm32 r4, 0x456789ab;
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imm32 r5, 0x56789abc;
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imm32 r6, 0x6789abcd;
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imm32 r7, 0x789abcde;
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R0.L = 7;
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//r0 = rot (r0 by rl0);
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R1 = ROT R1 BY R0.L;
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R2 = ROT R2 BY R0.L;
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R3 = ROT R3 BY R0.L;
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R4 = ROT R4 BY R0.L;
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R5 = ROT R5 BY R0.L;
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R6 = ROT R6 BY R0.L;
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R7 = ROT R7 BY R0.L;
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CHECKREG r0, 0x01230007;
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CHECKREG r1, 0x1A2B3C04;
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CHECKREG r2, 0xA2B3C4C8;
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CHECKREG r3, 0x2B3C4D4D;
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CHECKREG r4, 0xB3C4D591;
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CHECKREG r5, 0x3C4D5E15;
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CHECKREG r6, 0xC4D5E6D9;
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CHECKREG r7, 0x4D5E6F5E;
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imm32 r0, 0x01230009;
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imm32 r1, 0x12345678;
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imm32 r2, 0x23456789;
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imm32 r3, 0x3456789a;
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imm32 r4, 0x456789ab;
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imm32 r5, 0x56789abc;
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imm32 r6, 0x6789abcd;
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imm32 r7, 0x789abcde;
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R1.L = 16;
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R0 = ROT R0 BY R1.L;
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//r1 = rot (r1 by rl1);
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R2 = ROT R2 BY R1.L;
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R3 = ROT R3 BY R1.L;
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R4 = ROT R4 BY R1.L;
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R5 = ROT R5 BY R1.L;
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R6 = ROT R6 BY R1.L;
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R7 = ROT R7 BY R1.L;
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CHECKREG r0, 0x00090091;
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CHECKREG r1, 0x12340010;
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CHECKREG r2, 0x678991A2;
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CHECKREG r3, 0x789A9A2B;
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CHECKREG r4, 0x89AB22B3;
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CHECKREG r5, 0x9ABCAB3C;
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CHECKREG r6, 0xABCD33C4;
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CHECKREG r7, 0xBCDEBC4D;
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imm32 r0, 0x0123000a;
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imm32 r1, 0x12345678;
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imm32 r2, 0x23456789;
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imm32 r3, 0x3456789a;
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imm32 r4, 0x456789ab;
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imm32 r5, 0x56789abc;
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imm32 r6, 0x6789abcd;
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imm32 r7, 0x789abcde;
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R2.L = 30;
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R0 = ROT R0 BY R2.L;
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R1 = ROT R1 BY R2.L;
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//r2 = rot (r2 by rl2);
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R3 = ROT R3 BY R2.L;
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R4 = ROT R4 BY R2.L;
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R5 = ROT R5 BY R2.L;
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R6 = ROT R6 BY R2.L;
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R7 = ROT R7 BY R2.L;
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CHECKREG r0, 0x80246001;
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CHECKREG r1, 0x02468ACF;
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CHECKREG r2, 0x2345001E;
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CHECKREG r3, 0x868ACF13;
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CHECKREG r4, 0xC8ACF135;
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CHECKREG r5, 0x0ACF1357;
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CHECKREG r6, 0x6CF13579;
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CHECKREG r7, 0xAF13579B;
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imm32 r0, 0x0123000b;
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imm32 r1, 0x12345678;
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imm32 r2, 0x23456789;
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imm32 r3, 0x3456789a;
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imm32 r4, 0x456789ab;
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imm32 r5, 0x56789abc;
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imm32 r6, 0x6789abcd;
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imm32 r7, 0x789abcde;
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R3.L = 31;
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R0 = ROT R0 BY R3.L;
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R1 = ROT R1 BY R3.L;
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R2 = ROT R2 BY R3.L;
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//r3 = rot (r3 by rl3);
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R4 = ROT R4 BY R3.L;
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R5 = ROT R5 BY R3.L;
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R6 = ROT R6 BY R3.L;
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R7 = ROT R7 BY R3.L;
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CHECKREG r0, 0xC048C002;
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CHECKREG r1, 0x448D159E;
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CHECKREG r2, 0x88D159E2;
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CHECKREG r3, 0x3456001F;
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CHECKREG r4, 0x9159E26A;
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CHECKREG r5, 0x559E26AF;
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CHECKREG r6, 0x99E26AF3;
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CHECKREG r7, 0x1E26AF37;
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imm32 r0, 0x0123000c;
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imm32 r1, 0x12345678;
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imm32 r2, 0x23456789;
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imm32 r3, 0x3456789a;
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imm32 r4, 0x456789ab;
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imm32 r5, 0x56789abc;
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imm32 r6, 0x6789abcd;
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imm32 r7, 0x789abcde;
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R4.L = -2;
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R0 = ROT R0 BY R4.L;
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R1 = ROT R1 BY R4.L;
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R2 = ROT R2 BY R4.L;
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R3 = ROT R3 BY R4.L;
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//r4 = rot (r4 by rl4);
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R5 = ROT R5 BY R4.L;
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R6 = ROT R6 BY R4.L;
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R7 = ROT R7 BY R4.L;
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CHECKREG r0, 0x4048C003;
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CHECKREG r1, 0x048D159E;
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CHECKREG r2, 0x88D159E2;
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CHECKREG r3, 0x0D159E26;
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CHECKREG r4, 0x4567FFFE;
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CHECKREG r5, 0x559E26AF;
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CHECKREG r6, 0x99E26AF3;
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CHECKREG r7, 0x1E26AF37;
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imm32 r0, 0x0123000d;
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imm32 r1, 0x12345678;
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imm32 r2, 0x23456789;
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imm32 r3, 0x3456789a;
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imm32 r4, 0x456789ab;
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imm32 r5, 0x56789abc;
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imm32 r6, 0x6789abcd;
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imm32 r7, 0x789abcde;
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R5.L = -17;
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R0 = ROT R0 BY R5.L;
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R1 = ROT R1 BY R5.L;
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R2 = ROT R2 BY R5.L;
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R3 = ROT R3 BY R5.L;
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R4 = ROT R4 BY R5.L;
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//r5 = rot (r5 by rl5);
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R6 = ROT R6 BY R5.L;
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R7 = ROT R7 BY R5.L;
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CHECKREG r0, 0x000D8091;
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CHECKREG r1, 0x5678891A;
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CHECKREG r2, 0x678911A2;
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CHECKREG r3, 0x789A9A2B;
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CHECKREG r4, 0x89AB22B3;
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CHECKREG r5, 0x5678FFEF;
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CHECKREG r6, 0xABCDB3C4;
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CHECKREG r7, 0xBCDEBC4D;
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imm32 r0, 0x0123000e;
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imm32 r1, 0x12345678;
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imm32 r2, 0x23456789;
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imm32 r3, 0x3456789a;
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imm32 r4, 0x456789ab;
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imm32 r5, 0x56789abc;
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imm32 r6, 0x6789abcd;
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imm32 r7, 0x789abcde;
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R6.L = -30;
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R0 = ROT R0 BY R6.L;
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R1 = ROT R1 BY R6.L;
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R2 = ROT R2 BY R6.L;
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R3 = ROT R3 BY R6.L;
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R4 = ROT R4 BY R6.L;
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R5 = ROT R5 BY R6.L;
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//r6 = rot (r6 by rl6);
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R7 = ROT R7 BY R6.L;
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CHECKREG r0, 0x09180070;
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CHECKREG r1, 0x91A2B3C0;
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CHECKREG r2, 0x1A2B3C48;
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CHECKREG r3, 0xA2B3C4D4;
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CHECKREG r4, 0x2B3C4D5D;
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CHECKREG r5, 0xB3C4D5E1;
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CHECKREG r6, 0x6789FFE2;
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CHECKREG r7, 0xC4D5E6F1;
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imm32 r0, 0x0123000f;
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imm32 r1, 0x12345678;
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imm32 r2, 0x23456789;
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imm32 r3, 0x3456789a;
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imm32 r4, 0x456789ab;
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imm32 r5, 0x56789abc;
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imm32 r6, 0x6789abcd;
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imm32 r7, 0x789abcde;
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R7.L = -31;
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R0 = ROT R0 BY R7.L;
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R1 = ROT R1 BY R7.L;
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R2 = ROT R2 BY R7.L;
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R3 = ROT R3 BY R7.L;
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R4 = ROT R4 BY R7.L;
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R5 = ROT R5 BY R7.L;
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R6 = ROT R6 BY R7.L;
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R7 = ROT R7 BY R7.L;
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CHECKREG r0, 0x048C003E;
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CHECKREG r1, 0x48D159E0;
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CHECKREG r2, 0x8D159E24;
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CHECKREG r3, 0xD159E268;
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CHECKREG r4, 0x159E26AC;
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CHECKREG r5, 0x59E26AF2;
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CHECKREG r6, 0x9E26AF36;
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CHECKREG r7, 0xE26BFF86;
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pass
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