binutils-gdb/ld/testsuite/ld-powerpc/relbrlt.d
Alan Modra 2d7ad24e87 Support PLT16 relocs against local symbols
Necessary if gcc is to use PLT16 relocs to implement -mlongcall, and
there isn't a good technical reason why local symbols should be
excluded from PLT16 support.  Non-ifunc local symbol PLT entries go in
a separate section to other PLT entries.  In a fixed position
executable they won't need to be relocated, and in a PIE or shared
library I chose to not implement lazy relocation.

bfd/
	* elf64-ppc.c (LOCAL_PLT_ENTRY_SIZE): Define.
	(struct ppc_stub_hash_entry): Add symtype field.
	(PLT_KEEP): Define.
	(struct ppc_link_hash_table): Add pltlocal and relpltlocal.
	(create_linkage_sections): Create pltlocal and relpltlocal.
	(ppc64_elf_check_relocs): Allow PLT relocs on local symbols.
	Set PLT_KEEP.
	(ppc64_elf_adjust_dynamic_symbol): Keep PLT entries for inline calls.
	(allocate_dynrelocs): Allocate pltlocal and relpltlocal.
	(ppc64_elf_size_dynamic_sections): Size pltlocal and relpltlocal.
	Keep PLT entries for inline calls against locals.
	(ppc_build_one_stub): Use pltlocal as appropriate.
	(ppc_size_one_stub): Likewise.
	(ppc64_elf_size_stubs): Set symtype.
	(build_global_entry_stubs_and_plt): Init pltlocal and write
	relpltlocal for globals.
	(write_plt_relocs_for_local_syms): Likewise for local syms.
	(ppc64_elf_relocate_section): Support PLT for local syms.
	* elf32-ppc.c (PLT_KEEP): Define.
	(struct ppc_elf_link_hash_table): Add pltlocal and relpltlocal.
	(ppc_elf_create_glink): Create pltlocal and relpltlocal.
	(ppc_elf_check_relocs): Allow PLT relocs on local symbols.
	Set PLT_KEEP.  Adjust update_local_sym_info call.
	(ppc_elf_adjust_dynamic_symbol): Keep PLT entries for inline calls.
	(allocate_dynrelocs): Allocate pltlocal and relpltlocal.
	(ppc_elf_size_dynamic_sections): Size pltlocal and relpltlocal.
	(ppc_elf_relocate_section): Support PLT16 relocs for local syms.
	(write_global_sym_plt): Init pltlocal and write relpltlocal.
	(ppc_finish_symbols): Likewise for locals.
ld/
	* emulparams/elf32ppc.sh (OTHER_RELRO_SECTIONS_2): Add .branch_lt.
	(OTHER_GOT_RELOC_SECTIONS): Add .rela.branch_lt.
	* testsuite/ld-powerpc/elfv2so.d: Update for symbol/stub reordering.
	* testsuite/ld-powerpc/relbrlt.d: Likewise.
	* testsuite/ld-powerpc/relbrlt.s: Likewise.
	* testsuite/ld-powerpc/tlsso.r: Likewise.
	* testsuite/ld-powerpc/tlstocso.r: Likewise.
gold/
	* powerpc.cc (Target_powerpc::lplt_): New variable.
	(Target_powerpc::lplt_section): Associated accessor.
	(Target_powerpc::plt_off): Handle local non-ifunc symbols.
	(Target_powerpc::make_lplt_section): New function.
	(Target_powerpc::make_local_plt_entry): New function.
	(Powerpc_relobj::do_relocate_sections): Write out lplt.
	(Output_data_plt_powerpc::first_plt_entry_offset): Zero for lplt.
	(Output_data_plt_powerpc::add_local_entry): New function.
	(Output_data_plt_powerpc::do_write): Ignore lplt.
	(Target_powerpc::make_iplt_section): Make lplt first.
	(Target_powerpc::make_brlt_section): Make .branch_lt relro.
	(Target_powerpc::Scan::local): Handle PLT16 relocs.
2018-04-09 17:05:09 +09:30

61 lines
1.8 KiB
Makefile

#source: relbrlt.s
#as: -a64
#ld: -melf64ppc --no-plt-align --no-ld-generated-unwind-info --emit-relocs
#objdump: -Dr
.*
Disassembly of section \.text:
0*100000c0 <_start>:
[0-9a-f ]*: (49 bf 00 2d|2d 00 bf 49) bl .*
[0-9a-f ]*: R_PPC64_REL24 \.text\+0x37e003c
[0-9a-f ]*: (60 00 00 00|00 00 00 60) nop
[0-9a-f ]*: (49 bf 00 19|19 00 bf 49) bl .*
[0-9a-f ]*: R_PPC64_REL24 \.text\+0x3bf0020
[0-9a-f ]*: (60 00 00 00|00 00 00 60) nop
[0-9a-f ]*: (49 bf 00 21|21 00 bf 49) bl .*
[0-9a-f ]*: R_PPC64_REL24 \.text\+0x57e0024
[0-9a-f ]*: (60 00 00 00|00 00 00 60) nop
[0-9a-f ]*: 00 00 00 00 \.long 0x0
[0-9a-f ]*: (4b ff ff e4|e4 ff ff 4b) b .* <_start>
\.\.\.
[0-9a-f ]*<.*plt_branch.*>:
[0-9a-f ]*: (e9 82 80 e8|e8 80 82 e9) ld r12,-32536\(r2\)
[0-9a-f ]*: R_PPC64_TOC16_DS \*ABS\*\+0x157f00e8
[0-9a-f ]*: (7d 89 03 a6|a6 03 89 7d) mtctr r12
[0-9a-f ]*: (4e 80 04 20|20 04 80 4e) bctr
[0-9a-f ]*<.*long_branch.*>:
[0-9a-f ]*: (49 bf 00 10|10 00 bf 49) b .* <far>
[0-9a-f ]*: R_PPC64_REL24 \*ABS\*\+0x137e00fc
[0-9a-f ]*<.*plt_branch.*>:
[0-9a-f ]*: (e9 82 80 f0|f0 80 82 e9) ld r12,-32528\(r2\)
[0-9a-f ]*: R_PPC64_TOC16_DS \*ABS\*\+0x157f00f0
[0-9a-f ]*: (7d 89 03 a6|a6 03 89 7d) mtctr r12
[0-9a-f ]*: (4e 80 04 20|20 04 80 4e) bctr
\.\.\.
0*137e00fc <far>:
[0-9a-f ]*: (4e 80 00 20|20 00 80 4e) blr
\.\.\.
0*13bf00e0 <far2far>:
[0-9a-f ]*: (4e 80 00 20|20 00 80 4e) blr
\.\.\.
0*157e00e4 <huge>:
[0-9a-f ]*: (4e 80 00 20|20 00 80 4e) blr
Disassembly of section \.branch_lt:
0*157f00e8 .*:
[0-9a-f ]*: (00 00 00 00|e0 00 bf 13) .*
[0-9a-f ]*: R_PPC64_RELATIVE \*ABS\*\+0x13bf00e0
[0-9a-f ]*: (13 bf 00 e0|00 00 00 00) .*
[0-9a-f ]*: (00 00 00 00|e4 00 7e 15) .*
[0-9a-f ]*: R_PPC64_RELATIVE \*ABS\*\+0x157e00e4
[0-9a-f ]*: (15 7e 00 e4|00 00 00 00) .*