binutils-gdb/ld/testsuite/ld-mips-elf/compressed-plt-1-o32-umips.od
Simon Dardis 40fc1451c6 [MIPS] Map 'move' to 'or'.
The MIPS assembly idiom 'move' now maps to the 'or' machine instruction. This
change affects microMIPS, MIPS32, MIPS64.

2015-08-12  Simon Dardis  <simon.dardis@imgtec.com>

opcodes/

	* micromips-opc.c (micromips_opcodes): Re-order table so that move
	based on 'or' is first.
	* mips-opc.c (mips_builtin_opcodes): Ditto.

bfd/

	* elfxx-mips.c (STUB_MOVE): Change to use 'or' only.
	(mips_o32_exec_plt0_entry, mips_n32_exec_plt0_entry,
	mips_n64_exec_plt0_entry, micromips_insn32_o32_exec_plt0_entry):
	Update to use 'or' instead of 'addu/daddu'.
	(_bfd_mips_elf_finish_dynamic_symbol): Update usage of STUB_MOVE.
	(move_insns_32): Reorder table.

gas/

	* config/tc-mips.c (move_register): Change to use 'or' only.
	(s_cpload, s_cpsetup, s_cprestore, s_cpreturn): Update to
	use or for move.

gas/testsuite/

	* gas/mips/elf-rel23.d: Update test.
	* gas/mips/elf-rel23.d: Ditto.
	* gas/mips/elf-rel23a.d: Ditto.
	* gas/mips/elf-rel23b.d: Ditto.
	* gas/mips/elf_e_flags1.d: Ditto.
	* gas/mips/elf_e_flags2.d: Ditto.
	* gas/mips/elf_e_flags3.d: Ditto.
	* gas/mips/elf_e_flags4.d: Ditto.
	* gas/mips/loc-swap-dis.d: Ditto.
	* gas/mips/micromips-insn32.d: Ditto.
	* gas/mips/micromips-noinsn32.d: Ditto.
	* gas/mips/micromips-trap.d: Ditto.
	* gas/mips/micromips.d: Ditto.
	* gas/mips/mips-abi32-pic.d: Ditto.
	* gas/mips/mips-abi32.d: Ditto.
	* gas/mips/mips-gp32-fp32-pic.d: Ditto.
	* gas/mips/mips-gp32-fp32.d: Ditto.
	* gas/mips/mips-gp32-fp64-pic.d: Ditto.
	* gas/mips/mips-gp32-fp64.d: Ditto.
	* gas/mips/mips-gp64-fp32-pic.d: Ditto.
	* gas/mips/mips-gp64-fp32.d: Ditto.
	* gas/mips/mips-gp64-fp64-pic.d: Ditto.
	* gas/mips/mips-gp64-fp64.d: Ditto.
	* gas/mips/mipsr6@loc-swap-dis.d: Ditto.
	* gas/mips/tls-o32.d: Ditto.
	* gas/mips/uld2-eb.d: Ditto.
	* gas/mips/uld2-el.d: Ditto.
	* gas/mips/ulw2-eb-ilocks.d: Ditto.
	* gas/mips/ulw2-eb.d: Ditto.
	* gas/mips/ulw2-el-ilocks.d: Ditto.
	* gas/mips/ulw2-el.d: Ditto.
	* gas/mips/move.d: New test.
	* gas/mips/move.s: Ditto.
	* gas/mips/micromips32-move.d: Ditto.
	* gas/mips/micromips32-move.s: Ditto.
	* gas/mips/mips.exp: Run the new tests.

gold/

	* mips.cc (plt0_entry_o32, plt0_entry_n32, plt0_entry_n64,
	lazy_stub_normal_1, lazy_stub_normal_1_n64,
	lazy_stub_normal_2, lazy_stub_normal_2_n64, lazy_stub_big,
	lazy_stub_big_n64, lazy_stub_micromips32_normal_1_n64,
	lazy_stub_micromips32_normal_2_n64, lazy_stub_micromips32_big,
	lazy_stub_micromips32_big_n64): Update to use 'or' for move instead
	of 'addu/daddu'.

ld/testsuite/

	* ld-mips-elf/compressed-plt-1-n32-mips16.od: Update test.
	* ld-mips-elf/compressed-plt-1-n32-umips.od: Ditto.
	* ld-mips-elf/compressed-plt-1-o32-mips16-got.od: Ditto.
	* ld-mips-elf/compressed-plt-1-o32-mips16-only.od: Ditto.
	* ld-mips-elf/compressed-plt-1-o32-mips16-word.od: Ditto.
	* ld-mips-elf/compressed-plt-1-o32-mips16.od: Ditto.
	* ld-mips-elf/compressed-plt-1-o32-se.od: Ditto.
	* ld-mips-elf/compressed-plt-1-o32-umips-got.od: Ditto.
	* ld-mips-elf/compressed-plt-1-o32-umips-word.od: Ditto.
	* ld-mips-elf/compressed-plt-1-o32-umips.od: Ditto.
	* ld-mips-elf/jalx-2.dd: Ditto.
	* ld-mips-elf/mips16-pic-3.dd: Ditto.
	* ld-mips-elf/pic-and-nonpic-3a.dd: Ditto.
	* ld-mips-elf/pic-and-nonpic-3b.dd: Ditto.
	* ld-mips-elf/pic-and-nonpic-5b.dd: Ditto.
	* ld-mips-elf/pic-and-nonpic-6-n32.dd: Ditto.
	* ld-mips-elf/pic-and-nonpic-6-o32.dd: Ditto.
	* ld-mips-elf/stub-dynsym-1-10000.d: Ditto.
	* ld-mips-elf/stub-dynsym-1-2fe80.d: Ditto.
	* ld-mips-elf/stub-dynsym-1-7fff.d: Ditto.
	* ld-mips-elf/stub-dynsym-1-8000.d: Ditto.
	* ld-mips-elf/stub-dynsym-1-fff0.d: Ditto.
	* ld-mips-elf/tlsbin-o32.d: Ditto.
	* ld-mips-elf/tlsdyn-o32-1.d: Ditto.
	* ld-mips-elf/tlsdyn-o32-2.d: Ditto.
	* ld-mips-elf/tlsdyn-o32-3.d: Ditto.
	* ld-mips-elf/tlsdyn-o32.d: Ditto.
	* ld-mips-elf/tlslib-o32.d: Ditto.
2015-08-12 17:10:22 +01:00

513 lines
15 KiB
Plaintext

.* file format .*
Disassembly of section \.plt:
# Only _du (direct call from uncompressed code) functions should have
# non-microMIPS PLTs. All the rest must be microMIPS.
10100000 <_PROCEDURE_LINKAGE_TABLE_>:
.*: 3c1c1020 lui \$28,0x1020
.*: 8f990000 lw \$25,0\(\$28\)
.*: 279c0000 addiu \$28,\$28,0
.*: 031cc023 subu \$24,\$24,\$28
.*: 03e07825 move \$15,\$31
.*: 0018c082 srl \$24,\$24,0x2
.*: 0320f809 jalr \$25
.*: 2718fffe addiu \$24,\$24,-2
10100020 <f_lo_iu_du_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df9000c lw \$25,12\(\$15\)
.*: 03200008 jr \$25
.*: 25f8000c addiu \$24,\$15,12
10100030 <f_lo_du_ic_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90010 lw \$25,16\(\$15\)
.*: 03200008 jr \$25
.*: 25f80010 addiu \$24,\$15,16
10100040 <f_du_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90014 lw \$25,20\(\$15\)
.*: 03200008 jr \$25
.*: 25f80014 addiu \$24,\$15,20
10100050 <f_iu_du_ic@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df9001c lw \$25,28\(\$15\)
.*: 03200008 jr \$25
.*: 25f8001c addiu \$24,\$15,28
10100060 <f_lo_du_ic@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90020 lw \$25,32\(\$15\)
.*: 03200008 jr \$25
.*: 25f80020 addiu \$24,\$15,32
10100070 <f_lo_du_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90030 lw \$25,48\(\$15\)
.*: 03200008 jr \$25
.*: 25f80030 addiu \$24,\$15,48
10100080 <f_du@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90034 lw \$25,52\(\$15\)
.*: 03200008 jr \$25
.*: 25f80034 addiu \$24,\$15,52
10100090 <f_du_ic_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90038 lw \$25,56\(\$15\)
.*: 03200008 jr \$25
.*: 25f80038 addiu \$24,\$15,56
101000a0 <f_du_ic@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df9003c lw \$25,60\(\$15\)
.*: 03200008 jr \$25
.*: 25f8003c addiu \$24,\$15,60
101000b0 <f_iu_du_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90040 lw \$25,64\(\$15\)
.*: 03200008 jr \$25
.*: 25f80040 addiu \$24,\$15,64
101000c0 <f_iu_du@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90048 lw \$25,72\(\$15\)
.*: 03200008 jr \$25
.*: 25f80048 addiu \$24,\$15,72
101000d0 <f_lo_iu_du@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df9004c lw \$25,76\(\$15\)
.*: 03200008 jr \$25
.*: 25f8004c addiu \$24,\$15,76
101000e0 <f_lo_du@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90058 lw \$25,88\(\$15\)
.*: 03200008 jr \$25
.*: 25f80058 addiu \$24,\$15,88
101000f0 <f_iu_du_ic_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90060 lw \$25,96\(\$15\)
.*: 03200008 jr \$25
.*: 25f80060 addiu \$24,\$15,96
10100100 <f_lo_iu_du_ic@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90068 lw \$25,104\(\$15\)
.*: 03200008 jr \$25
.*: 25f80068 addiu \$24,\$15,104
10100110 <f_lo_iu_du_ic_dc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df9006c lw \$25,108\(\$15\)
.*: 03200008 jr \$25
.*: 25f8006c addiu \$24,\$15,108
10100120 <f_lo_iu@micromipsplt>:
.*: 7903 ffba addiu \$2,\$pc,1048296
# ^ 0x10200008
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
1010012c <f_lo_iu_du_dc@micromipsplt>:
.*: 7903 ffb8 addiu \$2,\$pc,1048288
# ^ 0x1020000c
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
10100138 <f_lo_du_ic_dc@micromipsplt>:
.*: 7903 ffb6 addiu \$2,\$pc,1048280
# ^ 0x10200010
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
10100144 <f_du_dc@micromipsplt>:
.*: 7903 ffb4 addiu \$2,\$pc,1048272
# ^ 0x10200014
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
10100150 <f_lo_iu_dc@micromipsplt>:
.*: 7903 ffb2 addiu \$2,\$pc,1048264
# ^ 0x10200018
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
1010015c <f_iu_dc@micromipsplt>:
.*: 7903 ffb2 addiu \$2,\$pc,1048264
# ^ 0x10200024
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
10100168 <f_lo_iu_ic@micromipsplt>:
.*: 7903 ffb0 addiu \$2,\$pc,1048256
# ^ 0x10200028
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
10100174 <f_lo_ic@micromipsplt>:
.*: 7903 ffae addiu \$2,\$pc,1048248
# ^ 0x1020002c
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
10100180 <f_lo_du_dc@micromipsplt>:
.*: 7903 ffac addiu \$2,\$pc,1048240
# ^ 0x10200030
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
1010018c <f_du_ic_dc@micromipsplt>:
.*: 7903 ffab addiu \$2,\$pc,1048236
# ^ 0x10200038
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
10100198 <f_iu_du_dc@micromipsplt>:
.*: 7903 ffaa addiu \$2,\$pc,1048232
# ^ 0x10200040
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
101001a4 <f_lo_dc@micromipsplt>:
.*: 7903 ffa8 addiu \$2,\$pc,1048224
# ^ 0x10200044
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
101001b0 <f_dc@micromipsplt>:
.*: 7903 ffa8 addiu \$2,\$pc,1048224
# ^ 0x10200050
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
101001bc <f_ic_dc@micromipsplt>:
.*: 7903 ffa6 addiu \$2,\$pc,1048216
# ^ 0x10200054
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
101001c8 <f_iu_ic_dc@micromipsplt>:
.*: 7903 ffa5 addiu \$2,\$pc,1048212
# ^ 0x1020005c
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
101001d4 <f_iu_du_ic_dc@micromipsplt>:
.*: 7903 ffa3 addiu \$2,\$pc,1048204
# ^ 0x10200060
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
101001e0 <f_lo_iu_ic_dc@micromipsplt>:
.*: 7903 ffa1 addiu \$2,\$pc,1048196
# ^ 0x10200064
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
101001ec <f_lo_iu_du_ic_dc@micromipsplt>:
.*: 7903 ffa0 addiu \$2,\$pc,1048192
# ^ 0x1020006c
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
101001f8 <f_lo_ic_dc@micromipsplt>:
.*: 7903 ff9e addiu \$2,\$pc,1048184
# ^ 0x10200070
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
10100204 <f_lo@micromipsplt>:
.*: 7903 ff9c addiu \$2,\$pc,1048176
# ^ 0x10200074
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
Disassembly of section \.MIPS\.stubs:
10101000 <_MIPS_STUBS_>:
# Lazy-binding stub for f_iu.
.*: ff3c 8010 lw \$25,-32752\(\$28\)
.*: 0dff move \$15,\$31
.*: 45d9 jalr \$25
.*: 3300 0021 li \$24,33
# Lazy-binding stub for f_ic.
.*: ff3c 8010 lw \$25,-32752\(\$28\)
.*: 0dff move \$15,\$31
.*: 45d9 jalr \$25
.*: 3300 0020 li \$24,32
# Lazy-binding stub for f_iu_ic.
.*: ff3c 8010 lw \$25,-32752\(\$28\)
.*: 0dff move \$15,\$31
.*: 45d9 jalr \$25
.*: 3300 001f li \$24,31
\.\.\.
Disassembly of section \.text\.a:
10102000 <testc>:
.*: .... .... jal [0-9a-f]+ <f_dc@micromipsplt>
.*: 0000 0000 nop
.*: .... .... j [0-9a-f]+ <f_dc@micromipsplt>
.*: 0c00 nop
.*: fc43 8070 lw \$2,-32656\(\$3\)
# ^ global GOT entry for f_ic
.*: .... .... jal [0-9a-f]+ <f_ic_dc@micromipsplt>
.*: 0000 0000 nop
.*: .... .... j [0-9a-f]+ <f_ic_dc@micromipsplt>
.*: 0c00 nop
.*: fc43 8018 lw \$2,-32744\(\$3\)
# ^ local GOT entry for f_ic_dc@micromipsplt
.*: .... .... jal [0-9a-f]+ <f_du_dc@micromipsplt>
.*: 0000 0000 nop
.*: .... .... j [0-9a-f]+ <f_du_dc@micromipsplt>
.*: 0c00 nop
.*: fc43 801c lw \$2,-32740\(\$3\)
# ^ local GOT entry for f_du_ic@plt
.*: .... .... jal [0-9a-f]+ <f_du_ic_dc@micromipsplt>
.*: 0000 0000 nop
.*: .... .... j [0-9a-f]+ <f_du_ic_dc@micromipsplt>
.*: 0c00 nop
.*: fc43 8020 lw \$2,-32736\(\$3\)
# ^ local GOT entry for f_du_ic_dc@plt
.*: .... .... jal [0-9a-f]+ <f_iu_dc@micromipsplt>
.*: 0000 0000 nop
.*: .... .... j [0-9a-f]+ <f_iu_dc@micromipsplt>
.*: 0c00 nop
.*: fc43 806c lw \$2,-32660\(\$3\)
# ^ global GOT entry for f_iu_ic
.*: .... .... jal [0-9a-f]+ <f_iu_ic_dc@micromipsplt>
.*: 0000 0000 nop
.*: .... .... j [0-9a-f]+ <f_iu_ic_dc@micromipsplt>
.*: 0c00 nop
.*: fc43 8024 lw \$2,-32732\(\$3\)
# ^ local GOT entry for f_iu_ic_dc@micromipsplt
.*: .... .... jal [0-9a-f]+ <f_iu_du_dc@micromipsplt>
.*: 0000 0000 nop
.*: .... .... j [0-9a-f]+ <f_iu_du_dc@micromipsplt>
.*: 0c00 nop
.*: fc43 8028 lw \$2,-32728\(\$3\)
# ^ local GOT entry for f_iu_du_ic@plt
.*: .... .... jal [0-9a-f]+ <f_iu_du_ic_dc@micromipsplt>
.*: 0000 0000 nop
.*: .... .... j [0-9a-f]+ <f_iu_du_ic_dc@micromipsplt>
.*: 0c00 nop
.*: fc43 802c lw \$2,-32724\(\$3\)
# ^ local GOT entry for f_iu_du_ic_dc@plt
.*: .... .... jal [0-9a-f]+ <f_lo_dc@micromipsplt>
.*: 0000 0000 nop
.*: .... .... j [0-9a-f]+ <f_lo_dc@micromipsplt>
.*: 0c00 nop
.*: fc43 8030 lw \$2,-32720\(\$3\)
# ^ local GOT entry for f_lo_ic@micromipsplt
.*: .... .... jal [0-9a-f]+ <f_lo_ic_dc@micromipsplt>
.*: 0000 0000 nop
.*: .... .... j [0-9a-f]+ <f_lo_ic_dc@micromipsplt>
.*: 0c00 nop
.*: fc43 8034 lw \$2,-32716\(\$3\)
# ^ local GOT entry for f_lo_ic_dc@micromipsplt
.*: .... .... jal [0-9a-f]+ <f_lo_du_dc@micromipsplt>
.*: 0000 0000 nop
.*: .... .... j [0-9a-f]+ <f_lo_du_dc@micromipsplt>
.*: 0c00 nop
.*: fc43 8038 lw \$2,-32712\(\$3\)
# ^ local GOT entry for f_lo_du_ic@plt
.*: .... .... jal [0-9a-f]+ <f_lo_du_ic_dc@micromipsplt>
.*: 0000 0000 nop
.*: .... .... j [0-9a-f]+ <f_lo_du_ic_dc@micromipsplt>
.*: 0c00 nop
.*: fc43 803c lw \$2,-32708\(\$3\)
# ^ local GOT entry for f_lo_du_ic_dc@plt
.*: .... .... jal [0-9a-f]+ <f_lo_iu_dc@micromipsplt>
.*: 0000 0000 nop
.*: .... .... j [0-9a-f]+ <f_lo_iu_dc@micromipsplt>
.*: 0c00 nop
.*: fc43 8040 lw \$2,-32704\(\$3\)
# ^ local GOT entry for f_lo_iu_ic@micromipsplt
.*: .... .... jal [0-9a-f]+ <f_lo_iu_ic_dc@micromipsplt>
.*: 0000 0000 nop
.*: .... .... j [0-9a-f]+ <f_lo_iu_ic_dc@micromipsplt>
.*: 0c00 nop
.*: fc43 8044 lw \$2,-32700\(\$3\)
# ^ local GOT entry for f_lo_iu_ic_dc@micromipsplt
.*: .... .... jal [0-9a-f]+ <f_lo_iu_du_dc@micromipsplt>
.*: 0000 0000 nop
.*: .... .... j [0-9a-f]+ <f_lo_iu_du_dc@micromipsplt>
.*: 0c00 nop
.*: fc43 8048 lw \$2,-32696\(\$3\)
# ^ local GOT entry for f_lo_iu_du_ic@plt
.*: .... .... jal [0-9a-f]+ <f_lo_iu_du_ic_dc@micromipsplt>
.*: 0000 0000 nop
.*: .... .... j [0-9a-f]+ <f_lo_iu_du_ic_dc@micromipsplt>
.*: 0c00 nop
.*: fc43 804c lw \$2,-32692\(\$3\)
# ^ local GOT entry for f_lo_iu_du_ic_dc@plt
.*: 459f jr \$31
Disassembly of section \.text\.b:
10103000 <testu>:
.*: ........ jal [0-9a-f]+ <f_du@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_du@plt>
.*: 00000000 nop
.*: ........ jal [0-9a-f]+ <f_du_dc@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_du_dc@plt>
.*: 00000000 nop
.*: ........ jal [0-9a-f]+ <f_du_ic@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_du_ic@plt>
.*: 00000000 nop
.*: ........ jal [0-9a-f]+ <f_du_ic_dc@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_du_ic_dc@plt>
.*: 00000000 nop
.*: 8c628074 lw \$2,-32652\(\$3\)
# ^ global GOT entry for f_iu
.*: 8c628050 lw \$2,-32688\(\$3\)
# ^ local GOT entry for f_iu_dc@micromipsplt
.*: 8c62806c lw \$2,-32660\(\$3\)
# ^ global GOT entry for f_iu_ic
.*: 8c628024 lw \$2,-32732\(\$3\)
# ^ local GOT entry for f_iu_ic_dc@micromipsplt
.*: ........ jal [0-9a-f]+ <f_iu_du@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_iu_du@plt>
.*: 00000000 nop
.*: 8c628054 lw \$2,-32684\(\$3\)
# ^ local GOT entry for f_iu_du@plt
.*: ........ jal [0-9a-f]+ <f_iu_du_dc@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_iu_du_dc@plt>
.*: 00000000 nop
.*: 8c628058 lw \$2,-32680\(\$3\)
# ^ local GOT entry for f_iu_du_dc@plt
.*: ........ jal [0-9a-f]+ <f_iu_du_ic@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_iu_du_ic@plt>
.*: 00000000 nop
.*: 8c628028 lw \$2,-32728\(\$3\)
# ^ local GOT entry for f_iu_du_ic@plt
.*: ........ jal [0-9a-f]+ <f_iu_du_ic_dc@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_iu_du_ic_dc@plt>
.*: 00000000 nop
.*: 8c62802c lw \$2,-32724\(\$3\)
# ^ local GOT entry for f_iu_du_ic_dc@plt
.*: ........ jal [0-9a-f]+ <f_lo_du@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_lo_du@plt>
.*: 00000000 nop
.*: ........ jal [0-9a-f]+ <f_lo_du_dc@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_lo_du_dc@plt>
.*: 00000000 nop
.*: ........ jal [0-9a-f]+ <f_lo_du_ic@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_lo_du_ic@plt>
.*: 00000000 nop
.*: ........ jal [0-9a-f]+ <f_lo_du_ic_dc@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_lo_du_ic_dc@plt>
.*: 00000000 nop
.*: 8c62805c lw \$2,-32676\(\$3\)
# ^ local GOT entry for f_lo_iu@micromipsplt
.*: 8c628060 lw \$2,-32672\(\$3\)
# ^ local GOT entry for f_lo_iu_dc@micromipsplt
.*: 8c628040 lw \$2,-32704\(\$3\)
# ^ local GOT entry for f_lo_iu_ic@micromipsplt
.*: 8c628044 lw \$2,-32700\(\$3\)
# ^ local GOT entry for f_lo_iu_ic_dc@micromipsplt
.*: ........ jal [0-9a-f]+ <f_lo_iu_du@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_lo_iu_du@plt>
.*: 00000000 nop
.*: 8c628064 lw \$2,-32668\(\$3\)
# ^ local GOT entry for f_lo_iu_du@plt
.*: ........ jal [0-9a-f]+ <f_lo_iu_du_dc@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_lo_iu_du_dc@plt>
.*: 00000000 nop
.*: 8c628068 lw \$2,-32664\(\$3\)
# ^ local GOT entry for f_lo_iu_du_dc@plt
.*: ........ jal [0-9a-f]+ <f_lo_iu_du_ic@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_lo_iu_du_ic@plt>
.*: 00000000 nop
.*: 8c628048 lw \$2,-32696\(\$3\)
# ^ local GOT entry for f_lo_iu_du_ic@plt
.*: ........ jal [0-9a-f]+ <f_lo_iu_du_ic_dc@plt>
.*: 00000000 nop
.*: ........ j [0-9a-f]+ <f_lo_iu_du_ic_dc@plt>
.*: 00000000 nop
.*: 8c62804c lw \$2,-32692\(\$3\)
# ^ local GOT entry for f_lo_iu_du_ic_dc@plt
.*: 03e00008 jr \$31
Disassembly of section \.text\.c:
10104000 <testlo>:
.*: 3040 0205 li \$2,517
# ^ low 16 bits of f_lo@micromipsplt
.*: 3040 01a5 li \$2,421
# ^ low 16 bits of f_lo_dc@micromipsplt
.*: 3040 0175 li \$2,373
# ^ low 16 bits of f_lo_ic@micromipsplt
.*: 3040 01f9 li \$2,505
# ^ low 16 bits of f_lo_ic_dc@micromipsplt
.*: 3040 00e0 li \$2,224
# ^ low 16 bits of f_lo_du@plt
.*: 3040 0070 li \$2,112
# ^ low 16 bits of f_lo_du_dc@plt
.*: 3040 0060 li \$2,96
# ^ low 16 bits of f_lo_du_ic@plt
.*: 3040 0030 li \$2,48
# ^ low 16 bits of f_lo_du_ic_dc@plt
.*: 3040 0121 li \$2,289
# ^ low 16 bits of f_lo_iu@micromipsplt
.*: 3040 0151 li \$2,337
# ^ low 16 bits of f_lo_iu_dc@micromipsplt
.*: 3040 0169 li \$2,361
# ^ low 16 bits of f_lo_iu_ic@micromipsplt
.*: 3040 01e1 li \$2,481
# ^ low 16 bits of f_lo_iu_ic_dc@micromipsplt
.*: 3040 00d0 li \$2,208
# ^ low 16 bits of f_lo_iu_du@plt
.*: 3040 0020 li \$2,32
# ^ low 16 bits of f_lo_iu_du_dc@plt
.*: 3040 0100 li \$2,256
# ^ low 16 bits of f_lo_iu_du_ic@plt
.*: 3040 0110 li \$2,272
# ^ low 16 bits of f_lo_iu_du_ic_dc@plt