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129 lines
4.9 KiB
C
129 lines
4.9 KiB
C
/* C-SKY assembler/disassembler support.
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Copyright (C) 2004-2021 Free Software Foundation, Inc.
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Contributed by C-SKY Microsystems and Mentor Graphics.
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This file is part of GDB and GAS.
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GDB and GAS are free software; you can redistribute it and/or
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modify it under the terms of the GNU General Public License as
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published by the Free Software Foundation; either version 3, or (at
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your option) any later version.
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GDB and GAS are distributed in the hope that it will be useful, but
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WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with GDB or GAS; see the file COPYING3. If not, write to the
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Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
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MA 02110-1301, USA. */
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#include "dis-asm.h"
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/* The following bitmasks control instruction set architecture. */
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#define CSKYV1_ISA_E1 ((bfd_uint64_t)1 << 0)
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#define CSKYV2_ISA_E1 ((bfd_uint64_t)1 << 1)
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#define CSKYV2_ISA_1E2 ((bfd_uint64_t)1 << 2)
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#define CSKYV2_ISA_2E3 ((bfd_uint64_t)1 << 3)
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#define CSKYV2_ISA_3E7 ((bfd_uint64_t)1 << 4)
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#define CSKYV2_ISA_7E10 ((bfd_uint64_t)1 << 5)
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#define CSKYV2_ISA_3E3R1 ((bfd_uint64_t)1 << 6)
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#define CSKYV2_ISA_3E3R2 ((bfd_uint64_t)1 << 7)
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#define CSKYV2_ISA_10E60 ((bfd_uint64_t)1 << 8)
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#define CSKYV2_ISA_3E3R3 ((bfd_uint64_t)1 << 9)
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#define CSKY_ISA_TRUST ((bfd_uint64_t)1 << 11)
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#define CSKY_ISA_CACHE ((bfd_uint64_t)1 << 12)
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#define CSKY_ISA_NVIC ((bfd_uint64_t)1 << 13)
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#define CSKY_ISA_CP ((bfd_uint64_t)1 << 14)
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#define CSKY_ISA_MP ((bfd_uint64_t)1 << 15)
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#define CSKY_ISA_MP_1E2 ((bfd_uint64_t)1 << 16)
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#define CSKY_ISA_JAVA ((bfd_uint64_t)1 << 17)
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#define CSKY_ISA_MAC ((bfd_uint64_t)1 << 18)
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#define CSKY_ISA_MAC_DSP ((bfd_uint64_t)1 << 19)
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/* Base ISA for csky v1 and v2. */
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#define CSKY_ISA_DSP ((bfd_uint64_t)1 << 20)
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#define CSKY_ISA_DSP_1E2 ((bfd_uint64_t)1 << 21)
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#define CSKY_ISA_DSP_ENHANCE ((bfd_uint64_t)1 << 22)
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#define CSKY_ISA_DSPE60 ((bfd_uint64_t)1 << 23)
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/* Base float instruction (803f & 810f). */
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#define CSKY_ISA_FLOAT_E1 ((bfd_uint64_t)1 << 25)
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/* M_FLOAT support (810f). */
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#define CSKY_ISA_FLOAT_1E2 ((bfd_uint64_t)1 << 26)
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/* 803 support (803f). */
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#define CSKY_ISA_FLOAT_1E3 ((bfd_uint64_t)1 << 27)
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/* 807 support (803f & 807f). */
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#define CSKY_ISA_FLOAT_3E4 ((bfd_uint64_t)1 << 28)
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/* 860 support. */
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#define CSKY_ISA_FLOAT_7E60 ((bfd_uint64_t)1 << 36)
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/* Vector DSP support. */
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#define CSKY_ISA_VDSP ((bfd_uint64_t)1 << 29)
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#define CSKY_ISA_VDSP_2 ((bfd_uint64_t)1 << 30)
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/* The following bitmasks control cpu architecture for CSKY. */
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#define CSKY_ABI_V1 (1 << 28)
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#define CSKY_ABI_V2 (2 << 28)
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#define CSKY_ARCH_MASK 0x0000001F
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#define CSKY_ABI_MASK 0xF0000000
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#define CSKY_ARCH_510 0x1
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#define CSKY_ARCH_610 0x2
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#define CSKY_ARCH_801 0xa
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#define CSKY_ARCH_802 0x10
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#define CSKY_ARCH_803 0x9
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/* 804 use the same arch flag as 803 yet. */
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#define CSKY_ARCH_804 0x9
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#define CSKY_ARCH_805 0x11
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#define CSKY_ARCH_807 0x6
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#define CSKY_ARCH_810 0x8
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#define CSKY_ARCH_860 0xb
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/* 800 is a special arch supporting all instructions for ABIV2. */
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#define CSKY_ARCH_800 0x1f
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#define CSKY_ARCH_MAC (1 << 15)
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#define CSKY_ARCH_DSP (1 << 14)
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#define CSKY_ARCH_FLOAT (1 << 13)
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#define CSKY_ARCH_SIMD (1 << 12)
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#define CSKY_ARCH_CP (1 << 11)
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#define CSKY_ARCH_MP (1 << 10)
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#define CSKY_ARCH_CACHE (1 << 9)
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#define CSKY_ARCH_JAVA (1 << 8)
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#define CSKY_ARCH_APS (1 << 7)
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/* eflag's Versions. */
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#define CSKY_VERSION_V1 (1 << 24)
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#define CSKY_VERSION_V2 (2 << 24)
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#define CSKY_VERSION_V3 (3 << 24)
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#define IS_CSKY_V1(a) \
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(((a) & CSKY_ABI_MASK) == CSKY_ABI_V1)
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#define IS_CSKY_V2(a) \
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(((a) & CSKY_ABI_MASK) == CSKY_ABI_V2)
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#define IS_CSKY_ARCH_V1(a) \
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(((a) & CSKY_ARCH_MASK) == CSKY_ARCH_510 \
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|| ((a) & CSKY_ARCH_MASK) == CSKY_ARCH_610)
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#define IS_CSKY_ARCH_V2(a) \
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(!(IS_CSKY_ARCH_V1 (a)))
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#define IS_CSKY_ARCH_510(a) (((a) & CSKY_ARCH_MASK) == CSKY_ARCH_510)
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#define IS_CSKY_ARCH_610(a) (((a) & CSKY_ARCH_MASK) == CSKY_ARCH_610)
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#define IS_CSKY_ARCH_801(a) (((a) & CSKY_ARCH_MASK) == CSKY_ARCH_801)
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#define IS_CSKY_ARCH_802(a) (((a) & CSKY_ARCH_MASK) == CSKY_ARCH_802)
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#define IS_CSKY_ARCH_803(a) (((a) & CSKY_ARCH_MASK) == CSKY_ARCH_803)
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#define IS_CSKY_ARCH_807(a) (((a) & CSKY_ARCH_MASK) == CSKY_ARCH_807)
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#define IS_CSKY_ARCH_810(a) (((a) & CSKY_ARCH_MASK) == CSKY_ARCH_810)
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#define CPU_ARCH_MASK \
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(CSKY_ARCH_JAVA | CSKY_ARCH_FLOAT | CSKY_ARCH_DSP | CSKY_ARCH_MASK)
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#ifdef __cplusplus
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extern "C" {
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#endif
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extern int print_insn_csky (bfd_vma memaddr, struct disassemble_info *info);
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#ifdef __cplusplus
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}
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#endif
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