binutils-gdb/ld/testsuite/ld-arm/farcall-mix2.d
Andrew Burgess 8cb6e17571 opcodes/arm: use '@' consistently for the comment character
Looking at the ARM disassembler output, every comment seems to start
with a ';' character, so I assumed this was the correct character to
start an assembler comment.

I then spotted a couple of places where there was no ';', but instead,
just a '@' character.  I thought that this was a case of a missing
';', and proposed a patch to add the missing ';' characters.

Turns out I was wrong, '@' is actually the ARM assembler comment
character, while ';' is the statement separator.  Thus this:

    nop    ;@ comment

is two statements, the first is the 'nop' instruction, while the
second contains no instructions, just the '@ comment' comment text.

This:

    nop    @ comment

is a single 'nop' instruction followed by a comment.  And finally,
this:

    nop    ; comment

is two statements, the first contains the 'nop' instruction, while the
second contains the instruction 'comment', which obviously isn't
actually an instruction at all.

Why this matters is that, in the next commit, I would like to add
libopcodes syntax styling support for ARM.

The question then is how should the disassembler style the three cases
above?

As '@' is the actual comment start character then clearly the '@' and
anything after it can be styled as a comment.  But what about ';' in
the second example?  Style as text?  Style as a comment?

And the third example is even harder, what about the 'comment' text?
Style as an instruction mnemonic?  Style as text?  Style as a comment?

I think the only sensible answer is to move the disassembler to use
'@' consistently as its comment character, and remove all the uses of
';'.

Then, in the next commit, it's obvious what to do.

There's obviously a *lot* of tests that get updated by this commit,
the only actual code changes are in opcodes/arm-dis.c.
2022-11-01 09:32:13 +00:00

57 lines
1.5 KiB
Makefile

.*: file format .*
Disassembly of section .text:
[0-9a-f]+ <_start>:
+[0-9a-f]+: eb000000 bl [0-9a-f]+ <__bar_from_arm>
+[0-9a-f]+: eb000002 bl [0-9a-f]+ <__bar2_veneer>
[0-9a-f]+ <__bar_from_arm>:
+[0-9a-f]+: e59fc000 ldr ip, \[pc\] @ [0-9a-f]+ <__bar_from_arm\+0x8>
+[0-9a-f]+: e12fff1c bx ip
+[0-9a-f]+: 02003021 .word 0x02003021
[0-9a-f]+ <__bar2_veneer>:
+[0-9a-f]+: e51ff004 ldr pc, \[pc, #-4\] @ [0-9a-f]+ <__bar2_veneer\+0x4>
+[0-9a-f]+: 02003024 .word 0x02003024
+[0-9a-f]+: 00000000 .word 0x00000000
Disassembly of section .mytext:
[0-9a-f]+ <__bar3_veneer-0x10>:
+[0-9a-f]+: eb000002 bl [0-9a-f]+ <__bar3_veneer>
+[0-9a-f]+: eb000003 bl [0-9a-f]+ <__bar4_from_arm>
+[0-9a-f]+: eb000005 bl [0-9a-f]+ <__bar5_from_arm>
+[0-9a-f]+: 00000000 andeq r0, r0, r0
[0-9a-f]+ <__bar3_veneer>:
+[0-9a-f]+: e51ff004 ldr pc, \[pc, #-4\] @ [0-9a-f]+ <__bar3_veneer\+0x4>
+[0-9a-f]+: 02003028 .word 0x02003028
[0-9a-f]+ <__bar4_from_arm>:
+[0-9a-f]+: e59fc000 ldr ip, \[pc\] @ [0-9a-f]+ <__bar4_from_arm\+0x8>
+[0-9a-f]+: e12fff1c bx ip
+[0-9a-f]+: 0200302d .word 0x0200302d
[0-9a-f]+ <__bar5_from_arm>:
+[0-9a-f]+: e59fc000 ldr ip, \[pc\] @ [0-9a-f]+ <__bar5_from_arm\+0x8>
+[0-9a-f]+: e12fff1c bx ip
+[0-9a-f]+: 0200302f .word 0x0200302f
...
Disassembly of section .foo:
[0-9a-f]+ <bar>:
+[0-9a-f]+: 4770 bx lr
...
[0-9a-f]+ <bar2>:
+[0-9a-f]+: e12fff1e bx lr
[0-9a-f]+ <bar3>:
+[0-9a-f]+: e12fff1e bx lr
[0-9a-f]+ <bar4>:
+[0-9a-f]+: 4770 bx lr
[0-9a-f]+ <bar5>:
+[0-9a-f]+: 4770 bx lr