mirror of
https://sourceware.org/git/binutils-gdb.git
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1d506c26d9
This commit is the result of the following actions:
- Running gdb/copyright.py to update all of the copyright headers to
include 2024,
- Manually updating a few files the copyright.py script told me to
update, these files had copyright headers embedded within the
file,
- Regenerating gdbsupport/Makefile.in to refresh it's copyright
date,
- Using grep to find other files that still mentioned 2023. If
these files were updated last year from 2022 to 2023 then I've
updated them this year to 2024.
I'm sure I've probably missed some dates. Feel free to fix them up as
you spot them.
47 lines
1.7 KiB
C
47 lines
1.7 KiB
C
/* Copyright 2009-2024 Free Software Foundation, Inc.
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This file is part of the Xilinx MicroBlaze simulator.
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This library is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, see <http://www.gnu.org/licenses/>. */
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#ifndef MICROBLAZE_SIM_H
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#define MICROBLAZE_SIM_H
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#include "microblaze.h"
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/* The machine state.
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This state is maintained in host byte order. The
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fetch/store register functions must translate between host
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byte order and the target processor byte order.
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Keeping this data in target byte order simplifies the register
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read/write functions. Keeping this data in native order improves
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the performance of the simulator. Simulation speed is deemed more
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important. */
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/* The ordering of the microblaze_regset structure is matched in the
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gdb/config/microblaze/tm-microblaze.h file in the REGISTER_NAMES macro. */
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struct microblaze_regset
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{
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signed_4 regs[32]; /* primary registers */
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signed_4 spregs[2]; /* pc + msr */
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int cycles;
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int insts;
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unsigned_1 imm_enable;
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signed_2 imm_high;
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};
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#define MICROBLAZE_SIM_CPU(cpu) ((struct microblaze_regset *) CPU_ARCH_DATA (cpu))
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#endif /* MICROBLAZE_SIM_H */
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