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https://sourceware.org/git/binutils-gdb.git
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fd67aa1129
Adds two new external authors to etc/update-copyright.py to cover bfd/ax_tls.m4, and adds gprofng to dirs handled automatically, then updates copyright messages as follows: 1) Update cgen/utils.scm emitted copyrights. 2) Run "etc/update-copyright.py --this-year" with an extra external author I haven't committed, 'Kalray SA.', to cover gas testsuite files (which should have their copyright message removed). 3) Build with --enable-maintainer-mode --enable-cgen-maint=yes. 4) Check out */po/*.pot which we don't update frequently.
495 lines
12 KiB
C
495 lines
12 KiB
C
/* Disassemble AVR instructions.
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Copyright (C) 1999-2024 Free Software Foundation, Inc.
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Contributed by Denis Chertykov <denisc@overta.ru>
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This file is part of libopcodes.
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This library is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
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any later version.
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It is distributed in the hope that it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
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MA 02110-1301, USA. */
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#include "sysdep.h"
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#include <assert.h>
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#include "disassemble.h"
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#include "opintl.h"
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#include "libiberty.h"
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#include <stdint.h>
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struct avr_opcodes_s
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{
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char *name;
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char *constraints;
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char *opcode;
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int insn_size; /* In words. */
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int isa;
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unsigned int bin_opcode;
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};
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#define AVR_INSN(NAME, CONSTR, OPCODE, SIZE, ISA, BIN) \
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{#NAME, CONSTR, OPCODE, SIZE, ISA, BIN},
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const struct avr_opcodes_s avr_opcodes[] =
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{
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#include "opcode/avr.h"
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{NULL, NULL, NULL, 0, 0, 0}
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};
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static const char * comment_start = "0x";
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static int
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avr_operand (unsigned int insn,
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unsigned int insn2,
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unsigned int pc,
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int constraint,
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char * opcode_str,
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char * buf,
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char * comment,
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enum disassembler_style * style,
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int regs,
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int * sym,
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bfd_vma * sym_addr,
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disassemble_info * info)
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{
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int ok = 1;
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*sym = 0;
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switch (constraint)
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{
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/* Any register operand. */
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case 'r':
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if (regs)
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insn = (insn & 0xf) | ((insn & 0x0200) >> 5); /* Source register. */
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else
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insn = (insn & 0x01f0) >> 4; /* Destination register. */
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sprintf (buf, "r%d", insn);
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*style = dis_style_register;
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break;
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case 'd':
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if (regs)
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sprintf (buf, "r%d", 16 + (insn & 0xf));
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else
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sprintf (buf, "r%d", 16 + ((insn & 0xf0) >> 4));
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*style = dis_style_register;
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break;
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case 'w':
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sprintf (buf, "r%d", 24 + ((insn & 0x30) >> 3));
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*style = dis_style_register;
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break;
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case 'a':
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if (regs)
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sprintf (buf, "r%d", 16 + (insn & 7));
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else
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sprintf (buf, "r%d", 16 + ((insn >> 4) & 7));
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*style = dis_style_register;
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break;
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case 'v':
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if (regs)
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sprintf (buf, "r%d", (insn & 0xf) * 2);
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else
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sprintf (buf, "r%d", ((insn & 0xf0) >> 3));
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*style = dis_style_register;
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break;
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case 'e':
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{
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char *xyz;
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switch (insn & 0x100f)
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{
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case 0x0000: xyz = "Z"; break;
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case 0x1001: xyz = "Z+"; break;
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case 0x1002: xyz = "-Z"; break;
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case 0x0008: xyz = "Y"; break;
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case 0x1009: xyz = "Y+"; break;
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case 0x100a: xyz = "-Y"; break;
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case 0x100c: xyz = "X"; break;
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case 0x100d: xyz = "X+"; break;
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case 0x100e: xyz = "-X"; break;
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default: xyz = "??"; ok = 0;
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}
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strcpy (buf, xyz);
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if (AVR_UNDEF_P (insn))
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sprintf (comment, _("undefined"));
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}
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*style = dis_style_register;
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break;
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case 'z':
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*buf++ = 'Z';
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/* Check for post-increment. */
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char *s;
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for (s = opcode_str; *s; ++s)
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{
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if (*s == '+')
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{
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if (insn & (1 << (15 - (s - opcode_str))))
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*buf++ = '+';
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break;
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}
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}
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*buf = '\0';
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if (AVR_UNDEF_P (insn))
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sprintf (comment, _("undefined"));
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*style = dis_style_register;
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break;
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case 'b':
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{
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unsigned int x;
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x = (insn & 7);
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x |= (insn >> 7) & (3 << 3);
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x |= (insn >> 8) & (1 << 5);
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if (insn & 0x8)
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*buf++ = 'Y';
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else
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*buf++ = 'Z';
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sprintf (buf, "+%d", x);
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sprintf (comment, "0x%02x", x);
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*style = dis_style_register;
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}
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break;
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case 'h':
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*sym = 1;
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*sym_addr = ((((insn & 1) | ((insn & 0x1f0) >> 3)) << 16) | insn2) * 2;
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/* See PR binutils/2454. Ideally we would like to display the hex
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value of the address only once, but this would mean recoding
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objdump_print_address() which would affect many targets. */
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sprintf (buf, "%#lx", (unsigned long) *sym_addr);
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strcpy (comment, comment_start);
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info->insn_info_valid = 1;
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info->insn_type = dis_jsr;
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info->target = *sym_addr;
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*style = dis_style_address;
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break;
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case 'L':
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{
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int rel_addr = (((insn & 0xfff) ^ 0x800) - 0x800) * 2;
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sprintf (buf, ".%+-8d", rel_addr);
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*sym = 1;
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*sym_addr = pc + 2 + rel_addr;
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strcpy (comment, comment_start);
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info->insn_info_valid = 1;
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info->insn_type = dis_branch;
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info->target = *sym_addr;
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*style = dis_style_address_offset;
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}
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break;
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case 'l':
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{
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int rel_addr = ((((insn >> 3) & 0x7f) ^ 0x40) - 0x40) * 2;
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sprintf (buf, ".%+-8d", rel_addr);
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*sym = 1;
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*sym_addr = pc + 2 + rel_addr;
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strcpy (comment, comment_start);
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info->insn_info_valid = 1;
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info->insn_type = dis_condbranch;
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info->target = *sym_addr;
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*style = dis_style_address_offset;
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}
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break;
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case 'i':
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{
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unsigned int val = insn2 | 0x800000;
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*sym = 1;
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*sym_addr = val;
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sprintf (buf, "0x%04X", insn2);
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strcpy (comment, comment_start);
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*style = dis_style_immediate;
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}
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break;
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case 'j':
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{
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unsigned int val = ((insn & 0xf) | ((insn & 0x600) >> 5)
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| ((insn & 0x100) >> 2));
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if ((insn & 0x100) == 0)
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val |= 0x80;
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*sym = 1;
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*sym_addr = val | 0x800000;
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sprintf (buf, "0x%02x", val);
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strcpy (comment, comment_start);
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*style = dis_style_immediate;
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}
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break;
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case 'M':
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sprintf (buf, "0x%02X", ((insn & 0xf00) >> 4) | (insn & 0xf));
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sprintf (comment, "%d", ((insn & 0xf00) >> 4) | (insn & 0xf));
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*style = dis_style_immediate;
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break;
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case 'n':
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sprintf (buf, "??");
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/* xgettext:c-format */
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opcodes_error_handler (_("internal disassembler error"));
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ok = 0;
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*style = dis_style_immediate;
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break;
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case 'K':
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{
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unsigned int x;
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x = (insn & 0xf) | ((insn >> 2) & 0x30);
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sprintf (buf, "0x%02x", x);
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sprintf (comment, "%d", x);
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*style = dis_style_immediate;
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}
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break;
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case 's':
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sprintf (buf, "%d", insn & 7);
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*style = dis_style_immediate;
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break;
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case 'S':
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sprintf (buf, "%d", (insn >> 4) & 7);
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*style = dis_style_immediate;
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break;
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case 'P':
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{
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unsigned int x;
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x = (insn & 0xf);
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x |= (insn >> 5) & 0x30;
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sprintf (buf, "0x%02x", x);
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sprintf (comment, "%d", x);
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*style = dis_style_address;
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}
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break;
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case 'p':
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{
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unsigned int x;
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x = (insn >> 3) & 0x1f;
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sprintf (buf, "0x%02x", x);
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sprintf (comment, "%d", x);
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*style = dis_style_address;
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}
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break;
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case 'E':
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sprintf (buf, "%d", (insn >> 4) & 15);
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*style = dis_style_immediate;
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break;
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case '?':
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*buf = '\0';
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break;
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default:
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sprintf (buf, "??");
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/* xgettext:c-format */
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opcodes_error_handler (_("unknown constraint `%c'"), constraint);
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ok = 0;
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}
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return ok;
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}
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/* Read the opcode from ADDR. Return 0 in success and save opcode
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in *INSN, otherwise, return -1. */
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static int
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avrdis_opcode (bfd_vma addr, disassemble_info *info, uint16_t *insn)
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{
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bfd_byte buffer[2];
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int status;
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status = info->read_memory_func (addr, buffer, 2, info);
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if (status == 0)
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{
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*insn = bfd_getl16 (buffer);
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return 0;
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}
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info->memory_error_func (status, addr, info);
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return -1;
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}
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int
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print_insn_avr (bfd_vma addr, disassemble_info *info)
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{
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uint16_t insn, insn2;
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const struct avr_opcodes_s *opcode;
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static unsigned int *maskptr;
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void *stream = info->stream;
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fprintf_styled_ftype prin = info->fprintf_styled_func;
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static unsigned int *avr_bin_masks;
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static int initialized;
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int cmd_len = 2;
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int ok = 0;
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char op1[20], op2[20], comment1[40], comment2[40];
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enum disassembler_style style_op1, style_op2;
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int sym_op1 = 0, sym_op2 = 0;
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bfd_vma sym_addr1, sym_addr2;
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/* Clear instruction information field. */
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info->insn_info_valid = 0;
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info->branch_delay_insns = 0;
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info->data_size = 0;
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info->insn_type = dis_noninsn;
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info->target = 0;
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info->target2 = 0;
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if (!initialized)
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{
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unsigned int nopcodes;
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/* PR 4045: Try to avoid duplicating the 0x prefix that
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objdump_print_addr() will put on addresses when there
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is no symbol table available. */
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if (info->symtab_size == 0)
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comment_start = " ";
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nopcodes = sizeof (avr_opcodes) / sizeof (struct avr_opcodes_s);
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avr_bin_masks = xmalloc (nopcodes * sizeof (unsigned int));
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for (opcode = avr_opcodes, maskptr = avr_bin_masks;
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opcode->name;
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opcode++, maskptr++)
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{
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char * s;
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unsigned int bin = 0;
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unsigned int mask = 0;
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for (s = opcode->opcode; *s; ++s)
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{
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bin <<= 1;
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mask <<= 1;
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bin |= (*s == '1');
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mask |= (*s == '1' || *s == '0');
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}
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assert (s - opcode->opcode == 16);
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assert (opcode->bin_opcode == bin);
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*maskptr = mask;
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}
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initialized = 1;
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}
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if (avrdis_opcode (addr, info, &insn) != 0)
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return -1;
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for (opcode = avr_opcodes, maskptr = avr_bin_masks;
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opcode->name;
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opcode++, maskptr++)
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{
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if ((opcode->isa == AVR_ISA_TINY) && (info->mach != bfd_mach_avrtiny))
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continue;
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if ((insn & *maskptr) == opcode->bin_opcode)
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break;
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}
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/* Special case: disassemble `ldd r,b+0' as `ld r,b', and
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`std b+0,r' as `st b,r' (next entry in the table). */
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if (AVR_DISP0_P (insn))
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opcode++;
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op1[0] = 0;
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op2[0] = 0;
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comment1[0] = 0;
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comment2[0] = 0;
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style_op1 = dis_style_text;
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style_op2 = dis_style_text;
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if (opcode->name)
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{
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char *constraints = opcode->constraints;
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char *opcode_str = opcode->opcode;
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insn2 = 0;
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ok = 1;
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if (opcode->insn_size > 1)
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{
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if (avrdis_opcode (addr + 2, info, &insn2) != 0)
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return -1;
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cmd_len = 4;
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}
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if (*constraints && *constraints != '?')
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{
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int regs = REGISTER_P (*constraints);
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ok = avr_operand (insn, insn2, addr, *constraints, opcode_str, op1,
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comment1, &style_op1, 0, &sym_op1, &sym_addr1,
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info);
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if (ok && *(++constraints) == ',')
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ok = avr_operand (insn, insn2, addr, *(++constraints), opcode_str,
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op2, *comment1 ? comment2 : comment1,
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&style_op2, regs, &sym_op2, &sym_addr2,
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info);
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}
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}
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if (!ok)
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{
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/* Unknown opcode, or invalid combination of operands. */
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sprintf (op1, "0x%04x", insn);
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op2[0] = 0;
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sprintf (comment1, "????");
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comment2[0] = 0;
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}
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(*prin) (stream, ok ? dis_style_mnemonic : dis_style_assembler_directive,
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"%s", ok ? opcode->name : ".word");
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if (*op1)
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(*prin) (stream, style_op1, "\t%s", op1);
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if (*op2)
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{
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(*prin) (stream, dis_style_text, ", ");
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(*prin) (stream, style_op2, "%s", op2);
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}
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if (*comment1)
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(*prin) (stream, dis_style_comment_start, "\t; %s", comment1);
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if (sym_op1)
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info->print_address_func (sym_addr1, info);
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if (*comment2)
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(*prin) (stream, dis_style_comment_start, " %s", comment2);
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if (sym_op2)
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info->print_address_func (sym_addr2, info);
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return cmd_len;
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}
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