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binutils-gdb/opcodes
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Jens Remus 981fe5fd80 s390: Add support for z17 as CPU name 
So far IBM z17 was identified as arch15.  Add the real name, as it has
been announced. [1]

[1]: IBM z17 announcement letter, AD25-0015,
     https://www.ibm.com/docs/en/announcements/z17-makes-more-possible

gas/
	* config/tc-s390.c (s390_parse_cpu): Add z17 as alternate CPU
	name for arch15.
	* doc/c-s390.texi: Likewise.
	* doc/as.texi: Likewise.

opcodes/
	* s390-mkopc.c (main): Add z17 as alternate CPU name for arch15.

Signed-off-by: Jens Remus <jremus@linux.ibm.com>
2025-04-09 09:00:48 +02:00
..
po
Update translations for various sub-directories
2025-01-20 16:19:22 +00:00
.gitattributes
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.gitignore
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aarch64-asm-2.c
aarch64: Remove redundant sme-lutv2 qualifiers and operands
2025-01-10 16:24:33 +00:00
aarch64-asm.c
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2025-01-01 18:29:57 +10:30
aarch64-asm.h
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2025-01-01 18:29:57 +10:30
aarch64-dis-2.c
aarch64: Fix sve2p1 gating and add missing instructions
2025-01-17 16:19:56 +00:00
aarch64-dis.c
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2025-01-01 18:29:57 +10:30
aarch64-dis.h
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aarch64-gen.c
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2025-01-01 18:29:57 +10:30
aarch64-opc-2.c
aarch64: Rename AARCH64_OPND_SME_ZT0_INDEX2_12
2025-01-10 16:24:33 +00:00
aarch64-opc.c
aarch64: Add missing FEAT_MEC dc encodings and gate sysregs
2025-03-24 16:28:31 +00:00
aarch64-opc.h
aarch64: Remove redundant sme-lutv2 qualifiers and operands
2025-01-10 16:24:33 +00:00
aarch64-sys-regs.def
aarch64: Add missing FEAT_MEC dc encodings and gate sysregs
2025-03-24 16:28:31 +00:00
aarch64-tbl.h
aarch64: Add leading zeros to opcodes in aarch64-tbl.h
2025-02-05 14:14:29 +00:00
aclocal.m4
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alpha-dis.c
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alpha-opc.c
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arc-dis.c
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arc-dis.h
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arc-ext-tbl.h
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arc-ext.c
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arc-ext.h
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arc-fxi.h
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arc-nps400-tbl.h
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arc-opc.c
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arc-regs.h
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arc-tbl.h
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arm-dis.c
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avr-dis.c
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bfin-dis.c
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bpf-dis.c
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bpf-opc.c
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cgen-asm.c
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cgen-asm.in
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cgen-bitset.c
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cgen-dis.c
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cgen-dis.in
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cgen-ibld.in
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cgen-opc.c
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cgen.sh
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ChangeLog
Add markers for bihnutils 2.44 branch
2025-01-19 12:09:01 +00:00
ChangeLog-0001
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ChangeLog-0203
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ChangeLog-2004
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ChangeLog-2005
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ChangeLog-2006
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ChangeLog-2007
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ChangeLog-2012
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ChangeLog-2014
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ChangeLog-2015
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ChangeLog-2016
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ChangeLog-2017
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ChangeLog-2018
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ChangeLog-2019
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ChangeLog-2020
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ChangeLog-9297
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ChangeLog-9899
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config.in
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configure
Change version to 2.44.50 and regenerate files
2025-01-19 12:40:46 +00:00
configure.ac
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configure.com
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cr16-dis.c
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cr16-opc.c
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cris-desc.c
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cris-desc.h
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cris-dis.c
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cris-opc.c
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cris-opc.h
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crx-dis.c
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crx-opc.c
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csky-dis.c
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csky-opc.h
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d10v-dis.c
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d10v-opc.c
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d30v-dis.c
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d30v-opc.c
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dep-in.sed
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dis-buf.c
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dis-init.c
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disassemble.c
RISC-V: Move all global static target stuff into private data for disassembler.
2025-02-11 14:30:39 +08:00
disassemble.h
RISC-V: Move all global static target stuff into private data for disassembler.
2025-02-11 14:30:39 +08:00
dlx-dis.c
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epiphany-asm.c
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epiphany-desc.c
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epiphany-desc.h
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epiphany-dis.c
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epiphany-ibld.c
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epiphany-opc.c
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epiphany-opc.h
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fr30-asm.c
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fr30-desc.c
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fr30-desc.h
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fr30-dis.c
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fr30-ibld.c
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fr30-opc.c
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fr30-opc.h
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frv-asm.c
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frv-desc.c
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frv-desc.h
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frv-dis.c
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frv-ibld.c
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frv-opc.c
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frv-opc.h
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ft32-dis.c
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ft32-opc.c
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h8300-dis.c
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hppa-dis.c
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i386-dis-evex-len.h
Support Intel AMX-AVX512
2025-01-14 10:30:40 +08:00
i386-dis-evex-mod.h
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i386-dis-evex-prefix.h
x86: Remove "NE" in mnemonics for convert insns related to AI data types
2025-01-14 10:30:44 +08:00
i386-dis-evex-reg.h
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i386-dis-evex-w.h
x86: Ignore rounding for vcvt[,u]si2sd under r32 and vcvt[,u]dq2pd instead of reporting bad for disassembler
2025-01-17 10:17:12 +08:00
i386-dis-evex-x86-64.h
Support Intel AMX-AVX512
2025-01-14 10:30:40 +08:00
i386-dis-evex.h
Support Intel AMX-AVX512
2025-01-14 10:30:40 +08:00
i386-dis.c
x86: Remove AVX10.2 256 bit rounding support
2025-03-27 10:10:47 +08:00
i386-gen.c
x86: Support x86 Zhaoxin PadLock XMODX instructions
2025-02-07 10:31:42 +01:00
i386-init.h
x86: Support x86 Zhaoxin PadLock XMODX instructions
2025-02-07 10:31:42 +01:00
i386-mnem.h
x86: Add {noimm8s} pseudo prefix
2025-03-29 07:04:20 -07:00
i386-opc.h
x86: Add {noimm8s} pseudo prefix
2025-03-29 07:04:20 -07:00
i386-opc.tbl
x86: Add {noimm8s} pseudo prefix
2025-03-29 07:04:20 -07:00
i386-reg.tbl
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2025-01-01 18:29:57 +10:30
i386-tbl.h
x86: Add {noimm8s} pseudo prefix
2025-03-29 07:04:20 -07:00
ia64-asmtab.c
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2025-01-01 18:29:57 +10:30
ia64-asmtab.h
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ia64-dis.c
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ia64-gen.c
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ia64-ic.tbl
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ia64-opc-a.c
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ia64-opc-b.c
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ia64-opc-d.c
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ia64-opc-f.c
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ia64-opc-i.c
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ia64-opc-m.c
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ia64-opc-x.c
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ia64-opc.c
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ia64-opc.h
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ia64-raw.tbl
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ia64-war.tbl
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ia64-waw.tbl
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ip2k-asm.c
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ip2k-desc.c
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ip2k-desc.h
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ip2k-dis.c
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ip2k-ibld.c
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ip2k-opc.c
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ip2k-opc.h
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iq2000-asm.c
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iq2000-desc.c
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iq2000-desc.h
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iq2000-dis.c
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iq2000-ibld.c
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iq2000-opc.c
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iq2000-opc.h
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kvx-dis.c
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kvx-dis.h
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kvx-opc.c
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lm32-asm.c
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lm32-desc.c
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lm32-desc.h
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lm32-dis.c
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lm32-ibld.c
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lm32-opc.c
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lm32-opc.h
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lm32-opinst.c
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loongarch-coder.c
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2025-01-01 18:29:57 +10:30
loongarch-dis.c
LoongArch: Fix disassembly option parsing stopping at the first option
2025-03-26 15:49:58 +08:00
loongarch-opc.c
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2025-01-01 18:29:57 +10:30
m32c-asm.c
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m32c-desc.c
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m32c-desc.h
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m32c-dis.c
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m32c-ibld.c
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m32c-opc.c
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m32c-opc.h
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m32r-asm.c
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m32r-desc.c
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m32r-desc.h
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m32r-dis.c
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m32r-ibld.c
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m32r-opc.c
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m32r-opc.h
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m32r-opinst.c
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m68hc11-dis.c
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m68hc11-opc.c
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m68k-dis.c
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m68k-opc.c
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m10200-dis.c
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m10200-opc.c
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m10300-dis.c
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m10300-opc.c
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MAINTAINERS
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Makefile.am
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Makefile.in
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makefile.vms
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mcore-dis.c
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mcore-opc.h
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mep-asm.c
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mep-desc.c
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mep-desc.h
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mep-dis.c
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mep-ibld.c
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mep-opc.c
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mep-opc.h
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metag-dis.c
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microblaze-dis.c
MicroBlaze: Widen mask used in opcodes/microblaze-dis,c
2025-01-27 12:01:20 -08:00
microblaze-dis.h
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microblaze-opc.h
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microblaze-opcm.h
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micromips-opc.c
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mips16-opc.c
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mips-dis.c
MIPS objdump: Recognize o64 ABI names
2025-02-22 20:57:15 +00:00
mips-formats.h
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mips-opc.c
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mmix-dis.c
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mmix-opc.c
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moxie-dis.c
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moxie-opc.c
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msp430-decode.c
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msp430-decode.opc
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msp430-dis.c
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mt-asm.c
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mt-desc.c
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mt-desc.h
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mt-dis.c
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mt-ibld.c
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mt-opc.c
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mt-opc.h
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nds32-asm.c
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nds32-asm.h
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nds32-dis.c
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nds32-opc.h
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nfp-dis.c
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ns32k-dis.c
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opc2c.c
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opintl.h
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or1k-asm.c
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or1k-desc.c
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or1k-desc.h
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or1k-dis.c
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or1k-ibld.c
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or1k-opc.c
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or1k-opc.h
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or1k-opinst.c
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pdp11-dis.c
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pdp11-opc.c
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pj-dis.c
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pj-opc.c
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ppc-dis.c
disassemble_free_powerpc
2025-01-16 19:57:19 +10:30
ppc-opc.c
PowerPC: Add support for RFC02657 - AES acceleration instructions
2025-01-23 06:10:43 -05:00
pru-dis.c
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pru-opc.c
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riscv-dis.c
RISC-V: Don't show support for 1.9.1 priv spec
2025-03-28 09:20:50 +08:00
riscv-opc.c
RISC-V: add Smrnmi 1.0 instruction support
2025-03-26 10:16:05 +08:00
rl78-decode.c
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rl78-decode.opc
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rl78-dis.c
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rx-decode.c
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rx-decode.opc
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rx-dis.c
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s12z-dis.c
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s12z-opc.c
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s12z-opc.h
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s390-dis.c
s390: Do not omit vector index register 0 in disassembly
2025-01-27 16:48:58 +01:00
s390-mkopc.c
s390: Add support for z17 as CPU name
2025-04-09 09:00:48 +02:00
s390-opc.c
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s390-opc.txt
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score7-dis.c
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score-dis.c
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score-opc.h
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sh-dis.c
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sh-opc.h
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sparc-dis.c
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sparc-opc.c
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spu-dis.c
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spu-opc.c
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sysdep.h
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tic4x-dis.c
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tic6x-dis.c
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tic30-dis.c
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tic54x-dis.c
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tic54x-opc.c
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tilegx-dis.c
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tilegx-opc.c
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tilepro-dis.c
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tilepro-opc.c
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v850-dis.c
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v850-opc.c
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vax-dis.c
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visium-dis.c
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visium-opc.c
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wasm32-dis.c
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xgate-dis.c
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xgate-opc.c
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xstormy16-asm.c
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xstormy16-desc.c
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xstormy16-desc.h
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xstormy16-dis.c
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xstormy16-ibld.c
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xstormy16-opc.c
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xstormy16-opc.h
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xtensa-dis.c
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z8k-dis.c
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z8k-opc.h
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z8kgen.c
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z80-dis.c
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