binutils-gdb/ld/testsuite/ld-arc/arclinux-nps.d
Claudiu Zissulescu 0d0b0a378e [ARC] Update ld tests.
ld/
xxxx-xx-xx  Claudiu Zissulescu  <claziss@synopsys.com>

	* testsuite/ld-arc/tls_gd-01.d: Update test.
	* testsuite/ld-arc/arclinux-nps.d: Add cpu option.
2018-11-09 13:24:29 +02:00

51 lines
2.2 KiB
Makefile

#source: arclinux-nps.s
#as: -mcpu=arc700 -mnps400
#ld: -marclinux_nps
#objdump: -dr
.*: +file format .*arc.*
Disassembly of section .text:
[0-9a-f]+ <.*>:
[0-9a-f]+: 200a 0f80 57f0 0000 mov r0,0x57f00000
[0-9a-f]+: 200a 0f80 57f0 0000 mov r0,0x57f00000
[0-9a-f]+: 200a 0f80 57f0 8000 mov r0,0x57f08000
[0-9a-f]+: 200a 0f80 57f0 8000 mov r0,0x57f08000
[0-9a-f]+: 200a 0f80 5800 0000 mov r0,0x58000000
[0-9a-f]+: 200a 0f80 5880 0000 mov r0,0x58800000
[0-9a-f]+: 200a 0f80 5900 0000 mov r0,0x59000000
[0-9a-f]+: 200a 0f80 5980 0000 mov r0,0x59800000
[0-9a-f]+: 200a 0f80 5a00 0000 mov r0,0x5a000000
[0-9a-f]+: 200a 0f80 5a80 0000 mov r0,0x5a800000
[0-9a-f]+: 200a 0f80 5b00 0000 mov r0,0x5b000000
[0-9a-f]+: 200a 0f80 5b80 0000 mov r0,0x5b800000
[0-9a-f]+: 200a 0f80 5c00 0000 mov r0,0x5c000000
[0-9a-f]+: 200a 0f80 5c80 0000 mov r0,0x5c800000
[0-9a-f]+: 200a 0f80 5d00 0000 mov r0,0x5d000000
[0-9a-f]+: 200a 0f80 5d80 0000 mov r0,0x5d800000
[0-9a-f]+: 200a 0f80 5e00 0000 mov r0,0x5e000000
[0-9a-f]+: 200a 0f80 5e80 0000 mov r0,0x5e800000
[0-9a-f]+: 200a 0f80 5f00 0000 mov r0,0x5f000000
[0-9a-f]+: 200a 0f80 5f80 0000 mov r0,0x5f800000
[0-9a-f]+: 200a 0f80 57f0 0000 mov r0,0x57f00000
[0-9a-f]+: 200a 0f80 57f0 0000 mov r0,0x57f00000
[0-9a-f]+: 200a 0f80 57f0 8000 mov r0,0x57f08000
[0-9a-f]+: 200a 0f80 57f0 8000 mov r0,0x57f08000
[0-9a-f]+: 200a 0f80 5800 0000 mov r0,0x58000000
[0-9a-f]+: 200a 0f80 5880 0000 mov r0,0x58800000
[0-9a-f]+: 200a 0f80 5900 0000 mov r0,0x59000000
[0-9a-f]+: 200a 0f80 5980 0000 mov r0,0x59800000
[0-9a-f]+: 200a 0f80 5a00 0000 mov r0,0x5a000000
[0-9a-f]+: 200a 0f80 5a80 0000 mov r0,0x5a800000
[0-9a-f]+: 200a 0f80 5b00 0000 mov r0,0x5b000000
[0-9a-f]+: 200a 0f80 5b80 0000 mov r0,0x5b800000
[0-9a-f]+: 200a 0f80 5c00 0000 mov r0,0x5c000000
[0-9a-f]+: 200a 0f80 5c80 0000 mov r0,0x5c800000
[0-9a-f]+: 200a 0f80 5d00 0000 mov r0,0x5d000000
[0-9a-f]+: 200a 0f80 5d80 0000 mov r0,0x5d800000
[0-9a-f]+: 200a 0f80 5e00 0000 mov r0,0x5e000000
[0-9a-f]+: 200a 0f80 5e80 0000 mov r0,0x5e800000
[0-9a-f]+: 200a 0f80 5f00 0000 mov r0,0x5f000000
[0-9a-f]+: 200a 0f80 5f80 0000 mov r0,0x5f800000