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18d2988e5d
Now that defs.h, server.h and common-defs.h are included via the `-include` option, it is no longer necessary for source files to include them. Remove all the inclusions of these files I could find. Update the generation scripts where relevant. Change-Id: Ia026cff269c1b7ae7386dd3619bc9bb6a5332837 Approved-By: Pedro Alves <pedro@palves.net>
292 lines
8.2 KiB
C
292 lines
8.2 KiB
C
/* Target-dependent code for NetBSD/alpha.
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Copyright (C) 2002-2024 Free Software Foundation, Inc.
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Contributed by Wasabi Systems, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#include "frame.h"
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#include "gdbcore.h"
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#include "osabi.h"
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#include "regcache.h"
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#include "regset.h"
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#include "value.h"
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#include "alpha-tdep.h"
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#include "alpha-bsd-tdep.h"
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#include "netbsd-tdep.h"
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#include "solib-svr4.h"
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#include "target.h"
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/* Core file support. */
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/* Sizeof `struct reg' in <machine/reg.h>. */
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#define ALPHANBSD_SIZEOF_GREGS (32 * 8)
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/* Sizeof `struct fpreg' in <machine/reg.h. */
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#define ALPHANBSD_SIZEOF_FPREGS ((32 * 8) + 8)
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/* Supply register REGNUM from the buffer specified by FPREGS and LEN
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in the floating-point register set REGSET to register cache
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REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
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static void
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alphanbsd_supply_fpregset (const struct regset *regset,
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struct regcache *regcache,
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int regnum, const void *fpregs, size_t len)
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{
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const gdb_byte *regs = (const gdb_byte *) fpregs;
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int i;
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gdb_assert (len >= ALPHANBSD_SIZEOF_FPREGS);
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for (i = ALPHA_FP0_REGNUM; i < ALPHA_FP0_REGNUM + 31; i++)
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{
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if (regnum == i || regnum == -1)
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regcache->raw_supply (i, regs + (i - ALPHA_FP0_REGNUM) * 8);
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}
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if (regnum == ALPHA_FPCR_REGNUM || regnum == -1)
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regcache->raw_supply (ALPHA_FPCR_REGNUM, regs + 32 * 8);
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}
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/* Supply register REGNUM from the buffer specified by GREGS and LEN
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in the general-purpose register set REGSET to register cache
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REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
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static void
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alphanbsd_aout_supply_gregset (const struct regset *regset,
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struct regcache *regcache,
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int regnum, const void *gregs, size_t len)
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{
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const gdb_byte *regs = (const gdb_byte *) gregs;
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int i;
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/* Table to map a GDB register number to a trapframe register index. */
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static const int regmap[] =
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{
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0, 1, 2, 3,
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4, 5, 6, 7,
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8, 9, 10, 11,
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12, 13, 14, 15,
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30, 31, 32, 16,
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17, 18, 19, 20,
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21, 22, 23, 24,
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25, 29, 26
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};
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gdb_assert (len >= ALPHANBSD_SIZEOF_GREGS);
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for (i = 0; i < ARRAY_SIZE(regmap); i++)
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{
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if (regnum == i || regnum == -1)
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regcache->raw_supply (i, regs + regmap[i] * 8);
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}
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if (regnum == ALPHA_PC_REGNUM || regnum == -1)
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regcache->raw_supply (ALPHA_PC_REGNUM, regs + 31 * 8);
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if (len >= ALPHANBSD_SIZEOF_GREGS + ALPHANBSD_SIZEOF_FPREGS)
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{
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regs += ALPHANBSD_SIZEOF_GREGS;
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len -= ALPHANBSD_SIZEOF_GREGS;
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alphanbsd_supply_fpregset (regset, regcache, regnum, regs, len);
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}
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}
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/* Supply register REGNUM from the buffer specified by GREGS and LEN
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in the general-purpose register set REGSET to register cache
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REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
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static void
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alphanbsd_supply_gregset (const struct regset *regset,
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struct regcache *regcache,
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int regnum, const void *gregs, size_t len)
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{
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const gdb_byte *regs = (const gdb_byte *) gregs;
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int i;
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if (len >= ALPHANBSD_SIZEOF_GREGS + ALPHANBSD_SIZEOF_FPREGS)
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{
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alphanbsd_aout_supply_gregset (regset, regcache, regnum, gregs, len);
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return;
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}
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for (i = 0; i < ALPHA_ZERO_REGNUM; i++)
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{
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if (regnum == i || regnum == -1)
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regcache->raw_supply (i, regs + i * 8);
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}
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if (regnum == ALPHA_PC_REGNUM || regnum == -1)
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regcache->raw_supply (ALPHA_PC_REGNUM, regs + 31 * 8);
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}
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/* NetBSD/alpha register sets. */
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static const struct regset alphanbsd_gregset =
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{
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NULL,
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alphanbsd_supply_gregset,
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NULL,
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REGSET_VARIABLE_SIZE
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};
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static const struct regset alphanbsd_fpregset =
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{
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NULL,
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alphanbsd_supply_fpregset
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};
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/* Iterate over supported core file register note sections. */
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void
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alphanbsd_iterate_over_regset_sections (struct gdbarch *gdbarch,
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iterate_over_regset_sections_cb *cb,
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void *cb_data,
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const struct regcache *regcache)
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{
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cb (".reg", ALPHANBSD_SIZEOF_GREGS, ALPHANBSD_SIZEOF_GREGS,
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&alphanbsd_gregset, NULL, cb_data);
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cb (".reg2", ALPHANBSD_SIZEOF_FPREGS, ALPHANBSD_SIZEOF_FPREGS,
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&alphanbsd_fpregset, NULL, cb_data);
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}
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/* Signal trampolines. */
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/* Under NetBSD/alpha, signal handler invocations can be identified by the
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designated code sequence that is used to return from a signal handler.
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In particular, the return address of a signal handler points to the
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following code sequence:
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ldq a0, 0(sp)
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lda sp, 16(sp)
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lda v0, 295(zero) # __sigreturn14
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call_pal callsys
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Each instruction has a unique encoding, so we simply attempt to match
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the instruction the PC is pointing to with any of the above instructions.
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If there is a hit, we know the offset to the start of the designated
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sequence and can then check whether we really are executing in the
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signal trampoline. If not, -1 is returned, otherwise the offset from the
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start of the return sequence is returned. */
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static const gdb_byte sigtramp_retcode[] =
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{
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0x00, 0x00, 0x1e, 0xa6, /* ldq a0, 0(sp) */
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0x10, 0x00, 0xde, 0x23, /* lda sp, 16(sp) */
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0x27, 0x01, 0x1f, 0x20, /* lda v0, 295(zero) */
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0x83, 0x00, 0x00, 0x00, /* call_pal callsys */
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};
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#define RETCODE_NWORDS 4
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#define RETCODE_SIZE (RETCODE_NWORDS * 4)
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static LONGEST
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alphanbsd_sigtramp_offset (struct gdbarch *gdbarch, CORE_ADDR pc)
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{
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gdb_byte ret[RETCODE_SIZE], w[4];
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LONGEST off;
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int i;
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if (target_read_memory (pc, w, 4) != 0)
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return -1;
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for (i = 0; i < RETCODE_NWORDS; i++)
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{
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if (memcmp (w, sigtramp_retcode + (i * 4), 4) == 0)
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break;
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}
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if (i == RETCODE_NWORDS)
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return (-1);
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off = i * 4;
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pc -= off;
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if (target_read_memory (pc, ret, sizeof (ret)) != 0)
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return -1;
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if (memcmp (ret, sigtramp_retcode, RETCODE_SIZE) == 0)
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return off;
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return -1;
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}
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static int
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alphanbsd_pc_in_sigtramp (struct gdbarch *gdbarch,
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CORE_ADDR pc, const char *func_name)
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{
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return (nbsd_pc_in_sigtramp (pc, func_name)
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|| alphanbsd_sigtramp_offset (gdbarch, pc) >= 0);
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}
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static CORE_ADDR
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alphanbsd_sigcontext_addr (const frame_info_ptr &frame)
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{
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/* FIXME: This is not correct for all versions of NetBSD/alpha.
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We will probably need to disassemble the trampoline to figure
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out which trampoline frame type we have. */
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if (!get_next_frame (frame))
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return 0;
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return get_frame_base (get_next_frame (frame));
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}
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static void
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alphanbsd_init_abi (struct gdbarch_info info,
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struct gdbarch *gdbarch)
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{
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alpha_gdbarch_tdep *tdep = gdbarch_tdep<alpha_gdbarch_tdep> (gdbarch);
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/* Hook into the DWARF CFI frame unwinder. */
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alpha_dwarf2_init_abi (info, gdbarch);
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/* Hook into the MDEBUG frame unwinder. */
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alpha_mdebug_init_abi (info, gdbarch);
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nbsd_init_abi (info, gdbarch);
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/* NetBSD/alpha does not provide single step support via ptrace(2); we
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must use software single-stepping. */
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set_gdbarch_software_single_step (gdbarch, alpha_software_single_step);
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/* NetBSD/alpha has SVR4-style shared libraries. */
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set_solib_svr4_fetch_link_map_offsets
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(gdbarch, svr4_lp64_fetch_link_map_offsets);
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tdep->dynamic_sigtramp_offset = alphanbsd_sigtramp_offset;
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tdep->pc_in_sigtramp = alphanbsd_pc_in_sigtramp;
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tdep->sigcontext_addr = alphanbsd_sigcontext_addr;
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tdep->jb_pc = 2;
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tdep->jb_elt_size = 8;
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set_gdbarch_iterate_over_regset_sections
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(gdbarch, alphanbsd_iterate_over_regset_sections);
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}
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void _initialize_alphanbsd_tdep ();
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void
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_initialize_alphanbsd_tdep ()
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{
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/* Even though NetBSD/alpha used ELF since day one, it used the
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traditional a.out-style core dump format before NetBSD 1.6, but
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we don't support those. */
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gdbarch_register_osabi (bfd_arch_alpha, 0, GDB_OSABI_NETBSD,
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alphanbsd_init_abi);
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}
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