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fd67aa1129
Adds two new external authors to etc/update-copyright.py to cover bfd/ax_tls.m4, and adds gprofng to dirs handled automatically, then updates copyright messages as follows: 1) Update cgen/utils.scm emitted copyrights. 2) Run "etc/update-copyright.py --this-year" with an extra external author I haven't committed, 'Kalray SA.', to cover gas testsuite files (which should have their copyright message removed). 3) Build with --enable-maintainer-mode --enable-cgen-maint=yes. 4) Check out */po/*.pot which we don't update frequently.
268 lines
7.5 KiB
Plaintext
268 lines
7.5 KiB
Plaintext
@c Copyright (C) 2012-2024 Free Software Foundation, Inc.
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@c This is part of the GAS manual.
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@c For copying conditions, see the file as.texinfo.
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@c man end
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@ifset GENERIC
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@page
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@node NiosII-Dependent
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@chapter Nios II Dependent Features
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@end ifset
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@ifclear GENERIC
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@node Machine Dependencies
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@chapter Nios II Dependent Features
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@end ifclear
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@cindex Altera Nios II support
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@cindex Nios support
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@cindex Nios II support
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@menu
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* Nios II Options:: Options
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* Nios II Syntax:: Syntax
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* Nios II Relocations:: Relocations
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* Nios II Directives:: Nios II Machine Directives
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* Nios II Opcodes:: Opcodes
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@end menu
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@node Nios II Options
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@section Options
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@cindex Nios II options
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@cindex options for Nios II
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@c man begin OPTIONS
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@table @gcctabopt
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@cindex @code{relax-section} command-line option, Nios II
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@item -relax-section
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Replace identified out-of-range branches with PC-relative @code{jmp}
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sequences when possible. The generated code sequences are suitable
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for use in position-independent code, but there is a practical limit
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on the extended branch range because of the length of the sequences.
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This option is the default.
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@cindex @code{relax-all} command-line option, Nios II
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@item -relax-all
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Replace branch instructions not determinable to be in range
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and all call instructions with @code{jmp} and @code{callr} sequences
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(respectively). This option generates absolute relocations against the
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target symbols and is not appropriate for position-independent code.
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@cindex @code{no-relax} command-line option, Nios II
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@item -no-relax
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Do not replace any branches or calls.
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@cindex @code{EB} command-line option, Nios II
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@item -EB
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Generate big-endian output.
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@cindex @code{EL} command-line option, Nios II
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@item -EL
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Generate little-endian output. This is the default.
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@cindex @code{march} command-line option, Nios II
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@item -march=@var{architecture}
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This option specifies the target architecture. The assembler issues
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an error message if an attempt is made to assemble an instruction which
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will not execute on the target architecture. The following architecture
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names are recognized:
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@code{r1},
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@code{r2}.
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The default is @code{r1}.
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@end table
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@c man end
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@node Nios II Syntax
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@section Syntax
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@menu
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* Nios II Chars:: Special Characters
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@end menu
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@node Nios II Chars
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@subsection Special Characters
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@cindex line comment character, Nios II
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@cindex Nios II line comment character
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@cindex line separator character, Nios II
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@cindex Nios II line separator character
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@samp{#} is the line comment character.
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@samp{;} is the line separator character.
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@node Nios II Relocations
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@section Nios II Machine Relocations
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@cindex machine relocations, Nios II
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@cindex Nios II machine relocations
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@table @code
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@cindex @code{hiadj} directive, Nios II
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@item %hiadj(@var{expression})
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Extract the upper 16 bits of @var{expression} and add
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one if the 15th bit is set.
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The value of @code{%hiadj(@var{expression})} is:
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@smallexample
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((@var{expression} >> 16) & 0xffff) + ((@var{expression} >> 15) & 0x01)
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@end smallexample
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The @code{%hiadj} relocation is intended to be used with
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the @code{addi}, @code{ld} or @code{st} instructions
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along with a @code{%lo}, in order to load a 32-bit constant.
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@smallexample
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movhi r2, %hiadj(symbol)
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addi r2, r2, %lo(symbol)
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@end smallexample
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@cindex @code{hi} directive, Nios II
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@item %hi(@var{expression})
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Extract the upper 16 bits of @var{expression}.
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@cindex @code{lo} directive, Nios II
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@item %lo(@var{expression})
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Extract the lower 16 bits of @var{expression}.
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@cindex @code{gprel} directive, Nios II
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@item %gprel(@var{expression})
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Subtract the value of the symbol @code{_gp} from
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@var{expression}.
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The intention of the @code{%gprel} relocation is
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to have a fast small area of memory which only
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takes a 16-bit immediate to access.
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@smallexample
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.section .sdata
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fastint:
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.int 123
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.section .text
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ldw r4, %gprel(fastint)(gp)
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@end smallexample
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@cindex @code{call} directive, Nios II
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@cindex @code{call_lo} directive, Nios II
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@cindex @code{call_hiadj} directive, Nios II
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@cindex @code{got} directive, Nios II
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@cindex @code{got_lo} directive, Nios II
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@cindex @code{got_hiadj} directive, Nios II
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@cindex @code{gotoff} directive, Nios II
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@cindex @code{gotoff_lo} directive, Nios II
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@cindex @code{gotoff_hiadj} directive, Nios II
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@cindex @code{tls_gd} directive, Nios II
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@cindex @code{tls_ie} directive, Nios II
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@cindex @code{tls_le} directive, Nios II
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@cindex @code{tls_ldm} directive, Nios II
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@cindex @code{tls_ldo} directive, Nios II
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@item %call(@var{expression})
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@item %call_lo(@var{expression})
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@item %call_hiadj(@var{expression})
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@itemx %got(@var{expression})
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@itemx %got_lo(@var{expression})
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@itemx %got_hiadj(@var{expression})
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@itemx %gotoff(@var{expression})
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@itemx %gotoff_lo(@var{expression})
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@itemx %gotoff_hiadj(@var{expression})
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@itemx %tls_gd(@var{expression})
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@itemx %tls_ie(@var{expression})
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@itemx %tls_le(@var{expression})
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@itemx %tls_ldm(@var{expression})
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@itemx %tls_ldo(@var{expression})
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These relocations support the ABI for Linux Systems documented in the
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@cite{Nios II Processor Reference Handbook}.
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@end table
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@node Nios II Directives
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@section Nios II Machine Directives
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@cindex machine directives, Nios II
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@cindex Nios II machine directives
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@table @code
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@cindex @code{align} directive, Nios II
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@item .align @var{expression} [, @var{expression}]
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This is the generic @code{.align} directive, however
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this aligns to a power of two.
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@cindex @code{half} directive, Nios II
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@item .half @var{expression}
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Create an aligned constant 2 bytes in size.
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@cindex @code{word} directive, Nios II
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@item .word @var{expression}
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Create an aligned constant 4 bytes in size.
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@cindex @code{dword} directive, Nios II
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@item .dword @var{expression}
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Create an aligned constant 8 bytes in size.
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@cindex @code{2byte} directive, Nios II
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@item .2byte @var{expression}
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Create an unaligned constant 2 bytes in size.
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@cindex @code{4byte} directive, Nios II
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@item .4byte @var{expression}
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Create an unaligned constant 4 bytes in size.
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@cindex @code{8byte} directive, Nios II
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@item .8byte @var{expression}
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Create an unaligned constant 8 bytes in size.
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@cindex @code{16byte} directive, Nios II
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@item .16byte @var{expression}
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Create an unaligned constant 16 bytes in size.
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@cindex @code{set noat} directive, Nios II
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@item .set noat
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Allows assembly code to use @code{at} register without
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warning. Macro or relaxation expansions
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generate warnings.
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@cindex @code{set at} directive, Nios II
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@item .set at
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Assembly code using @code{at} register generates
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warnings, and macro expansion and relaxation are
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enabled.
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@cindex @code{set nobreak} directive, Nios II
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@item .set nobreak
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Allows assembly code to use @code{ba} and @code{bt}
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registers without warning.
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@cindex @code{set break} directive, Nios II
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@item .set break
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Turns warnings back on for using @code{ba} and @code{bt}
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registers.
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@cindex @code{set norelax} directive, Nios II
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@item .set norelax
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Do not replace any branches or calls.
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@cindex @code{set relaxsection} directive, Nios II
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@item .set relaxsection
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Replace identified out-of-range branches with
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@code{jmp} sequences (default).
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@cindex @code{set relaxall} directive, Nios II
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@item .set relaxsection
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Replace all branch and call instructions with
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@code{jmp} and @code{callr} sequences.
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@cindex @code{set} directive, Nios II
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@item .set @dots{}
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All other @code{.set} are the normal use.
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@end table
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@node Nios II Opcodes
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@section Opcodes
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@cindex Nios II opcodes
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@cindex opcodes for Nios II
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@code{@value{AS}} implements all the standard Nios II opcodes documented in the
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@cite{Nios II Processor Reference Handbook}, including the assembler
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pseudo-instructions.
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