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fd96c1f320
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404 Commits

Author SHA1 Message Date
Michael Meissner
fd96c1f320 PSIM 1996/9/19 update 1996-09-20 12:36:54 +00:00
Ian Lance Taylor
458e1f58e6 Fix multiplication, ldxc1, and floating point conversion. See ChangeLog. 1996-09-20 03:07:43 +00:00
Michael Meissner
c12f5c678e Make sure cmp{,eq,u}i use correct casts 1996-09-20 01:42:15 +00:00
Ian Lance Taylor
c05d17211e * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC. 
It's OK to have a mult follow a mult.  What's not OK is to have a
	mult follow an mfhi.
 1996-09-19 22:52:26 +00:00
Ian Lance Taylor
47c6ce6c2d * gencode.c (process_instructions): Correct shift count for 32 
bit shift instructions.  Correct sign extension for arithmetic
	shifts to not shift the number of bits in the type.
 1996-09-19 21:55:10 +00:00
Ian Lance Taylor
cc5201d78c * gencode.c (process_instructions): Correct handling of nor 
instruction.
 1996-09-19 19:35:09 +00:00
Michael Meissner
addb61a5b2 Fix tracing info 1996-09-19 17:23:21 +00:00
Michael Meissner
f061ddf67d Make sure there is a trailing space after the instruction 1996-09-19 15:06:37 +00:00
Michael Meissner
891513ee79 Provide macros that can be overriden for the width of the PC & line number fields 1996-09-19 15:02:27 +00:00
Michael Meissner
74473ea10c Add dependencies on lib{bfd,iberity}.a 1996-09-19 14:31:01 +00:00
Michael Meissner
0535fa1aa0 Rename sim_bfd -> exec_bfd for gdb compatibility 1996-09-18 13:56:57 +00:00
Michael Meissner
a49a15ade8 Make exit/stop return correct exit value; Add line number tracing. 1996-09-18 13:23:31 +00:00
Jackie Smith Cashion
3733d1095f Tue Sep 17 11:04:50 1996 James G. Smith <jsmith@cygnus.co.uk> 
* run.c (main): Explicitly cast malloc() parameter.

This is needed because for certain builds the size field being given
to malloc() is actually 64bits long, and without a cast or malloc
prototype the resulting value used by malloc() depended on the host
endianness, and how long long paramaters are passed into functions.
 1996-09-17 10:10:35 +00:00
Jackie Smith Cashion
f24b7b69ee Mon Sep 16 11:38:16 1996 James G. Smith <jsmith@cygnus.co.uk> 
* interp.c (sim_monitor): Improved monitor printf
 	simulation. Tidied up simulator warnings, and added "--log" option
 	for directing warning message output.
	* gencode.c: Use sim_warning() rather than WARNING macro.
 1996-09-16 10:47:20 +00:00
Michael Meissner
215ac9533c Fix brf0{t,f}.s <label> -> instruction not to execute instruction if branch succeeds 1996-09-15 03:46:52 +00:00
Ian Lance Taylor
ad0d14e7a2 * Makefile.in (CC_FOR_BUILD): New variable. 
(AR, AR_FLAGS, BISON, MAKEINFO): Remove duplicate variables.
	(RANLIB, CC): Likewise.
	(end): Use $(CC_FOR_BUILD), not $(CC).
	* configure.in: Set CC_FOR_BUILD.
	* configure: Rebuild.
 1996-09-14 04:05:41 +00:00
Michael Meissner
19d44375ff For unknown traps, print contents of registers and continue execution 1996-09-14 02:36:40 +00:00
Mark Alexander
65c0d7dee9 * simops.c (OP_5F00): Fix problems with system calls. 1996-09-12 19:52:40 +00:00
Michael Meissner
a57190924d Correct trap tracing information 1996-09-12 16:20:05 +00:00
Michael Meissner
1d00ce8392 Print line # and function name or filename if they exist for each PC. 1996-09-12 16:06:02 +00:00
Michael Meissner
9b280a864b Store bfd pointer in a global variable 1996-09-12 15:28:40 +00:00
Michael Meissner
5ceef1b54f fix typo 1996-09-11 22:56:25 +00:00
Michael Meissner
ead4a3f157 Add tracing support; Fix some problems with hardwired sizes 1996-09-11 20:54:21 +00:00
Jeff Law
9909e232c0 * interp.c (hash): Make this an inline function 
when compiling with GCC.  Simplify.
        * simpos.c: Explicitly include "sys/syscall.h".  Remove
        some #if 0'd code.  Enable more emulated syscalls.
Checking in more stuff.
 1996-09-10 02:51:07 +00:00
Michael Meissner
2254cd90a9 Addi needs to set the carry 1996-09-09 21:12:46 +00:00
Michael Meissner
308f64d3ac Fix ld2w tracing 1996-09-09 20:45:33 +00:00
Michael Meissner
60fc5b7270 Correct tracing of cpfg 1996-09-09 20:10:31 +00:00
Michael Meissner
293c76a376 Make ex{f,t}* tests agree with book 1996-09-09 18:24:18 +00:00
Michael Meissner
069398aaff Fix accumulator shifts 1996-09-09 17:30:36 +00:00
Stu Grossman
fad4a760fd * erc32.c (port_init): Disable this for __GO32__ (got no pty's 
there either...).
 1996-09-08 23:35:50 +00:00
Ian Lance Taylor
f39a09c9ad * configure.in: Do build erc32 for DOS and Windows hosts. 
* configure: Rebuild.
 1996-09-08 21:24:10 +00:00
Martin Hunt
ea2155e858 Fri Sep 6 17:56:17 1996 Martin M. Hunt <hunt@pizza.cygnus.com> 
* simops.c (OP_2600, OP_2601): Changed min and max comparisons
	to use signed register values.
 1996-09-07 00:58:25 +00:00
Stu Grossman
1852b017b8 * Makefile.in erc32/Makefile.in: Don't set srcroot. This should 
be inherited from the parent.  Remove INSTALL_XFORM and
	INSTALL_XFORM1.  Make INSTALL be set from configure.
 1996-09-05 01:16:22 +00:00
Ian Lance Taylor
68867afb88 * configure.in: Only build the MIPS simulator if we are using 
gcc.
	* configure: Rebuild.
 1996-09-04 19:50:55 +00:00
Michael Meissner
9b86c7e2e2 Second pass at canadian cross 1996-09-04 19:11:53 +00:00
Michael Meissner
1eaaf3050e First cut at dealing with canadian crosses; make -t in debugger set d10v_debug if DEBUG 1996-09-04 18:50:13 +00:00
Michael Meissner
7eebfc6296 More debug support; Enable -t/-v to work correctly; Add --enable-sim-cflags configure switch 1996-09-04 17:42:51 +00:00
Michael Meissner
87178dbdf7 Enhance debug support 1996-09-04 15:41:43 +00:00
Mark Alexander
8719be26c4 * simops.c: Include correct syscall.h for d10v, not host's. 
Fix #ifdef SYS_stat.
 1996-09-04 11:51:06 +00:00
Jeff Law
9fca2fd3c6 * gencode.c: Fix various indention & style problems. 
Remove test code.  Remove #if 0 code.
        * interp.c: Provide prototypes for all static functions.
        Fix minor indention problems.
        (sim_open, sim_resume): Remove unused variables.
        (sim_read): Return type is "int".
        * simops.c: Remove unused variables.
        (divh): Make result of divide-by-zero zero.
        (setf): Initialize result to keep compiler quiet.
        (sar instructions): These just clear the overflow bit.
        * v850_sim.h: Provide prototypes for put_byte, put_half
        and put_word.
Cleaning up.
 1996-09-03 18:31:48 +00:00
Michael Meissner
63a91cfb9d Portability fixes; re-add printf/putchar traps 1996-09-03 18:01:03 +00:00
Jeff Law
2b6b2c6d8e Fix typpppo 1996-09-03 17:15:16 +00:00
Jeff Law
d81352b8b8 * interp.c: OP should be an array of 32bit operands! 
(v850_callback): Declare.
        (do_format_5): Fix extraction of OP[0].
        (sim_size): Remove debugging printf.
        (sim_set_callbacks): Do something useful.
        (sim_stop_reason): Gross hacks to get c-torture running.
        * simops.c: Simplify code for computing targets of bCC
        insns.   Invert 's' bit if 'ov' bit is set for some
        instructions.  Fix 'cy' bit handling for numerous
        instructions.  Make the simulator stop when a halt
        instruction is encountered.  Very crude support for
        emulated syscalls (trap 0).
        * v850_sim.h: Include "callback.h" and declare
        v850_callback.  Items in the operand array are 32bits.
Fixes & syscall stuff.
 1996-09-03 16:25:51 +00:00
Jeff Law
82feb39ed1 Opps. Forgot to commit this a few days ago. 1996-08-31 02:49:05 +00:00
Jeff Law
787d66bb4d * simops.c: Fix "not1" and "set1". 1996-08-30 21:55:26 +00:00
Jeff Law
3046d87986 * simops.c: Don't forget to initialize temp for 
"ld.h" and "ld.w"
 1996-08-30 20:15:51 +00:00
Jeff Law
ba853302f2 * interp.c: Remove various debugging printfs. 1996-08-30 16:42:49 +00:00
Jeff Law
0e4ccc58f2 * simops.c: Fix satadd, satsub boundary case handling. 1996-08-30 16:41:39 +00:00
Jeff Law
83fc3bac9f * interp.c (hash): Fix. 
* interp.c (do_format_8): Get operands correctly and
        call the target function.
        * simops.c: Rough cut at "clr1", "not1", "set1", and "tst1".
 1996-08-30 16:35:10 +00:00
Jeff Law
3cb6bf7818 * interp.c (do_format_4): Get operands correctly and 
call the target function.
        * simops.c: Rough cut at "sld.b", "sld.h", "sld.w", "sst.b",
        "sst.h", and "sst.w".
 1996-08-30 05:49:07 +00:00