as relaxable if embedded system, make weak syms non-relaxable.
Move definition..
(tc_m68k_fix_adjustable): ..so it can be used here.
(md_apply_fix_2): Sign extend without conditional.
optimize differences between symbols in code sections to
constants.
(mn10300_fix_adjustable): Don't adjust to section+offset
relocations pointing at symbols in code sections.
sections as well.
(elfNN_ia64_final_write_processing): Map .gnu.linkonce.ia64unw.FOO
to .gnu.linkonce.t.FOO text section.
* readelf.c (process_unwind): Print all unwind sections, not just
one.
* config/tc-ia64.c (special_linkonce_name): New.
(make_unw_section): Map .gnu.linkonce.t.FOO text section into
.gnu.linkonce.ia64unw{,i}.FOO.
(ia64_elf_section_type): Handle .gnu.linkonce.ia64unw{,i}.FOO.
(dot_endp): Add comment about it.
* elf/ia64.h (ELF_STRING_ia64_unwind_once): Define.
(ELF_STRING_ia64_unwind_info_once): Define.
* emulparams/elf64_ia64.sh (OTHER_READONLY_SECTIONS): Put
.gnu.linkonce.ia64unw{,i} sections into corresponding .IA_64.unwind*
output sections.
* emulparams/elf64_aix.sh (OTHER_READONLY_SECTIONS): Likewise.
* config/tc-mips.c: Support ELF64 for traditional MIPS targets.
* Makefile.am: (TARG_ENV_HFILES): Add tc-mips.h.
* Makefile.in: Regenerated.
* configure.in: Use traditional MIPS targets for Linux/MIPS.
* configure: Regenerated.
(md_assemble): Call cris_insn_first_word_frag to get the first
frag in an insn, not frag_more. Don't call dwarf2_emit_insn at
end. Drop variable insn_size.
(gen_bdap): Call cris_insn_first_word_frag, not frag_more.
(cris_sym_leading_underscore): Wrap first as_bad parameter in _().
(cris_sym_no_leading_underscore, s_cris_file, s_cris_loc): Ditto.
ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, STATE_UNDF)>: Don't emit
32-bit branch, just set fragP->fr_subtype. Set fragP->fr_var.
<all cases>: Always set fragP->fr_var using md_cris_relax_table.
Add cases to cover all relax states.
* config/tc-ia64.c (md): New member keep_pending_output.
(ia64_flush_pending_output): Flush only if md.keep_pending_output
is not set.
(dot_xdata): Turn on md.keep_pending_output for the duration of
this function.
(dot_xfloat_cons): Ditto.
(dot_xstringer): Ditto.
(dot_xdata_ua): Ditto.
(dot_xfloat_cons_ua): Ditto.
* config/tc-ia64.c (ia64_unrecognized_line, case '['): Add local
label support.
(md_assemble [smallest displacement]): Use correct field of i.op[] union.
(md_assemble [JumpInterSegment output]): Use correct i.disp_reloc[].
(md_assemble [immediate output]): Likewise.
* config/tc-i386.c (tc_gen_reloc): Remove ugly hack which is not needed
anymore since we use bfd_elf_generic_reloc now.
(md_apply_fix3): Only apply hack for partial_inplace if not using RELA.
* cpu-ia64-opc.c (elf64_ia64_operands}: Fix typo: error string for
C8 said "1" instead of "8". Clarify error string for IMM22:
"signed integer" instead of just "integer".
* config/tc-ia64.c (enum operand_match_result): New type.
(operand_match): Change return type to operand_match_result.
Fix all returns appropriately, adding support for returning the
out-of-range result.
(parse_operands): New locals result, error_pos, out_of_range_pos,
curr_out_of_range_pos. Rewrite operand matching loop to give better
error messages.
* ia64-opc-d.c (ia64_opcodes_d): Break the "add" pattern into two
separate variants: one for IMM22 and the other for IMM14.
* ia64-asmtab.c: Regenerate.
* config/tc-ia64.c (struct unwind): Add member "prologue_count".
(dot_proc): Clear unwind.prologue_count to zero.
(dot_prologue): Increment unwind.prologue_count.
(dot_restore): If second operand is omitted, use
unwind.prologue_count -1 for "ecount" (# of additional regions to
pop). Decrement unwind.prologue_count by number of regions
popped.
* configure.in (cpu_type, arch): Add a generic FreeBSD specification as
all FreeBSD platforms should look the same at this level.
* configure: Rebuilt.
* config/tc-i386.c: Add support for old FreeBSD a.out hosts.
Approved by: Philip Blundell <philb@gnu.org>
Message-Id: <E14URxF-00023n-00@kings-cross.london.uk.eu.org>
* config/tc-ia64.c (operand_match, case TAG13): Make a BFD_RELOC_UNUSED
reloc instead of a 0 reloc.
(md_apply_fix3): Check for BFD_RELOC_UNUSED instead of 0, and mark it
as done.
* config/tc-ia64.h (TC_RELOC_RTSYM_LOC_FIXUP): Likewise.
larger.
(relax_frag): Add segment parameter. Only call symbol_get_frag
once. Only call is_dnrange if the symbol is in the same segment,
and the symbol address is larger.
(relax_segment): Pass segment to md_relax_frag and relax_frag.
* write.h (relax_frag): Update declaration.
* config/tc-fr30.c (fr30_relax_frag): Add segment parameter. Pass
it to relax_frag.
* config/tc-m32r.c (m32r_relax_frag): Likewise.
* config/tc-m32r.h (md_relax_frag): Add segment parameter.
(m32r_relax_frag): Update declaration.
* config/tc-mips.h (md_relax_frag): Add segment parameter.
* config/tc-tic54x.h (md_relax_frag): Likewise.
* doc/internals.texi (CPU backend): Update documentation for
md_relax_frag.
instruction sequence consisting of a conditional jump of the
opposite sense around an unconditional jump to the target.
Add jumps/nojumps .arch modifier.
(ELF_TC_SPECIAL_SECTIONS): Drop .IA_64.unwind and .IA_64.unwind_info
(they're now handled via ia64_elf_section_type.
* config/tc-ia64.c (unwind): New members saved_text_seg,
saved_text_subseg, and force_unwind_entry.
(optimize_unw_records): New function to optimize away unnecessary
unwind directives.
(ia64_elf_section_type): New function.
(output_unw_records): Generate unwind info only if the size is
non-zero or if it's forced for some other reason (e.g.,
handlerdata or a personality routine).
(generate_unwind_image): Don't switch back to previous
section---stay inside the unwind info section instead so that
handlerdata that may follow goes into the right place.
(dot_handlerdata): Force generation of unwind entry and save the
current active text segment before generating unwind image.
(dot_unwentry): Force generation of unwind entry.
(dot_personality): Ditto.
(dot_endp): Generate unwind table entry only if there is
some unwind info or the unwind entry was forced.
* config/tc-ia64.c (make_unw_section_name): New macro to form
unwind section name.
(generate_unwind_image): Add "text_name" argument. Use it to
form unwind section name.
(dot_handlerdata): Determine current segment (section) name and
pass it to generate_unwind_image().
(dot_endp): Determine current segment (section) name and use
it to determine the appropriate unwind section name.
(ia64_md_do_align): Add missing ATTRIBUTE_UNUSED declarations to
n, fill, and max arguments.
function to select the header according to the cpu.
(md_after_pass_hook, md_do_align): Remove.
(md_cleanup, m68hc11_cleanup): Remove.
(md_pcrel_from_section): Declare.
* config/tc-m68hc11.c (build_dbranch_insn): Remove insn_size.
(build_jump_insn, build_insn): Likewise.
(m68hc11_listing_header): New function.
(m68hc11_cleanup): Remove.
* tc-i386.c (md_assemble): Return after the error message;
move testing for 64bit operands to proper place.
* i386.exp: Add tests for presence of 32bit versus 64bit output
format; run both 64bit and 32bit tests when format is available;
add x86_64 test.
* x86_64.s: New file.
* x86_64.d: New file.
(QWORD_MNEM_SUFFIX): New macro.
(CpuK6,CpuAthlon,CpuSledgehammer, Cpu64, CpuNo64, CpuUnknownFlags):
New macros
(CpuMMX,CpuSSE,Cpu3dnow, CpuUnknown): Renumber.
(IgnoreSize, DefaultSize, No_?Suf, FWait, IsString, regKludge, IsPrefix,
ImmExt): Renumber.
(Size64, No_qSuf, NoRex64, Rex64): New macros.
(Reg64, Imm32S, Imm64, Disp32S, Disp64): New macros.
(Imm8, Imm8S, Imm16, Imm32, Imm1, BaseIndex, Disp8, Disp16, Disp32,
InOutPortReg,ShiftCount, Control, Debug, Test, FloatReg, FloatAcc,
SReg2, SReg3, Acc, JumpAbsolute, RegMMX, RegXMM, EsSeg, InvMem): Renumber.
(Reg, WordReg): Add Reg64.
(Imm): Add Imm32S and Imm64.
(EncImm): New.
(Disp): Add Disp64 and Disp32S.
(AnyMem): Add Disp32S.
(RegRex, RegRex64): New macros.
(rex_byte): New type.
* tc-i386.c (set_16bit_code_flag): Kill.
(fits_in_unsigned_long, fits_in_signed_long): New functions.
(reloc): New parameter "signed"; support x86_64.
(set_code_flag): New.
(DEFAULT_ARCH): New macro; default to "i386".
(default_arch): New static variable.
(struct _i386_insn): New fields Operand_PCrel; rex.
(flag_16bit_code): Kill; All tests replaced to "flag_code == CODE_64BIT";
(flag_code): New enum and static variable.
(use_rela_relocations): New static variable.
(flag_code_names): New static variable.
(cpu_arch_flags): Default to CpuUnknownFlags|CpuNo64.
(cpu_arch): Add "sledgehammer"; Add CPUAthlon to Athlon and CpuK6 to
K6 and Athlon.
(i386_align_code): Return plain "nop" for x86_64.
(mode_from_disp_size): Support Disp32S.
(smallest_imm_type): Support Imm32S and Imm64.
(offset_in_range): Support size of 8.
(set_cpu_arch): Do not clobber to Cpu64/CpuNo64.
(md_pseudo_table): Add "code64"; use set_code_flat.
(md_begin): Emit sane error message on hash failure.
(tc_i386_fix_adjustable): Support x86_64 relocations.
(md_assemble): Support QWORD_MNEM_SUFFIX, REX registers,
instructions supported on particular arch just partially,
output of 64bit immediates, handling of Imm32S and Disp32S type.
(i386_immedaite): Support x86_64 relocations; support 64bit constants.
(i386_displacement): Likewise.
(i386_index_check): Cleanup; support 64bit addresses.
(md_apply_fix3): Support x86_64 relocation and rela.
(md_longopts): Add "32" and "64".
(md_parse_option): Add OPTION_32 and OPTION_64.
(i386_target_format): Call even for ELFs; choose between
elf64-x86-64 and elf32-i386.
(i386_validate_fix): Refuse GOTOFF in 64bit mode.
(tc_gen_reloc): Support rela relocations and x86_64.
(intel_e09_1): Support QWORD.
* i386.h (i386_optab): Replace "Imm" with "EncImm".
(i386_regtab): Add flags field.
* config/tc-i386.c (intel_e09_1): Only flag as a memory operand if
it's not an offset expression.
(intel_e10_1): Ditto. Also, if the operand is an offset expression,
keep the braces '[' and ']' in the output string.
(intel_e11): Ditto. Also remove comparison intel_parser.op_modifier
!= FLAT. There is no such op_modifier.
* elfxx-ia64.c (get_dyn_sym_info): Cast %p argument to void *.
* config/tc-ia64.h (ia64_init): Add prototype.
* gas/ia64/dv-imply.d, gas/ia64/dv-mutex.d, gas/ia64/dv-safe.d,
gas/ia64/dv-srlz.d, gas/ia64/opc-m.d: Update.
* ia64-dis.c (print_insn_ia64): Cast away const on ia64_free_opcode
argument.
* ia64_gen.c (insert_deplist): Cast sizeof result to int.
(print_dependency_table): Print NULL if semantics field not set.
(insert_opcode_dependencies): Mark cmp parameter as unused.
(print_main_table): Use fprintf_vma to print long long fields.
(main): Mark argv paramter as unused. Convert to old style definition.
* ia64-opc.c (ia64_find_dependency): Cast sizeof result to int.
* ia64-asmtab.c: Regnerate.
* tc-i386.c (md_assemble): Swap i.disp_relocs when using intel
syntax.
2000-11-30 Diego Novillo <dnovillo@redhat.com>
* intel.s, intel.d: New test for @GOT references.
jump>: Use as_bad_where instead of as_bad. Tweak error message
accordingly. Stabilize frag by updating fix part and resetting
variant part.
<undefined symbol, unconditional jump>: Ditto.
* config/obj-elf.h (ECOFF_DEBUGGING) [TC_ALPHA]: Adjust for
tri-state definition of alpha_flag_mdebug.
* config/tc-alpha.c (alpha_flag_mdebug): Init to -1.
(s_alpha_file): Store first .file directive.
(s_alpha_stab): New.
(md_pseudo_table): Add stabs and stabn.
* config/obj-elf.c (elf_frob_symbol): Support
".symver name,name2@@@nodename".
(elf_frob_file_before_adjust): Likewise.
* doc/as.texinfo: Updated for ".symver name,name2@@@nodename"
and ".symver name,name2@@@nodename".
Fix a typo.
* config/tc-ia64.c (struct unw_rec_list): Add slot_frag field.
(struct unwind): Add next_slot_frag field.
(slot_index): New parameters slot_frag and first_frag. Add code
to add in frag sizes when different. Add comments.
(fixup_unw_records): New locals first_frag and last_frag. Pass new
arguments to slot_index.
(emit_one_bundle): Set slot_frag field. Set next_slot_number after
loop end. Set next_slot_frag field.
* doc/as.texinfo (.symver): Updated for versioned symbol
reference.
* obj.h (format_ops): Add the frob_file_before_adjust field.
* config/obj-aout.c (aout_format_ops): Set the
frob_file_before_adjust field to 0.
* config/obj-coff.c (coff_format_ops): Likewise.
* config/obj-ecoff.c (ecoff_format_ops): Likewise.
* config/obj-elf.c (obj_elf_symver): Allow duplicated version
name.
(elf_frob_file_before_adjust): New function to remove unneeded
versioned symbols from the symbol table.
(elf_format_ops): Set the frob_file_before_adjust field to
elf_frob_file_before_adjust.
* config/obj-elf.h (obj_frob_file_before_adjust): Defined if
not defined.
* config/obj-multi.h (obj_frob_file_before_adjust): Defined.
* config/tc-ia64.c (md_shortopts, md_parse_option, md_show_usage):
Change M to m for -milp32 or -mlp64 to match gcc.
(dot_endp): Use bytes_per_address instead of 8.
(emit_one_bundle): Use number_to_chars_littleendian instead of
md_number_to_chars.
(fix_insn): Likewise.
(ia64_init): New function.
(ia64_target_format): New function.
(md_begin): Set endianness, arch, and machine as appropriate.
* config/tc-ia64.h: (TARGET_BYTES_BIG_ENDIAN, md_number_to_chars):
Make these macros depend on TE_HPUX macro.
(TARGET_FORMAT): Define.
(HOST_SPECIAL_INIT): Define.
* config/te-hpux.h: New file.
* configure.in: Add "ia64-*-hpux*" target to configure.
* configure: Regenerate.
* config/tc-ia64.c (struct md): New field tag_fixups.
(ia64_flush_insns): Handle tag_fixups. Error if dangling
qualifying predicate.
(emit_one_bundle): Delete spurious multiplication by one. Handle
tag_fixups.
(ia64_start_line): Error if dangling qualifying predicate.
(defining_tag): New static variable.
(ia64_unrecognized_line, case '['): Parse tags.
(ia64_frob_label): Create tag_fixups.
(md_assemble): Reset md.qp.X_op after using it.
* tc-i386.c (i386_operand_modifier): Remove.
(build_displacement_string): Remove.
(i386_parse_seg): Remove.
(i386_intel_memory_operand): Remove.
(i386_intel_operand): Re-write using recursive descent parser based
on MASM documentation.
(struct intel_parser_s): New structure.
(intel_parser): New static variable.
(struct intel_token): New structure.
(cur_token, prev_token): New static variables.
(T_NIL): Define.
(T_CONST): Define.
(T_REG): Define.
(T_BYTE): Define.
(T_WORD): Define.
(T_DWORD): Define.
(T_QWORD): Define.
(T_XWORD): Define.
(T_SHORT): Define.
(T_OFFSET): Define.
(T_PTR): Define.
(T_ID): Define.
(intel_match_token): New function.
(intel_get_token): New function.
(intel_putback_token): New function.
(intel_expr): New function.
(intel_e05): New function.
(intel_e05_1): New function.
(intel_e06): New function.
(intel_e06_1): New function.
(intel_e09): New function.
(intel_e09_1): New function.
(intel_e10): New function.
(intel_e10_1): New function.
(intel_e11): New function.
2000-10-24 Diego Novillo <dnovillo@cygnus.com>
* intel.s, intel.d: Add new tests for intel syntax.
2000-10-15 Diego Novillo <dnovillo@cygnus.com>
* config/tc-i386.c (i386_operand_modifier): Only match
modifiers SHORT and FLAT if they are followed by a space.
(parse_register): When `allow_naked_reg' is set, do not confuse
identifiers that start with a register name with a register.
gas/testsuite:
2000-10-15 Diego Novillo <dnovillo@cygnus.com>
* intel.s, intel.d: Add new tests for naked registers using intel
syntax.
* config/tc-sh.c (md_apply_fix): Map 32-bit relocations that
become PC-relative to BFD_RELOC_32_PCREL. Reject 16- or 8-bit
similar relocs.
(sh_obj_adjustable): Return 1 for PC-relative offsets used in
branches.
* config/tc-sh.h (DIFF_EXPR_OK, GLOBAL_OFFSET_TABLE_NAME,
TC_RELOC_GLOBAL_OFFSET_TABLE, TC_RELOC_RTSYM_LOC_FIXUP): Define.
* config/tc-sh.c (sh_elf_cons, sh_elf_suffix): New functions.
[OBJ_ELF] (md_pseudo_table) <long, int, word, short>: Use them.
(GOT_symbol): New variable.
(md_undefined_symbol): Set it.
2000-08-30 Mark Hatle <mhatle@mvista.com>
* config/tc-ppc.c (md_parse_option): Recognize -m405.
In src/opcodes/ChangeLog:
2000-08-30 Mark Hatle <mhatle@mvista.com>
* ppc-opc.c Add XTLB macro for a few PPC 4xx extended mnemonics.
(powerpc_opcodes): Add table entries for PPC 405 instructions.
Changed rfci, icbt, mfdcr, dccci, mtdcr, iccci from PPC to PPC403
instructions.
Added extended mnemonic mftbl as defined in the 405GP manual
for all PPCs.
* config.in (STRICTCOFF): New for strict COFF.
* configure.in: Define STRICTCOFF for i386-*-msdosdjgpp*,
i386-*-go32* and i386-go32-rtems*.
* configure: Rebuilt.
* config/obj-coff.c (obj_coff_endef): Follow the historical
behavior if STRICTCOFF is not defined.
* doc/internals.texi: Document STRICTCOFF.
bfd:
* elf32-i860.c (elf32_i860_relocate_pc16): Just write the immediate
field with the newly relocated value instead of adding it to the
existing immediate field.
(elf32_i860_relocate_splitn): Likewise.
(elf32_i860_relocate_highadj): Likewise.
gas:
* config/tc-i860.c (md_apply_fix3): Do not insert the immediate
if the fixup resulted in a relocation.
obj_fix_adjustable() and tc_fix_adjustable() to tell whether to
add a symbol's address. Removed all target-specific #ifdefs that
used to accomplished the same.
* config/tc-v850.h (TC_DONT_FIX_NON_ADJUSTABLE): Define.
* config/tc-m68k.h (TC_DONT_FIX_NON_ADJUSTABLE): Define.
* config/tc-arm.h (TC_DONT_FIX_NON_ADJUSTABLE): Define.
* config/tc-i960.h (TC_DONT_FIX_NON_ADJUSTABLE): Define.
* config/tc-i386.h (TC_DONT_FIX_NON_ADJUSTABLE): Define.
