2015-03-27 Renlin Li <renlin.li@arm.com>
gas/
* config/tc-aarch64.c (mapping_state): Emit MAP_DATA within text section in order.
(mapping_state_2): Don't emit MAP_DATA here.
(s_aarch64_inst): Align frag during state transition.
(md_assemble): Likewise.
gas/ChangeLog:
2015-03-25 Renlin Li <renlin.li@arm.com>
* config/tc-aarch64.c (mapping_state): Remove first MAP_DATA emitting code.
(mapping_state_2): Emit first MAP_DATA symbol here.
No need to write the zlib header if compression didn't make the section
smaller.
PR gas/18087
* write.c (compress_debug): Don't write the zlib header if
compression didn't make the section smaller.
inc * rl78.h (E_FLAG_RL78_G10): Redefine.
(E_FLAG_RL78_CPU_MASK, E_FLAG_RL78_ANY_CPU, E_FLAG_RL78_G13
E_FLAG_RL78_G14): New flags.
bin * readelf.c (get_machine_flags): Decode RL78's G13 and G14 flags.
gas * config/tc-rl78.c (enum options): Add G13 and G14.
(md_longopts): Add -mg13 and -mg14.
(md_parse_option): Handle -mg13 and -mg14.
(md_show_usage): List -mg13 and -mg14.
* doc/c-rl78.texi: Add description of -mg13 and -mg14 options.
bfd * elf32-rl78.c (rl78_cpu_name): New function. Prints the name of
the RL78 core based upon the flags.
(rl78_elf_merge_private_bfd_data): Handle merging of G13 and G14
flags.
(rl78_elf_print_private_bfd_data): Use rl78_cpu_name.
(elf32_rl78_machine): Always return bfd_mach_rl78.
PR gas/18087
gas/test * gas/i386/dw2-compress-1.d: Allow the test to pass regardless of
whether the .debug_info section was compressed on not.
bfd * compress.c (bfd_compress_section_contents): Do not define this
function if it is not used.
PR binutils/18087
gas * doc/as.texinfo: Note that when gas compresses debug sections the
compression is only performed if it makes the section smaller.
* write.c (compress_debug): Do not compress a debug section if
doing so would make it larger.
tests * gas/i386/dw2-compress-1.d: Do not expect the .debug_abbrev or
.debug_info sections to be compressed.
binu * doc/binutils.texi: Note that when objcopy compresses debug
sections the compression is only performed if it makes the section
smaller.
bfd * coffgen.c (make_a_section_from_file): Only prepend a z to a
debug section's name if the section was actually compressed.
* elf.c (_bfd_elf_make_section_from_shdr): Likewise.
* compress.c (bfd_init_section_compress_status): Do not compress
the section if doing so would make it bigger. In such cases leave
the section alone and return COMPRESS_SECTION_NONE.
opcodes/
* mips-opc.c (decode_mips_operand): Fix constraint issues
with u and y operands.
gas/testsuite/
* gas/mips/mips.exp: Added branch constraints testcase.
* gas/mips/r6-branch-constraints.s: New test.
* gas/mips/r6-branch-constraints.l: New test.
2015-03-13 Jiong Wang <jiong.wang@arm.com>
gas/
* config/tc-aarch64.c (warn_unpredictable_ldst): Don't warn on reg number 31.
gas/testsuite/
* gas/aarch64/diagnostic.s: New testcases.
* gas/aarch64/diagnostic.l: New error match.
2015-03-13 Jiong Wang <jiong.wang@arm.com>
gas/
* config/tc-aarch64.h (SUB_SEGMENT_ALIGN): Define to be zero.
gas/testsuite/
* gas/aarch64/tail_padding.s: New testcase.
* gas/aarch64/tail_padding.d: New expectation file.
PR gas/17444
* config/tc-arm.h (MD_APPLY_SYM_VALUE): Pass the current segment
to arm_apply_sym_value. Update prototype.
* config/tc-arm.c (arm_apply_sym_value): Add segment argument.
Do not apply the value if the symbol is in a different segment to
the current segment.
gas/
2015-03-10 Matthew Wahab <matthew.wahab@arm.com>
* config/tc-aarch64.c (mapping_state): Set minimum alignment for
code sections.
gas/testsuite
2015-03-10 Matthew Wahab <matthew.wahab@arm.com>
* gas/aarch64/codealign.d: Add test for code section alignment.
* gas/aarch64/codealign.s: New file.
* config/tc-v850.c (md_parse_option): Fix code to set or clear
EF_RH850_DATA_ALIGN8 bit in ELF header, based upon the use of the
-m8byte-align and -m4byte-align command line options.
bfd/
PR gas/17843
* elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Expect
R_AARCH64_TLSLE_MOVW_TPREL_G0_NC and R_AARCH64_TLSLE_MOVW_TPREL_G1_NC
to be used with MOVK rather than MOVZ.
gas/
PR gas/17843
* config/tc-aarch64.c (process_movw_reloc_info): Allow
R_AARCH64_TLSLE_MOVW_TPREL_G0_NC and R_AARCH64_TLSLE_MOVW_TPREL_G1_NC
for MOVK.
gas/testsuite/
PR gas/17843
* gas/aarch64/tls.s, gas/aarch64/tls.d: Add test for
R_AARCH64_TLSLE_MOVW_TPREL_G0/R_AARCH64_TLSLE_MOVW_TPREL_G1_NC
sequence.
ld/testsuite/
PR gas/17843
* ld-aarch64/tlsle.s, ld-aarch64/tlsle.d: New test.
* ld-aarch64/aarch64-elf.exp: Run it.
gas/
* write.c (SUB_SEGMENT_ALIGN): Don't pad non-code sections at
end to their alignment.
gas/testsuite/
* gas/sparc/pcrel.d: Update for changed padding in data sections.
* gas/sparc/pcrel64.d: Likewise.
ld/testsuite/
* ld-sparc/gotop32.rd: Update for changed padding in data sections.
* ld-sparc/gotop32.td: Likewise.
* ld-sparc/gotop64.rd: Likewise.
* ld-sparc/gotop64.td: Likewise.
* ld-tilegx/external.s: Align .data.
* ld-tilepro/external.s: Likewise.
Extend the address modifier parsing to distinguish between the
modifers used in LDR literal and LDR register offset address modes.
The current parser incorrectly accepts the :got: modifier on a
register offset instruction resulting in silent corruption of the
output binary.
The current implementation of the :got: assembler modifier does not
distinguish the ADR and ADRP instruction. The :got: modifier does not
make sense on and ADR instruction and should be error'd rather than
the current behavior of applying an inappropriate relocation to the
output and scrambling the underlying instruction silently.
