PR ld/21472
ld * emulparams/avrxmega3.sh (RODATA_PM_OFFSET): Set to 0x8000.
* scripttempl/avr.sc
(__RODATA_PM_OFFSET__) [RODATA_PM_OFFSET]: Use RODATA_PM_OFFSET
as default if not already defined.
(.data) [!RODATA_PM_OFFSET]: Don't include .rodata and friends.
(.rodata) [RODATA_PM_OFFSET]: Put at an offset of
__RODATA_PM_OFFSET__.
gas * config/tc-avr.c (mcu_types): Add entries for: attiny416,
attiny417, attiny816, attiny817.
The only target that renames .bss is tic6x, turning .bss into .far,
and .sbss into .bss. .dynbss is not renamed to .dynfar by BFD.
* scripttempl/elf.sc: Don't use $BSS_NAME in .dynbss.
This should mean the 2010-10-28 change for ld -r --gc-sections can
be reverted.
* scripttempl/v850.sc: Don't reference __ctbp, __ep, __gp when
not relocating.
* scripttempl/v850_rh850.sc: Likewise.
Fix a typo (__PMSIZE was written as __PMSIZE_) and add section alignment
for DATA and BSS.
ld/ChangeLog:
* scripttempl/ft32.sc (__PMSIZE): Correct __PMSIZE_.
(DATA): add ALIGN.
(BSS): add ALIGN
* scripttempl/ft32.sc (__PMSIZE_): If not defined, set to 256K.
(__RAMSIZE): If not defined, set to 64K.
(MEMORY): Set the flash region size to __PMSIZE and the ram region
size to __RAMSIZE.
2016-05-19 Cupertino Miranda <cmiranda@synopsys.com>
* emulparams/arcelf.sh: Changed.
* emulparams/arclinux.sh: Likewise.
* scripttempl/arclinux.sc: Moved to a more standard implementation
similar to elf.sc.
* scripttempl/ft32.sc: Use fixed constants for memory region
lengths. Include DWARF debug sections.
(.data .bss): Do not assign locations during relocatable links.
* testsuite/ld-elf/compressed1d.d: Skip for FT32.
* testsuite/ld-elf/sec-to-seg.exp: Likewise.
* testsuite/ld-elf/sec64k.exp: Likewise.
* testsuite/ld-elf/init-fini-array.d: XFail for FT32.
* testsuite/ld-elf/merge.d: Likewise.
* testsuite/ld-elf/orphan-region.d: Likewise.
* testsuite/ld-elf/orphan.s: Likewise.
* testsuite/ld-elf/orphan3.d: Likewise.
* testsuite/ld-elf/pr349.d: Likewise.
* testsuite/ld-elf/warn2.d: Likewise.
* testsuite/lib/ld-lib.exp (check_shared_lib_support): Note
that the FT32 does not support shared libraries.
Currently, it's not possible to manually set some of the v850 archs in
gdb:
(gdb) set architecture v850<TAB>
v850 (using old gcc ABI)
v850-rh850
v850e
v850e (using old gcc ABI)
v850e1
[...]
(gdb) set architecture v850 (using old gcc ABI)
Ambiguous item "v850 (using old gcc ABI)".
The problem is that "set architecture" is a GDB "enum command", and
GDB only considers an enum value to be the string up until the first
space. So writing "v850 (using old gcc ABI)" is the same as writing
"v850", and then that's not an unambiguous arch printable name prefix.
v850 is actually the only arch that has spaces in its printable name.
One can conveniently see that with e.g.:
(gdb) set max-completions unlimited
(gdb) complete set architecture
...
Rather than hack GDB into accepting this somehow, make v850 arch
printable names more like the printable names of the other archs, and
put the abi variant in the "machine" part, after a ':'.
We now get:
(gdb) set architecture v850<TAB>
v850:old-gcc-abi
v850:rh850
v850e
v850e1
v850e1:old-gcc-abi
v850e2
v850e2:old-gcc-abi
[...]
And now "set architecture v850:old-gcc-abi" works as expected.
I ran the binutils/gas/ld testsuites, and found no regressions. I
don't have a cross compiler handy, but I ran the gdb tests anyway,
which covers at least some snoke testing.
I think that the OUTPUT_ARCH in ld/scripttempl/v850.sc may have got
broken with the previous 2012 change, since I hacked v850_rh850.sc to
output "v850" and ld failed to grok it. I think it only works if the
old GCC ABI is the configured v850 default ABI. That's now fixed by
changing to use explicit v850:old-gcc-abi.
Also, this actually "fixes" an existing GDB test, which isn't likewise
expecting spaces in arch names, when GDB is configured for
--target=v850:
(gdb) FAIL: gdb.xml/tdesc-arch.exp: read valid architectures
bfd/ChangeLog:
2016-03-09 Pedro Alves <palves@redhat.com>
* cpu-v850.c (N): Append ":old-gcc-abi" instead of " (using old
gcc ABI)" to printable name.
* cpu-v850_rh850.c (bfd_v850_rh850_arch): Use "v850:rh850" instead
of "v850-rh850" as printable name.
ld/ChangeLog:
2016-03-09 Pedro Alves <palves@redhat.com>
* scripttempl/v850.sc: Use "v850:old-gcc-abi" as OUTPUT_ARCH.
* scripttempl/v850_rh850.sc: Use "v850:rh850" as OUTPUT_ARCH.
bfd/
2016-02-29 Cupertino Miranda <Cupertino.Miranda@synopsys.com>
* elf32-arc.c (arc_elf_final_write_processing): Add condition to
the flag change.
(elf_arc_relocate_section): Fixes and conditions to support PIE.
Assert for code sections dynamic relocs.
gas/
2016-02-29 Claudiu Zissulescu <Claudiu.Zissulescu@synopsys.com>
* config/tc-arc.c: Enable code density instructions for ARC EM.
ld/
2016-02-29 Cupertino Miranda <Cupertino.Miranda@synopsys.com>
* scripttempl/arclinux.sc: Force .tdata and .tbss to always be
generated.
When .data and .bss sections are empty .noinit section is placed at data
region's start. This will be incorrect for devices that has different
data start address than data region start in linker script.
The patch updates .noinit section's VMA to end of .bss section. So, .noinit
section will be placed at .data section address (-Tdata=<address>) when .data
and .bss sections are empty.
ld/
* scripttempl/avr.sc (.noinit): Force .noinit VMA to end of .bss VMA.
* scripttempl/avrtiny.sc (.noinit): Likewise.
Reverts a2c59f28 and e474ab13. Since the unary form of ALIGN only
references "dot" implicitly, there isn't really a strong argument for
making ALIGN use a relative value when inside an output section.
* ldexp.c (align_dot_val): Delete.
(fold_unary <ALIGN_K, NEXT>): Revert 2015-07-10 change.
(is_align_conditional): Revert 2015-07-20 change.
(exp_fold_tree_1): Likewise, but keep expanded comment.
* scripttempl/elf.sc (.ldata, .bss): Revert 2015-07-20 change.
* ld.texinfo (<ALIGN>): Correct description.
More fallout from a2c59f28. This one could have been fixed by simply
using ". = ALIGN (ABSOLUTE (.), 2);" but it's nicer to align the
section.
* emulparams/criself.sh (INIT_ADDR, FINI_ADDR): Define.
(INIT_START, FINI_START): Don't ALIGN.
* scriptempl/elf.sc (.init, .fini): Apply INIT_ADDR/FINI_ADDR.
a2c59f28 changed the way the unary ALIGN behaved inside output sections,
resulting in cris-elf testsuite regressions. This patch pads out .bss
in the same manner as it was prior to the ALIGN change.
* scripttempl/elf.sc (.ldata, .bss): Align absolute value of dot.
* ldexp.c (is_align_conditional): Handle binary ALIGN.
(exp_fold_tree_1): Move code setting SEC_KEEP for assignments to
dot inside output sections. Handle absolute expressions.
gas * config/tc-msp430.c (MAX_OP_LEN): Increase to 4096.
(msp430_make_init_symbols): New function.
(msp430_section): Call it.
(msp430_frob_section): Likewise.
ld * emulparams/msp430elf.sh (TEMPLATE_NAME): Change to msp430.
* scripttempl/msp430.sc (.text): Add .lower.text and .either.text.
(.data): Add .lower.data and .either.data.
(.bss): Add .lower.bss and .either.bss.
(.rodata): Add .lower.rodata and .either.rodata.
* emultempl/msp430.em: New file. Implements a new orphan
placement algorithm that divides sections between lower and upper
memory regions.
* Makefile.am (emsp430elf.c): Depend upon msp430.em.
*emsp430X.c): Likewise.
* Makefine.in: Regenerate.
Adjusting the start of the relro segment in order to make it end
exactly on a page boundary runs into difficulties when sections in the
relro segment are aligned; Adjusting the start by (next_page - end)
sometimes results in more than that adjustment occurring at the end,
overrunning the page boundary. So when that occurs we try a new lower
start position by masking the adjusted start with the maximum section
alignment. However, we didn't consider that this masked start address
may in fact be before the initial relro base, which is silly since
that can only increase padding at the relro end.
I've also moved some calculations closer to where they are used, and
comments closer to the relevant statements.
* ldlang.c (lang_size_sections): When alignment of sections
results in relro base adjustment being too large, don't go lower
than the initial value.
* ldexp.c (fold_binary <DATA_SEGMENT_RELRO_END>): Comment.
* scripttempl/elf.sc (DATA_SEGMENT_ALIGN): Omit SEGMENT_SIZE
alignment when SEGMENT_SIZE is the same as MAXPAGESIZE.
bfd * elf32-v850.c (v850_set_note): New function. Creates a Renesas
style note entry.
(v850_elf_make_note_section): New function. Creates a note
section.
(v850_elf_create_sections): New function. Create a note section
if one is not already present.
(v850_elf_set_note): New function. Adds a note to a bfd.
(v850_elf_copy_private_bfd_data): New function. Copies V850
notes.
(v850_elf_merge_notes): New function. Merges V850 notes.
(print_v850_note): New function. Displays a V850 note.
(v850_elf_print_notes): New function. Displays all notes attached
to a bfd.
(v850_elf_merge_private_bfd_data): Call v850_elf_merge_notes.
(v850_elf_print_private_bfd_data): Call v850_elf_print_notes.
(v850_elf_fake_sections): Set the type of the V850 note section.
* bfd-in.h (v850_elf_create_sections): Add prototype.
(v850_elf_set_note): Add prototype.
* bfd-in2.h: Regenerate.
binutils* readelf.c (get_machine_flags): Remove deprecated V850 machine
flags.
(get_v850_section_type_name): New function. Handles V850 special
sections.
(get_section_type_name): Add support for V850.
(get_v850_elf_note_type): New function. Returns the name of a
V850 note.
(print_v850_note): New function. Prints a V850 note.
(process_v850_notes): New function. Prints V850 notes.
(process_note_sections): Add support for V850.
binutils/testsute
* binutils-all/objcopy.exp: Skip the strip-10 test for the V850.
gas * config/tc-v850.c (soft_float): New variable.
(v850_data_8): New variable.
(md_show_usage): Add -msoft-float/-mhard-float.
(md_parse_option): Likewise.
(md_begin): Set the default value of soft_float.
(v850_md_end): New function. Creates a note section.
* config/tc-v850.h (md_end): Define.
* doc/c-v850.texi: Document -msoft-float/-mhard-float.
gas/testsuite
* gas/elf/elf.exp: Add special version of the section2 test for
the V850.
* gas/elf/section2.e-v850: New file.
include/elf
* v850.h (EF_RH850_SIMD): Delete deprecated flag.
(EF_RH850_CACHE): Likewise.
(EF_RH850_MMU): Likewise.
(EF_RH850_DATA_ALIGN8): Likewise.
(SHT_RENESAS_IOP): Fix typo in name.
(SHT_RENESAS_INFO): Define.
(V850_NOTE_SECNAME): Define.
(SIZEOF_V850_NOTE): Define.
(V850_NOTE_NAME): Define.
(enum v850_notes): New enum.
(NUM_V850_NOTES): Define.
ld/ChangeLog
2015-02-24 Nick Clifton <nickc@redhat.com>
* Makefile.am (ev850.c): Add dependency upon
$(srcdir)/emultempl/v850elf.em.
(ev850_rh850.c): Likewise.
* Makefile.in: Regenerate.
* emultempl/v850elf.em: New file.
* emulparams/v850.sh (EXTRA_EM_FILE): Define.
* emulparams/v850_rh850.sh (EXTRA_EM_FILE): Define.
* scripttempl/v850.sc: Add .note.renesas section.
* scripttempl/v850_rh850.sc: Likewise.
ld/testsuite
* ld-elf/extract-symbol-1sec.d: Expect to fail on the V850.
ld * scripttempl/avr.sc: Add new user_signatures region. Define and Use
symbols for all region lengths.
* scripttempl/avrtiny.sc: Define and use symbols for all region lengths.
testsuite * ld-avr/region_overflow.d: New test.
* ld-avr/region_overflow.s: Likewise.
.toc1 is the second level TOC section used by gcc's -mminimal-toc. It
too should be read-only after relocation. Also, the last patch
description mentioned .sbss moving but didn't actually do that, so fix
that problem. .tocbss (whatever that is) was before .sbss previously,
so move that one too.
* emulparams/elf64ppc.sh (OTHER_SDATA_SECTIONS): Use in place of..
(OTHER_BSS_SYMBOLS): ..this.
(OTHER_PLT_RELOC_SECTIONS): Don't define.
(OTHER_GOT_RELOC_SECTIONS): Add rela.toc1 and rela.tocbss.
(OTHER_READWRITE_SECTIONS): Don't define. Move .toc1 to..
(OTHER_RELRO_SECTIONS_2): ..here.
* scripttempl/elf.sc: Move SBSS too when DATA_SDATA.
This moves .got too, which requires .sdata and .sbss to move with it,
because these sections share addressing via the toc pointer and with
small-model code must be within a 16-bit signed offset. .plt, .iplt
and .branch_lt must also be moved since they are addressed via a
32-bit offset from the toc pointer, and we might have a very large
.data section.
This change means we may have some bss style sections before the data
segment, necessitating another PT_LOAD header. Also, since _edata is
defined at the end of the data segment it's possible with an empty
.data to have _edata at the end of .plt which looks a little unusual
since .plt is a bss style section. That should only happen rarely in
real world binaries, but does occur in the ld testsuite.
ld/
* emulparams/elf64ppc.sh (BSS_PLT): Don't define.
(OTHER_READWRITE_SECTIONS): Move .branch_lt to..
(OTHER_RELRO_SECTIONS_2): ..here.
(DATA_GOT, SEPARATE_GOTPLT, DATA_SDATA, DATA_PLT,
PLT_BEFORE_GOT): Define.
* scripttempl/elf.sc: Handle DATA_SDATA and DATA_GOT/DATA_PLT/
PLT_BEFORE_GOT combination.
(DATA_GOT, SDATA_GOT): Don't define if either is already defined.
ld/testsuite/
* ld-powerpc/ambiguousv1.d,
* ld-powerpc/ambiguousv1b.d,
* ld-powerpc/ambiguousv2.d,
* ld-powerpc/ambiguousv2b.d,
* ld-powerpc/elfv2exe.d,
* ld-powerpc/elfv2so.d,
* ld-powerpc/tlsexe.r,
* ld-powerpc/tlsexetoc.r,
* ld-powerpc/tlsso.r,
* ld-powerpc/tlstocso.r: Update.
More sections can be read-only after relocation. .opd is an obvious
candidate.
* emulparams/elf64ppc.sh (OTHER_READWRITE_SECTIONS): Move .opd to..
(OTHER_RELRO_SECTIONS_2): ..here, new define.
* scripttempl/elf.sc: Add OTHER_RELRO_SECTIONS_2.
* archures.c: add avrtiny architecture for avr target.
* bfd-in2.h: Regenerate.
* cpu-avr.c (arch_info_struct): add avrtiny arch info.
* elf32-avr.c (elf_avr_howto_table): new relocation R_AVR_LDS_STS_16
added for 16 bit LDS/STS instruction of avrtiny arch.
(avr_reloc_map): reloc R_AVR_LDS_STS_16 is mapped to
BFD_RELOC_AVR_LDS_STS_16.
(bfd_elf_avr_final_write_processing): select machine number avrtiny arch.
(elf32_avr_object_p): set machine number for avrtiny arch.
* libbfd.h: Regenerate.
* reloc.c: Add documentation for BFD_RELOC_AVR_LDS_STS_16 reloc.
* config/tc-avr.c (mcu_types): Add avrtiny arch.
Add avrtiny arch devices attiny4, attiny5, attiny9, attiny10, attiny20
and attiny40.
(md_show_usage): Add avrtiny arch in usage message.
(avr_operand): validate and issue error for invalid register for avrtiny.
add new reloc exp for 16 bit lds/sts instruction.
(md_apply_fix): check 16 bit lds/sts operand for out of range and encode.
(md_assemble): check ISA for arch and issue diagnostic.
* include/elf/avr.h (E_AVR_MACH_AVRTINY): define avrtiny machine number.
(R_AVR_LDS_STS_16): define 16 bit lds/sts reloc number.
* include/opcode/avr.h (AVR_ISA_TINY): define avrtiny specific ISA.
(AVR_ISA_2xxxa): define ISA without LPM.
(AVR_ISA_AVRTINY): define avrtiny arch ISA.
Add doc for contraint used in 16 bit lds/sts.
Adjust ISA group for icall, ijmp, pop and push.
Add 16 bit lds/sts encoding and update 32 bit lds/sts constraints.
* opcodes/avr-dis.c (avr_operand): Handle constraint j for 16 bit lds/sts.
(print_insn_avr): do not select opcode if insn ISA is avrtiny and machine
is not avrtiny.
* Makefile.am (ALL_EMULATION_SOURCES): add avrtiny emulation source.
(eavrtiny.c): add rules for avrtiny emulation source.
* Makefile.in: Regenerate.
* configure.tgt: Add avrtiny to avr target emulations.
* scripttempl/avrtiny.sc: New file.
linker script template for avrtiny arch.
* emulparams/avrtiny.sh: New file.
emulation parameters for avrtiny arch.
and fix more nds32 dependencies.
* scripttempl/elf.sc: Edit out __rela_iplt symbol assignments from
.rel sections, and __rel_iplt from .rela sections.
* scripttempl/nds32elf.sc: Likewise.
* Makefile.am (ends32*.c): Depend on nds32elf.sc.
* Makefile.in: Regenerate.
