* gas/all/gas.exp (redef3): xfail on hppa*-*-hpux*.
* gas/all/redef.d: Add -j "\$DATA\$". Modify regexp to check for
"$DATA$" as well as ".data".
* gas/all/redef2.d: Likewise.
2005-11-17 Jan Beulich <jbeulich@novell.com>
* symbols.h (S_CLEAR_VOLATILE): Declare.
* symbols.c (colon): Also accept redefinable symbols for
redefinition. Clone them before modifying.
(S_CLEAR_VOLATILE): Define.
* cond.c (s_ifdef): Also test for equated symbols.
* read.c (s_comm_internal): Also exclude non-redefinable
equated symbols. Clone redefinable ones before modifying.
(s_weakref): Clone redefinable symbols before modifying.
* doc/internals.texi: Document sy_volatile, sy_forward_ref,
S_IS_VOLATILE, S_SET_VOLATILE, S_CLEAR_VOLATILE,
S_IS_FORWARD_REF, and S_SET_FORWARD_REF.
gas/testsuite/
2005-11-17 Jan Beulich <jbeulich@novell.com>
* gas/all/cond.s: Also check ifdef works on equates and
commons.
* gas/all/cond.l: Adjust.
* gas/all/redef2.s: Also test redefining equate to label.
* gas/all/redef2.d: Adjust.
* gas/all/redef3.[sd]: New.
* gas/all/redef4.s: New.
* gas/all/redef5.s: New.
* gas/elf/redef.s: New, copied from original gas/all/redef2.s.
* gas/elf/redef.d: Remove #source.
* gas/all/gas.exp: Remove exclusion of iq2000-*-* from and
adjust xfails for redefinition tests. Run new tests. Exclude
alpha*-*-*, mips*-*-*, *c54x*-*-* from weakref tests.
* config/tc-arm.c (s_arm_unwind_save_core): Don't emit an extra
opcode if r4-r15 are not saved.
gas/testsuite/
* gas/arm/unwind.s, gas/arm/unwind.d, gas/arm/unwind_vxworks.d: Add
a test for saving only the low registers.
2005-11-14 Jan Beulich <jbeulich@novell.com>
* config/tc-ia64.c (md): Rename regsym to indregsym and move
it to the end of the structure.
(ar): Field regnum is unsigned.
(cr): Likewise:
(indirect_reg): Likewise.
(declare_register_set): Parameter regnum is unsigned.
(declare_register): Parameter numregs and base_regnum are
unsigned. So is the local loop variable.
(md_begin): Restrict scope of local variable regnum, which
also is unsigned. Replace loops with function calls where
possible. Re-order things so that register groups are kept
together. Remove all uses of regsym except for indirect
registers. Replace use of regsym by indregsym for indirect
registers.
(ia64_optimize_expr): Replace use of regsym by indregsym for
indirect registers, with appropriate bias.
instructions. Define MIPS16_ALL_ARGS and MIPS16_ALL_STATICS for
save/restore encoding of the args field.
* mips16-opc.c: Add MIPS16e save/restore opcodes.
* mips-dis.c (print_mips16_insn_arg): Handle printing of 'm'/'M'
codes for save/restore.
* config/tc-mips.c (mips16_ip): Add handling of 'm' and 'M' codes
for the MIPS16e save/restore instructions.
* gas/mips/mips.exp: Run new save/restore tests.
* gas/testsuite/gas/mips/mips16e-save.s: New test for generating
different styles of save/restore instructions.
* gas/testsuite/gas/mips/mips16e-save.d: New.
(arm_reg_parse_multi): Return NULL rather than FAIL.
(arm_reg_parse): Fix comment, the function returns FAIL rather than NULL if
it is unable to parse the register name.
(do_ldrex): Use BAD_ADDR_MODE.
Change error message for PC-relative addressing.
(do_strex): Likewise.
(do_t_ldrex): Use BAD_ADDR_MODE.
(do_t_strex): Likewise.
* gas/arm/archv6t2-bad.s: Add tests of badly composed ldrex and strex
instructions.
* gas/arm/archv6t2-bad.l: Add expected error messages.
* gas/arm/r15-bad.l: Adjust error messages for r15 usage in ldrex and strex
instructions.
* config/obj-coff.c (obj_coff_section): Set readonly flag with the 'x'
attribute. Remember the actions of the 'w' and 'n' attributes and do not
allow the 'x','s' or 'd' attributes to change them.
2005-11-07 Jan Beulich <jbeulich@novell.com>
* gas/all/redef2.[sd]: New.
* gas/all/gas.exp: Run new test.
* gas/elf/redef.d: New.
* gas/elf/elf.exp: Run new test.
Contribute the following change:
2005-09-19 Dave Brolley <brolley@redhat.com>
* config/tc-m32c.c (default_isa): New static variable.
(m32c_isa): Now of type CGEN_BITSET.
(md_begin): Pass &m32c_isa to m32c_cgen_cpu_open.
* elf32-bfin.c (bfd_bfin_elf32_create_embedded_relocs): Fix signedness
warning.
gas/
* Makefile.am (bfin-parse.h): Renamed from bfin-parse.tab.h.
(EXTRA_DIST): Add bfin-parse.h and bfin-lex.c.
* Makefile.in: Regenerate.
* config/bfin-lex.l: Include bfin-parse.h instead of bfin-parse.tab.h.
* config/tc-bfin.c (md_chars_to_number): Change the type of first
argument from unsigned char * to char * to remove signedness warnings.
2005-10-24 Jan Beulich <jbeulich@novell.com>
* ia64.h (enum ia64_opnd): Move memory operand out of set of
indirect operands.
bfd/
2005-10-24 Jan Beulich <jbeulich@novell.com>
* cpu-ia64-opc.c (elf64_ia64_operands): Move memory operand out of
set of indirect operands.
gas/
2005-10-24 Jan Beulich <jbeulich@novell.com>
* config/tc-ia64.c (enum reg_symbol): Delete IND_MEM.
(dot_rot): Change type of num_* variables. Check for positive count.
(ia64_optimize_expr): Re-structure.
(md_operand): Check for general register.
gas/testsuite/
2005-10-24 Jan Beulich <jbeulich@novell.com>
* gas/ia64/index.[sl]: New.
* gas/ia64/rotX.[sl]: New.
* gas/ia64/ia64.exp: Run new tests.
opcodes/
2005-10-24 Jan Beulich <jbeulich@novell.com>
* ia64-asmtab.c: Regenerate.
2005-10-24 Jan Beulich <jbeulich@novell.com>
* config/tc-ia64.c (declare_register): Call symbol_create.
(md_begin): Remove local variables total, ar_base, and cr_base.
Start loops for registers at their respective first one. Don't
update md.regsym for alias names. Generate alias name tp for r13.
gas/testsuite/
2005-10-24 Jan Beulich <jbeulich@novell.com>
* gas/ia64/regs.pl: Also check tp alias of r13.
* gas/ia64/regs.s: Regenerate.
* gas/ia64/regs.d: Adjust.
into jrc/jalrc versions if ISA_MIPS32+ and not doing the swap,
hence avoiding to emit a nop.
* gas/mips/mips.exp: Run new test.
* gas/testsuite/gas/mips/mips16e-jrc.s: New test for converting
jalr/jr to the compact jalrc/jrc instructions.
* gas/testsuite/gas/mips/mips16e-jrc.d: New.
LEX_BEGIN_NAME.
(bfin_start_line_hook): Remove the workaround for LSETUP(.
(bfin_name_is_register): Remove the workarounds for LSETUP(
and SAA(.
(bfin_start_label): Ditto.
unsigned line number. Do not include "dwarf2dbg.h".
* config/tc-xtensa.c (md_pseudo_table): Remove entry for "loc".
(xtensa_dwarf2_directive_loc, xtensa_dwarf2_emit_insn): Delete.
(xg_build_to_insn, xg_build_token_insn): Update TInsn uses.
(md_assemble): Use as_where instead of dwarf2_where.
(xg_assemble_vliw_tokens): Use unsigned line numbers instead of
dwarf2_line_infos. Change to call new_logical_line followed by
dwarf2_emit_insn.
- allowing true forward references (which will always assume the referenced
symbols have at the point of use) through the new .eqv pseudo-op and the
new == operator
- disallowing changing .equiv-generated equates (so that the protection this
provides is both forward and backward)
- snapshotting equates when their value gets changed so that previous uses
don't get affected by the new value.
- allowing expressions in places where absolute expressions (or register
names) are needed which were not completely resolvable at the point of
their definition but which are fully resolvable at the point of use
In addition it fixes PR/288.
(pa_ip): Promote from PA 1.0 to 1.1 immediately when 1.1 match is
found. Simplify handling of "ma" and "mb" completers.
* hppa.h (FLAG_STRICT): Revise comment.
(pa_opcode): Revise ordering rules. Add/move strict pa10 variants
before corresponding pa11 opcodes. Add strict pa10 register-immediate
entries for "fdc".
(parse_reg_without_prefix): New function.
(parse_reg): Check for '$' register prefix if --allow-reg-prefix is set.
(option md_longopts): Add allow-reg-prefix option.
* doc/c-sh.texi: Document --allow-reg-prefix option.
* NEWS: Mention the new switch.
* gas/sh/basic.exp: Run reg-prefix test.
* gas/sh/reg-prefix.s: New
* gas/sh/reg-prefix.d: New
2005-09-29 Jan Beulich <jbeulich@novell.com>
* config/tc-ia64.c (parse_operands): Always parse first operand of
alloc.
gas/testsuite/
2005-09-29 Jan Beulich <jbeulich@novell.com>
* gas/ia64/alloc.[sl]: New.
* gas/ia64/ia64.exp: Run new test.
2005-09-28 Jan Beulich <jbeulich@novell.com>
* gas/i386/x86-64-stack.s, gas/i386/x86-64-stack.d,
gas/i386/x86-64-stack-suffix.d, gas/i386/x86-64-stack-intel.d: New.
* gas/i386/i386.exp: Run new tests.
ld/testsuite/
2005-09-28 Jan Beulich <jbeulich@novell.com>
* ld-x86-64/tlspic.dd: Adjust.
opcodes/
2005-09-28 Jan Beulich <jbeulich@novell.com>
* i386-dis.c (stack_v_mode): Renamed from branch_v_mode.
(indirEv): Use it.
(stackEv): New.
(Ob64, Ov64): Rename to Ob, Ov. Delete unused original definitions.
(dis386): Document and use new 'V' meta character. Use it for
single-byte push/pop opcode forms. Use stackEv for mod-r/m push/pop
opcode forms. Correct typo in 'pop ss'. Replace Ob64/Ov64 by Ob/Ov.
(putop): 'q' suffix for 'T' and 'U' meta depends on DFLAG. Mark
data prefix as used whenever DFLAG was examined. Handle 'V'.
(intel_operand_size): Use stack_v_mode.
(OP_E): Use stack_v_mode, but handle only the special case of
64-bit mode without operand size override here; fall through to
v_mode case otherwise.
(OP_REG): Special case rAX_reg ... rDI_reg only when 64-bit mode
and no operand size override is present.
(OP_J): Use get32s for obtaining the displacement also when rex64
is present.
2005-09-28 Jan Beulich <jbeulich@novell.com>
* dw2gencfi.c (dot_cfi): Call ignore_rest_of_line when not fully
parsing the input.
(dot_cfi_startproc): Likewise.
(dot_cfi_endproc): Likewise. Also check no extra input was given.
(dot_cfi_escape): Likewise.
2005-09-14 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (tc_x86_regname_to_dw2regnum): Add selector
registers, floating point control and status words, and mxcsr as
well as (for 64-bit code) segment base registers and rflags.
* config/tc-msp430.c (msp430_operands): Undo last changes. Instead...
(msp430_relax_frag): add a guard check to ensure that final fr_subtype
has been reached.
(dwarf2_set_isa): New.
(dwarf2_directive_loc): Rearrange to allow all options on one line.
* dwarf2dbg.h (dwarf2_set_isa): Declare.
* doc/as.texinfo: Update .loc documentation.
* gas/lns/lns-common-1.d: Don't match header or special opcode numbers.
* gas/lns/lns-common-1.s: Update for syntax change.
* gas/lns/lns-diag-1.[sl]: Likewise.
(mips_opts): Add -1 to initialize ase_mt.
(file_ase_mt): New variable for -mmt.
(CPU_HAS_MT): New define.
(validate_mips_insn): Add supports for +t, +T, !, $, *, &, g operand
formats.
(mips_ip): Check ase_mt to enable MT instructions.
Handle !, $, *, &, +T, +t, g operand formats.
For "mftc1", "mfthc1", "cftc1", "mttc1", "mtthc1", "cttc1", we allow
odd float registers.
(OPTION_MT, OPTION_NO_MT): New define.
(OPTION_COMPAT_ARCH_BASE): Change because of inserting MT define.
(md_parse_option): Parse OPTION_MT and OPTION_NO_MT.
(mips_after_parse_args): Set ase_mt based on CPU.
(s_mipsset): Handle ".set mt" and ".set nomt".
(mips_elf_final_processing): Remind of adding new flag for MT ASE.
(md_show_usage): Show usage of -mmt and -mno-mt.
* doc/as.texinfo: Document -mmt and -mno-mt options.
* doc/c-mips.texi: Likewise, and document ".set mt" and ".set nomt"
directives.
bfd/
* libbdf.h: Regenerate.
* bfd-in2.h: Regenerate.
* reloc.c: Add BFD_RELOC_ARM_T32_CP_OFF_IMM and
BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
gas/
* config/tc-arm.c (encode_arm_cp_address): Use
BFD_RELOC_ARM_T32_CP_OFF_IMM in thumb mode.
(do_iwmmxt_wldstbh): Use BFD_RELOC_ARM_T32_CP_OFF_IMM_S2 in thumb
mode.
(md_assemble): Only allow coprocessor instructions when Thumb-2 is
available.
(cCE, cC3): Define.
(insns): Use them for coprocessor instructions.
(md_pcrel_from_section): Handle BFD_RELOC_ARM_T32_CP_OFF_IMM.
(get_thumb32_insn): New function.
(put_thumb32_insn): New function.
(md_apply_fix): Handle BFD_RELOC_ARM_T32_CP_OFF_IMM and
BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
gas/testsuite/
* gas/arm/vfp-bad_t2.d, gas/arm/vfp-bad_t2.l, arm/vfp-bad_t2.s,
gas/arm/vfp1_t2.d, gas/arm/vfp1_t2.s, gas/arm/vfp1xD_t2.d,
gas/arm/vfp1xD_t2.s, gas/arm/vfp2_t2.d, gas/arm/vfp2_t2.s): New files.
opcodes/
* arm-dis.c (coprocessor_opcodes): New.
(arm_opcodes, thumb32_opcodes): Remove coprocessor insns.
(print_insn_coprocessor): New function.
(print_insn_arm): Use print_insn_coprocessor. Remove coprocessor
format characters.
(print_insn_thumb32): Use print_insn_coprocessor.
when the frags are different for the 2 instructions we want to
swap. If the lengths of the 2 instructions are not the same, we
won't do the swap but emit an nop.
2005-08-26 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (intel_e09): Set JumpAbsolute when seeing a PTR-
qualified operand of a branch.
(intel_bracket_expr): Set JumpAbsolute here...
(intel_e11): ... rather than here.
gas/testsuite/
2005-08-26 Jan Beulich <jbeulich@novell.com>
* gas/i386/intel.s: Adjust.
* gas/i386/intelok.s: Add two more insns.
* gas/i386/intelok.d: Adjust.
2005-08-26 Jan Beulich <jbeulich@novell.com>
* i386-dis.c (intel_operand_size): New, broken out from OP_E for
re-use.
(OP_E): Call intel_operand_size, move call site out of mode
dependent code.
(OP_OFF): Call intel_operand_size if suffix_always. Remove
ATTRIBUTE_UNUSED from parameters.
(OP_OFF64): Likewise.
(OP_ESreg): Call intel_operand_size.
(OP_DSreg): Likewise.
(OP_DIR): Use colon rather than semicolon as separator of far
jump/call operands.
gas/testsuite/
2005-08-26 Jan Beulich <jbeulich@novell.com>
* gas/i386/intelok.d: Adjust.
(mips_opts): Add -1 to initialize ase_dsp.
(file_ase_dsp): New variable for -mdsp.
(CPU_HAS_DSP): New define.
(validate_mips_insn): Add supports for 3, 4, 5, 6, 7, 8, 9, 0, ', :, @
operand formats.
(mips_ip): Add min_range and max_range for checking singed numbers.
Check ase_dsp to enable DSP instructions.
Handle 3, 4, 5, 6, 7, 8, 9, 0, ', :, @ operand formats.
(OPTION_DSP, OPTION_NO_DSP): New define.
(OPTION_COMPAT_ARCH_BASE): Change because of inserting DSP define.
(md_parse_option): Parse OPTION_DSP and OPTION_NO_DSP.
(mips_after_parse_args): Set ase_dsp based on CPU.
(s_mipsset): Handle ".set dsp" and ".set nodsp".
(mips_elf_final_processing): Remind of adding new flag for DSP ASE.
(md_show_usage): Show usage of -mdsp and -mno-dsp.
2005-08-22 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (object_64bit): New.
(i386_target_format): Initialize it.
(output_disp): Use object_64bit for relocation type determination.
(output_imm): Likewise.
(i386_validate_fix): Likewise.
(tc_gen_reloc): Likewise.
(lex_got): Likewise. Remove static mode_name. Change array size
of gotrel's rel field, and adjust its initializer. Adjust diagnostic.
(x86_cons): Use object_64bit for deciding whether quad fields can
have relocations.
gas/testsuite/
2005-08-22 Jan Beulich <jbeulich@novell.com>
* gas/i386/mixed-mode-reloc.s, gas/i386/mixed-mode-reloc32.d,
gas/i386/mixed-mode-reloc64.d: New.
* gas/i386/i386.exp: Run new tests.
* cofflink.c (_bfd_coff_generic_relocate_section): Correct
comment.
gas
* config/obj-coff.c (obj_coff_weak): Set auxiliary record
of NT weak externals to IMAGE_WEAK_EXTERN_SEARCH_NOLIBRARY.
* config/tc-msp430.c (msp430_enable_relax): New flag.
(msp430_enable_polys): Likewise.
(OPTION_RELAX): New option.
(OPTION_POLYMORPHS): Likewise.
(md_longopts): New long options.
(md_show_usage): Updated.
(md_parse_option): Add new options handler.
(msp430_operands): Add check if polymorph insns are enabled.
(msp430_force_relocation_local): New function.
(md_apply_fix): Now delete relocs according to new flags combination.
(msp430_relax_frag): Convert long branches to short branches only if
flag msp430_enable_relax is set.
* config/tc-msp430.h (TC_FORCE_RELOCATION_LOCAL): Defined.
(msp430_force_relocation_local): Likewise.
* doc/c-msp430.texi: Describe new options.
* macro.c (getstring): Do not treat round parentheses exactly the same as angle
brackets - the parentheses need to be preserved and passed on to the macro processing code.
gas/
* config/tc-arm.c (current_it_mask, current_cc): New variables.
(do_t_add_sub): Use correct encodings inside IT block.
(do_t_arit3c): Ditto.
(do_t_it): Simplify logic. Set current_it_mask and current_cc.
(md_assemble): Verify conditional suffixes agains IT blocks.
gas/testsuite/
* gas/arm/thumb32.s: Use correct conditional suffixes inside IT
blocks.
* gas/arm/thumb2_it.d, gas/arm/thumb2_it.s: New test.
instruction.
gas/arm/iwmmxt-bad2.s: New file: Check for error messages about erroneous
offsets in iwmmxt instructions. Cannot be part of iwmmxt-bad.s because
the errors there stop the assembler before it gets to check the offsets
in instructions.
gas/arm/iwmmxt-bad2.d: New file.
gas/arm/iwmmxt-bad2.l: New file: Expected error messages.
gas/arm/iwmmxt.s: Change the offset values of the WLDRD, WSTRD and WSTRW
instructions to be larger than +/-255.
gas/arm/iwmmxt.d: Fix the expected results for these instructions.
2005-07-26 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (optimize_imm): Calculate candidate immediates
mask from guessed suffix, but mask out other immediate types only
if at least on candidate is valid for the insn.
gas/testsuite/
2005-07-26 Jan Beulich <jbeulich@novell.com>
* gas/i386/immed32.[sd]: New.
* gas/i386/immed64.[sd]: New.
* gas/i386/i386.exp: Run new tests.
2005-07-18 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (md_begin): Use IS_ELF.
(tc_i386_fix_adjustable): Likewise.
(md_estimate_size_before_relax): Likewise.
(md_apply_fix): Likewise.
(i386_target_format): Likewise.
(lex_got): Define to NULL when not ELF or when LEX_AT. Check IS_ELF.
(i386_immediate): Remove #ifdef LEX_AT.
(i386_displacement): Likewise.
* config/tc-i386.h (x86_cons): Prototype only when ELF and when not
LEX_AT.
2005-07-18 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (reloc): Convert to ISO C90. Change first
parameter to unsigned. Parameter sign now is tristate - zero/
positive mean unsigned/signed, negative means signedness doesn't
matter. Check field size,
signedness, and pcrel-ness are in agreement between relocated field
and relocation type. Adjust diagnostics.
(optimize_imm): And type mask of operand instead of overwriting it.
(lex_got): Convert to ISO C90. Add third parameter. Add new field to
local structure and initialize gotrel accordingly. Pass caller as
mask of types that the operator can match.
(x86_cons_fix_new): Let reloc know that signedness of relocation
doesn't matter.
(x86_pe_cons_fix_new): Likewise.
(x86_cons): Pass additional argument to lex_got.
(i386_immediate): New local variable 'types'. Pass its address as
additional argument to lex_got. Mask out operand types not supported
befoe returning.
(i386_displacement): Likewise. Set bigdisp to all types supported in
64-bit mode, combining the previously split initialization.
gas/testsuite/
2005-07-18 Jan Beulich <jbeulich@novell.com>
* gas/i386/reloc32.[sdl]: New.
* gas/i386/reloc64.[sdl]: New.
* gas/i386/i386.exp: Run new tests.
2005-07-14 Jim Blandy <jimb@redhat.com>
* configure.in: Add cases for Renesas m32c.
* configure: Regenerated.
bfd/ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
Add support for m32c-*-elf (Renesas m32c and m16c).
* Makefile.am (ALL_MACHINES): Add cpu-m32c.lo.
(ALL_MACHINES_CFILES): Add cpu-m32c.c.
(BFD32_BACKENDS): Add elf32-m32c.lo.
(BFD32_BACKENDS_CFILES): Add elf32-m32c.c.
(cpu-m32c.lo, elf32-m32c.lo): New rules, generated by 'make dep-am'.
* Makefile.in: Regenerated.
* archures.c (bfd_arch_m32c, bfd_mach_m16c, bfd_mach_m32c): New
arch and mach codes.
(bfd_m32c_arch): New arch info object.
(bfd_archures_list): List bfd_m32c_arch.
* bfd-in2.h: Regenerated.
* config.bfd: Add case for the m32c.
* configure.in: Add case for the m32c.
* configure: Regenerated.
* cpu-m32c.c, elf32-m32c.c: New files.
* libbfd.h: Regenerated.
* targets.c (bfd_elf32_m32c_vec): Declare.
(_bfd_target_vector): List bfd_elf32_m32c_vec.
binutils/ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
* readelf.c: #include "elf/m32c.h"
(guess_is_rela, dump_relocations, get_machine_name): Add cases for
EM_M32C.
* Makefile.am (readelf.o): Update dependencies.
* Makefile.in: Regenerated.
cpu/ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
* m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
gas/ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
Add support for the Renesas M32C.
* Makefile.am (CPU_TYPES): List m32c.
(TARGET_CPU_CFILES): List config/tc-m32c.c.
(TARGET_CPU_HFILES): List config/tc-m32c.h.
* configure.in: Add case for m32c.
* configure.tgt: Add cases for m32c and m32c-*-elf.
* configure: Regenerated.
* config/tc-m32c.c, config/tc-m32c.h: New files.
* doc/Makefile.am (CPU_DOCS): Add c-m32c.texi.
* doc/Makefile.in: Regenerated.
* doc/all.texi: Set M32C.
* doc/as.texinfo: Add text for the M32C-specific options and line
comment characters, and refer to c-m32c.texi.
* doc/c-m32c.texi: New file.
include/ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
* dis-asm.h (print_insn_m32c): New declaration.
include/elf/ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
Add support for Renesas M32C and M16C.
* common.h (EM_M32C): New machine number.
* m32c.h: New file.
ld/ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
Add support for the Renesas M32C and M16C.
* Makefile.am (ALL_EMULATIONS): Add eelf32m32c.o.
(eelf32m32c.c): New target.
* Makefile.in: Regenerated.
* configure.tgt: Add case for m32c-*-elf.
* emulparams/elf32m32c.sh: New file.
opcodes/ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
Add support for the Renesas M32C and M16C.
* m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New.
* m32c-desc.h, m32c-opc.h: New.
* Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h.
(CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c,
m32c-opc.c.
(ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo,
m32c-ibld.lo, m32c-opc.lo.
(CLEANFILES): List stamp-m32c.
(M32C_DEPS): List stamp-m32c, if CGEN_MAINT.
(CGEN_CPUS): Add m32c.
(m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c)
(m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS.
(m32c_opc_h): New variable.
(stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo)
(m32c-opc.lo): New rules.
* Makefile.in: Regenerated.
* configure.in: Add case for bfd_m32c_arch.
* configure: Regenerated.
* disassemble.c (ARCH_m32c): New.
[ARCH_m32c]: #include "m32c-desc.h".
(disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c.
(disassemble_init_for_target) [ARCH_m32c]: Same.
* cgen-ops.h, cgen-types.h: New files.
* Makefile.am (HFILES): List them.
* Makefile.in: Regenerated.
