Commit Graph

229 Commits

Author SHA1 Message Date
Andrew Cagney
a6a5d34927 Fix --enable-build-warnings=-Werror failures.
v850/simops.c, d10v/simops.c, v850/Makefile.in, d10v/Makefile.in:
Include targ-vals.h instead of syscall.h. Replace SYS_* with
TARGET_SYS_*.  Add dependency.
z8k/support.c: Include <errno.h>
v850/simops.c: Replace long with portable signed32.
mips/interp.c: Make sim_monitor global - needed by sky.
1998-11-25 09:58:04 +00:00
Andrew Cagney
baa1a48801 Explicitly tag vr41/mips16 instructions.
Update configure.in/configure.
1998-11-25 06:50:48 +00:00
Andrew Cagney
57791952b6 Configure mips64vr4100-elf nee mips64vr41* as a 64 bit mips16 igen simulator.
Fix problems: All vr.igen instructions are 64 bit.
1998-11-23 07:16:03 +00:00
Andrew Cagney
5a581ea612 Pacify GCC. 1998-11-23 06:10:01 +00:00
Andrew Cagney
ee562da4c4 Reconize target mips-tx19-elf 1998-11-23 06:06:12 +00:00
Andrew Cagney
a83d7d870f Switch mips-lsi-elf mips16 simulator to igen (from gencode). 1998-11-23 05:50:21 +00:00
Andrew Cagney
821b702f92 * r5900.igen (CVT.W.S): Always round towards zero.
Update testsuite.
1998-11-21 03:31:30 +00:00
Andrew Cagney
d1cbd70abb Add configury for mips-lsi-elf target (32 bit MIPS16).
Fix numerous problems with PENDING_* code.
In old gencode simulator, don't double tick each cycle.
Add BREAK instruction to MIPS16 gencode simulator.
1998-11-12 06:42:34 +00:00
Andrew Cagney
7d88afe63e div(-0) sets both I/SI and D/SD (PR16522) 1998-11-11 08:18:55 +00:00
Frank Ch. Eigler
210a903baf * build fix
Thu Nov  5 10:29:42 EST 1998  Frank Ch. Eigler  <fche@cygnus.com>
	* r5900.igen (r59fp_opdiv): Correct erroneous FGR[FD] reference.
1998-11-05 09:42:06 +00:00
Andrew Cagney
dd0f610960 PR 16522
Fix RSQRT.S instruction, add test case.
1998-11-05 09:42:05 +00:00
Frank Ch. Eigler
fd0e83b604 * adding missing ChangeLog header line 1998-11-02 11:51:27 +00:00
Frank Ch. Eigler
0ec51df9ef * build fix for tx39 sim; caused by sky->devo merge
* dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
	interrupt level number to match changed SignalExceptionInterrupt
	macro.
1998-10-30 09:49:18 +00:00
Frank Ch. Eigler
fd6e6422c8 * sky->devo merge, continued -- left out the r5900 TLB last time!
* includes a small PR 17224 tweak
1998-10-29 13:44:37 +00:00
Frank Ch. Eigler
3ac7980b23 * Fixes for PR 18015, from customer.
Thu Oct 29 11:06:30 EST 1998  Frank Ch. Eigler <fche@cygnus.com>
	* r5900.igen: Fix PSRLVW, MULTU1, PADSBH instructions,
	as per customer patch.
1998-10-29 09:30:11 +00:00
Frank Ch. Eigler
fda83b6795 * MONSTER sky -> devo merge
* ChangeLog / ChangeLog.sky entries were merged with original time stamps;
  a few were moved between the files
1998-10-27 12:48:08 +00:00
Doug Evans
3b5f425750 * interp.c: #include "itable.h" if WITH_IGEN.
(get_insn_name): New function.
	(sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
	* sim-main.h (MAX_INSNS,INSN_NAME): Delete.
1998-10-10 01:07:15 +00:00
Doug Evans
4d87923eb3 * r5900.igen (plzcw): Make `i' signed.
PR 17191.
1998-09-10 19:00:46 +00:00
Ron Unrau
323f833daf Branch merge for GDB:
* sim-main.h: track COP0 registers
        * interp.c (sim_{fetch,store}_register): read/write COP0 registers
        * sky-gdb.[ch]: add sim pipeorder command
1998-09-09 17:30:31 +00:00
Frank Ch. Eigler
9ade226a42 * Patch for PR 17142, brought over from sky branch.
Fri Sep  4 10:37:57 1998  Frank Ch. Eigler  <fche@cygnus.com>
	* r5900.igen (mtsab): Correct typo in input register.
	* sim-main.h (TMP_*): New macros for accessing local 128-bit
	temporary for multimedia instructions.
	* r5900.igen (*): Convert most instructions to use new TMP
	macros to store output result during computation.
1998-09-08 11:09:45 +00:00
Frank Ch. Eigler
78b871ec81 * Build fixes for tx39 sim hosted on strange Linux boxen.
[common/ChangeLog]
Tue Sep  1 15:36:52 1998  Frank Ch. Eigler  <fche@cygnus.com>
	* sim-config.h: Remove reference to linux kernel header.
[mips/ChangeLog]
Tue Sep  1 15:39:18 1998  Frank Ch. Eigler  <fche@cygnus.com>
	* dv-tx3904sio.c: Include sim-assert.h.
1998-09-01 13:19:57 +00:00
Andrew Cagney
e1b20d3048 Add new file vr.igen which is a merge of vr5400.igen and vr4320.igen.
Hack sanitize so that it doesn't sanitize vrXXX when either of
keep-vr5400 or keep-vr4320 are specified.
Move two basic vr4100 instructions from mips.igen to vr.igen.
1998-07-25 06:45:18 +00:00
Gavin Romig-Koch
aaa2c9082c * mips.igen (check_mf_hilo): Correct check. 1998-06-29 13:22:31 +00:00
Frank Ch. Eigler
702968c54b * ECC (tx39) and sky changes.
[ChangeLog]
start-sanitize-tx3904
Tue Jun 16 14:39:00 1998  Frank Ch. Eigler  <fche@cygnus.com>
	* dv-tx3904tmr.c: Deschedule timer event after dispatching.
	Reduce unnecessarily high timer event frequency.
	* dv-tx3904cpu.c: Ditto for interrupt event.
end-sanitize-tx3904
start-sanitize-sky
Tue Jun 16 14:12:09 1998  Frank Ch. Eigler  <fche@cygnus.com>
	* interp.c (decode_coproc): Removed COP2 branches.
	* r5900.igen: Moved COP2 branch instructions here.
	* mips.igen: Restricted COPz == COP2 bit pattern to
	exclude COP2 branches.
end-sanitize-sky
1998-06-16 18:13:47 +00:00
Frank Ch. Eigler
95caab7df2 * Moving some sky-specific ChangeLog entries into ChangeLog.sky 1998-06-11 13:50:28 +00:00
Frank Ch. Eigler
b879096335 * Support for sky hardware interrupts. The sky-dma cannot trigger
interrupts properly yet (jlemke TODO).
Wed Jun 10 13:22:32 1998  Frank Ch. Eigler  <fche@cygnus.com>
	* interp.c (decode_coproc): For TX39, add stub COP0 register #7,
 	to allay warnings.
	(interrupt_event): Made non-static.
start-sanitize-tx3904
	* dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
 	interchange of configuration values for external vs. internal
 	clock dividers.
end-sanitize-tx3904
start-sanitize-sky
	* sky-device.c (sky_signal_interrupt): New function to generate
	interrupt event.
	* sky-device.h: Declare it.
	* sky-dma.c (check_int1): Call it.
	* sky-pke.c (pke_begin_interrupt_stall): Call it.
end-sanitize-sky
1998-06-10 17:07:10 +00:00
Ian Carmichael
0001bce1f8 * Handle 10 and 20-bit versions of Break instruction. Move handling
* of special values from signal_exception() in interp.c into mips.igen.
*
* Modified: ChangeLog gencode.c interp.c mips.igen sim-main.h
1998-06-09 22:11:24 +00:00
Frank Ch. Eigler
cc9bc93202 * Updates to tx3904 peripheral simulations for ECC.
Tue Jun  9 12:29:50 1998  Frank Ch. Eigler  <fche@cygnus.com>
	* dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
 	register upon non-zero interrupt event level, clear upon zero
 	event value.
	* dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
	by passing zero event value.
	(*_io_{read,write}_buffer): Endianness fixes.
	* dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
	(deliver_*_tick): Reduce sim event interval to 75% of count interval.
	* interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
	serial I/O and timer module at base address 0xFFFF0000.
1998-06-09 16:54:09 +00:00
Gavin Romig-Koch
2b5d87dfa4 * mips.igen (SWC1) : Correct the handling of ReverseEndian
and BigEndianCPU.
1998-06-09 15:54:05 +00:00
Gavin Romig-Koch
55ad270f9a * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
parts.
	* configure: Update.
1998-06-09 15:42:04 +00:00
Frank Ch. Eigler
da040f2a6c * Early check-in of tx3904 timer sim implementation for ECC.
It is not yet properly tested.
Thu Jun  4 15:37:33 1998  Frank Ch. Eigler  <fche@cygnus.com>
	* dv-tx3904tmr.c: New file - implements tx3904 timer.
	* dv-tx3904{irc,cpu}.c: Mild reformatting.
	* configure.in: Include tx3904tmr in hw_device list.
	* configure: Rebuilt.
	* interp.c (sim_open): Instantiate three timer instances.
	Fix address typo of tx3904irc instance.
1998-06-04 12:43:45 +00:00
Andrew Cagney
0e797366ef The r5900 doesn't have HI/LO DIV/MUL register problems. Hobble
checks on hi/lo usage but retain functions so that they can be used
for HI/LO stall counting code.
1998-06-04 08:46:56 +00:00
Ian Carmichael
8e3a0b599f * SYSCALL now uses exception vector.
* SKY: New memory mapping rules for k1seg, k0seg.
* Modified Files: ChangeLog.sky ChangeLog interp.c sim-main.c
1998-06-02 19:53:36 +00:00
Frank Ch. Eigler
29b5afe9af * Small TX39-only patch for ECC.
Mon Jun  1 18:18:26 1998  Frank Ch. Eigler  <fche@cygnus.com>
	* interp.c (decode_coproc): For TX39, add stub COP0 register #3,
	to allay warnings.
1998-06-01 16:29:43 +00:00
Jeff Law
fb0ea2b9e1 * r5900.igen (rsqrt.s): Update based on r5900 ISA manual version 2.1.
(sqrt.s): Likewise.
1998-06-01 16:29:42 +00:00
Andrew Cagney
df26156d68 Match mips*tx39 not mipst*tx39. 1998-05-29 01:42:20 +00:00
Andrew Cagney
ce82378189 Fix mips SWL on 64bit ISA when 32 bit word appears in second half of
64 bit bus.
Test.
1998-05-25 05:48:34 +00:00
Andrew Cagney
f872d0d643 Only enable H/W on some mips targets.
Move common hw-obj to Make-common
Pacify GCC
1998-05-22 05:23:04 +00:00
Andrew Cagney
32d41f6ddb Sanity clause 1998-05-22 02:08:26 +00:00
Gavin Romig-Koch
5e34097b8b gencode.c: Mark BEGEZALL as LIKELY. 1998-05-21 18:26:38 +00:00
Andrew Cagney
26feb3a83d Fix sign extension on 32 bit add/sub instructions. 1998-05-21 09:32:07 +00:00
Andrew Cagney
8404825993 * interp.c (sim_fetch_register): Convert internal r5900 regs to
target byte order
1998-05-21 08:18:21 +00:00
Frank Ch. Eigler
3fa454e95f * Monster patch - may destablize MIPS sims for a little while.
* Followup patch for SCEI PR 15853
* First check-in of TX3904 interrupt controller devices for ECC. [sanitized]
* First implementation of MIPS hardware interrupt emulation.
Mon May 18 18:22:42 1998  Frank Ch. Eigler  <fche@cygnus.com>
	* configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
 	modules.  Recognize TX39 target with "mips*tx39" pattern.
	* configure: Rebuilt.
	* sim-main.h (*): Added many macros defining bits in
 	TX39 control registers.
	(SignalInterrupt): Send actual PC instead of NULL.
	(SignalNMIReset): New exception type.
	* interp.c (board): New variable for future use to identify
	a particular board being simulated.
	(mips_option_handler,mips_options): Added "--board" option.
	(interrupt_event): Send actual PC.
	(sim_open): Make memory layout conditional on board setting.
	(signal_exception): Initial implementation of hardware interrupt
 	handling.  Accept another break instruction variant for simulator
 	exit.
	(decode_coproc): Implement RFE instruction for TX39.
	(mips.igen): Decode RFE instruction as such.
start-sanitize-tx3904
	* configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
	* interp.c: Define "jmr3904" and "jmr3904debug" board types and
	bbegin to implement memory map.
	* dv-tx3904cpu.c: New file.
	* dv-tx3904irc.c: New file.
end-sanitize-tx3904
1998-05-18 15:55:05 +00:00
Gavin Romig-Koch
7d2c0e8c97 * r5900.igen: Replace the calls and the definition of the
function check_op_hilo_hi1lo1 with the pair
	check_mult_hilo_hi1lo1 and check_mult_hilo_hi1lo1.
1998-05-13 18:30:15 +00:00
Gavin Romig-Koch
afc5e7f23a * tx.igen (madd,maddu): Replace calls to check_op_hilo
with calls to check_div_hilo.
1998-05-13 18:14:09 +00:00
Gavin Romig-Koch
94dda41a0c * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
Replace check_op_hilo with check_mult_hilo and check_div_hilo.
	Add special r3900 version of do_mult_hilo.
	(do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
	with calls to check_mult_hilo.
	(do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
	with calls to check_div_hilo.
1998-05-13 14:00:56 +00:00
Andrew Cagney
1a89994e08 * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
Document a replacement.
1998-05-12 05:36:47 +00:00
Doug Evans
eb00d70698 * sim-main.h (INSN_NAME): New arg `cpu'. 1998-05-07 02:45:07 +00:00
Geoffrey Noer
9d45df1b8c Tue Apr 28 18:28:58 1998 Geoffrey Noer <noer@cygnus.com>
* common/aclocal.m4: call AM_EXEEXT in SIM_AC_COMMON, define
        AM_CYGWIN32 and AM_EXEEXT.
        * common/Make-common.in: set EXEEXT, add missing EXEEXTs
        to run and install-common rules.
        * common/configure: regenerate

And update all subdirectory ChangeLogs and configure files.
1998-04-29 01:44:23 +00:00
Tom Tromey
5da9ce07eb * configure: Regenerated to track ../common/aclocal.m4 changes.
* config.in: Ditto.
	* acconfig.h: New file.
	* configure.in: Reverted change of Apr 24; use sinclude again.
1998-04-26 22:03:55 +00:00