Commit Graph

1276 Commits

Author SHA1 Message Date
Nick Alcock
8b37e7b63e libctf, ld, binutils: add textual error/warning reporting for libctf
This commit adds a long-missing piece of infrastructure to libctf: the
ability to report errors and warnings using all the power of printf,
rather than being restricted to one errno value.  Internally, libctf
calls ctf_err_warn() to add errors and warnings to a list: a new
iterator ctf_errwarning_next() then consumes this list one by one and
hands it to the caller, which can free it.  New errors and warnings are
added until the list is consumed by the caller or the ctf_file_t is
closed, so you can dump them at intervals.  The caller can of course
choose to print only those warnings it wants.  (I am not sure whether we
want objdump, readelf or ld to print warnings or not: right now I'm
printing them, but maybe we only want to print errors?  This entirely
depends on whether warnings are voluminous things describing e.g. the
inability to emit single types because of name clashes or something.
There are no users of this infrastructure yet, so it's hard to say.)

There is no internationalization here yet, but this at least adds a
place where internationalization can be added, to one of
ctf_errwarning_next or ctf_err_warn.

We also provide a new ctf_assert() function which uses this
infrastructure to provide non-fatal assertion failures while emitting an
assert-like string to the caller: to save space and avoid needlessly
duplicating unchanging strings, the assertion test is inlined but the
print-things-out failure case is not.  All assertions in libctf will be
converted to use this machinery in future commits and propagate
assertion-failure errors up, so that the linker in particular cannot be
killed by libctf assertion failures when it could perfectly well just
print warnings and drop the CTF section.

include/
	* ctf-api.h (ECTF_INTERNAL): Adjust error text.
	(ctf_errwarning_next): New.
libctf/
	* ctf-impl.h (ctf_assert): New.
	(ctf_err_warning_t): Likewise.
	(ctf_file_t) <ctf_errs_warnings>: Likewise.
	(ctf_err_warn): New prototype.
	(ctf_assert_fail_internal): Likewise.
	* ctf-inlines.h (ctf_assert_internal): Likewise.
	* ctf-open.c (ctf_file_close): Free ctf_errs_warnings.
	* ctf-create.c (ctf_serialize): Copy it on serialization.
	* ctf-subr.c (ctf_err_warn): New, add an error/warning.
	(ctf_errwarning_next): New iterator, free and pass back
	errors/warnings in succession.
	* libctf.ver (ctf_errwarning_next): Add.
ld/
	* ldlang.c (lang_ctf_errs_warnings): New, print CTF errors
	and warnings.  Assert when libctf asserts.
	(lang_merge_ctf): Call it.
	(land_write_ctf): Likewise.
binutils/
	* objdump.c (ctf_archive_member): Print CTF errors and warnings.
	* readelf.c (dump_ctf_archive_member): Likewise.
2020-07-22 18:02:17 +01:00
Nick Alcock
ec388c16cd libctf: error out on corrupt CTF with invalid header flags
If corrupt CTF with invalid header flags is passed in, return the new
error ECTF_FLAGS.

include/
	* ctf-api.h (ECTF_FLAGS): New.
	(ECTF_NERR): Adjust.
	* ctf.h (CTF_F_MAX): New.
libctf/
	* ctf-open.c (ctf_bufopen_internal): Diagnose invalid flags.
2020-07-22 17:57:54 +01:00
Nick Alcock
688d28f621 libctf, next: introduce new class of easier-to-use iterators
The libctf machinery currently only provides one way to iterate over its
data structures: ctf_*_iter functions that take a callback and an arg
and repeatedly call it.

This *works*, but if you are doing a lot of iteration it is really quite
inconvenient: you have to package up your local variables into
structures over and over again and spawn lots of little functions even
if it would be clearer in a single run of code.  Look at ctf-string.c
for an extreme example of how unreadable this can get, with
three-line-long functions proliferating wildly.

The deduplicator takes this to the Nth level. It iterates over a whole
bunch of things: if we'd had to use _iter-class iterators for all of
them there would be twenty additional functions in the deduplicator
alone, for no other reason than that the iterator API requires it.

Let's do something better. strtok_r gives us half the design: generators
in a number of other languages give us the other half.

The *_next API allows you to iterate over CTF-like entities in a single
function using a normal while loop. e.g. here we are iterating over all
the types in a dict:

ctf_next_t *i = NULL;
int *hidden;
ctf_id_t id;

while ((id = ctf_type_next (fp, &i, &hidden, 1)) != CTF_ERR)
  {
    /* do something with 'hidden' and 'id' */
  }
if (ctf_errno (fp) != ECTF_NEXT_END)
    /* iteration error */

Here we are walking through the members of a struct with CTF ID
'struct_type':

ctf_next_t *i = NULL;
ssize_t offset;
const char *name;
ctf_id_t membtype;

while ((offset = ctf_member_next (fp, struct_type, &i, &name,
                                  &membtype)) >= 0
  {
    /* do something with offset, name, and membtype */
  }
if (ctf_errno (fp) != ECTF_NEXT_END)
    /* iteration error */

Like every other while loop, this means you have access to all the local
variables outside the loop while inside it, with no need to tiresomely
package things up in structures, move the body of the loop into a
separate function, etc, as you would with an iterator taking a callback.

ctf_*_next allocates 'i' for you on first entry (when it must be NULL),
and frees and NULLs it and returns a _next-dependent flag value when the
iteration is over: the fp errno is set to ECTF_NEXT_END when the
iteartion ends normally.  If you want to exit early, call
ctf_next_destroy on the iterator.  You can copy iterators using
ctf_next_copy, which copies their current iteration position so you can
remember loop positions and go back to them later (or ctf_next_destroy
them if you don't need them after all).

Each _next function returns an always-likely-to-be-useful property of
the thing being iterated over, and takes pointers to parameters for the
others: with very few exceptions all those parameters can be NULLs if
you're not interested in them, so e.g. you can iterate over only the
offsets of members of a structure this way:

while ((offset = ctf_member_next (fp, struct_id, &i, NULL, NULL)) >= 0)

If you pass an iterator in use by one iteration function to another one,
you get the new error ECTF_NEXT_WRONGFUN back; if you try to change
ctf_file_t in mid-iteration, you get ECTF_NEXT_WRONGFP back.

Internally the ctf_next_t remembers the iteration function in use,
various sizes and increments useful for almost all iterations, then
uses unions to overlap the actual entities being iterated over to keep
ctf_next_t size down.

Iterators available in the public API so far (all tested in actual use
in the deduplicator):

/* Iterate over the members of a STRUCT or UNION, returning each member's
   offset and optionally name and member type in turn.  On end-of-iteration,
   returns -1.  */
ssize_t
ctf_member_next (ctf_file_t *fp, ctf_id_t type, ctf_next_t **it,
                 const char **name, ctf_id_t *membtype);

/* Iterate over the members of an enum TYPE, returning each enumerand's
   NAME or NULL at end of iteration or error, and optionally passing
   back the enumerand's integer VALue.  */
const char *
ctf_enum_next (ctf_file_t *fp, ctf_id_t type, ctf_next_t **it,
              int *val);

/* Iterate over every type in the given CTF container (not including
   parents), optionally including non-user-visible types, returning
   each type ID and optionally the hidden flag in turn. Returns CTF_ERR
   on end of iteration or error.  */
ctf_id_t
ctf_type_next (ctf_file_t *fp, ctf_next_t **it, int *flag,
               int want_hidden);

/* Iterate over every variable in the given CTF container, in arbitrary
   order, returning the name and type of each variable in turn.  The
   NAME argument is not optional.  Returns CTF_ERR on end of iteration
   or error.  */
ctf_id_t
ctf_variable_next (ctf_file_t *fp, ctf_next_t **it, const char **name);

/* Iterate over all CTF files in an archive, returning each dict in turn as a
   ctf_file_t, and NULL on error or end of iteration.  It is the caller's
   responsibility to close it.  Parent dicts may be skipped.  Regardless of
   whether they are skipped or not, the caller must ctf_import the parent if
   need be.  */
ctf_file_t *
ctf_archive_next (const ctf_archive_t *wrapper, ctf_next_t **it,
                  const char **name, int skip_parent, int *errp);

ctf_label_next is prototyped but not implemented yet.

include/
	* ctf-api.h (ECTF_NEXT_END): New error.
	(ECTF_NEXT_WRONGFUN): Likewise.
	(ECTF_NEXT_WRONGFP): Likewise.
	(ECTF_NERR): Adjust.
	(ctf_next_t): New.
	(ctf_next_create): New prototype.
	(ctf_next_destroy): Likewise.
	(ctf_next_copy): Likewise.
	(ctf_member_next): Likewise.
	(ctf_enum_next): Likewise.
	(ctf_type_next): Likewise.
	(ctf_label_next): Likewise.
	(ctf_variable_next): Likewise.

libctf/
	* ctf-impl.h (ctf_next): New.
	(ctf_get_dict): New prototype.
	* ctf-lookup.c (ctf_get_dict): New, split out of...
	(ctf_lookup_by_id): ... here.
	* ctf-util.c (ctf_next_create): New.
	(ctf_next_destroy): New.
	(ctf_next_copy): New.
	* ctf-types.c (includes): Add <assert.h>.
	(ctf_member_next): New.
	(ctf_enum_next): New.
	(ctf_type_iter): Document the lack of iteration over parent
	types.
	(ctf_type_next): New.
	(ctf_variable_next): New.
	* ctf-archive.c (ctf_archive_next): New.
	* libctf.ver: Add new public functions.
2020-07-22 17:57:50 +01:00
Nick Alcock
2399827bfa libctf: add ctf_ref
This allows you to bump the refcount on a ctf_file_t, so that you can
smuggle it out of iterators which open and close the ctf_file_t for you
around the loop body (like ctf_archive_iter).

You still can't use this to preserve a ctf_file_t for longer than the
lifetime of its containing entity (e.g. ctf_archive).

include/
	* ctf-api.h (ctf_ref): New.
libctf/
	* libctf.ver (ctf_ref): New.
	* ctf-open.c (ctf_ref): Implement it.
2020-07-22 17:57:49 +01:00
Nick Alcock
9c23dfa5aa libctf: add ctf_archive_count
Another count that was otherwise unavailable without doing expensive
operations.

include/
	* ctf-api.h (ctf_archive_count): New.

libctf/
	* ctf-archive.c (ctf_archive_count): New.
	* libctf.ver: New public function.
2020-07-22 17:57:39 +01:00
Nick Alcock
e0325e2ced libctf: add ctf_member_count
This returns the number of members in a struct or union, or the number
of enumerations in an enum.  (This was only available before now by
iterating across every member, but it can be returned much faster than
that.)

include/
	* ctf-api.h (ctf_member_count): New.

libctf/
	* ctf-types.c (ctf_member_count): New.
	* libctf.ver: New public function.
2020-07-22 17:57:38 +01:00
Nick Alcock
9b15cbb789 libctf: add ctf_type_kind_forwarded
This is just like ctf_type_kind, except that forwards get the
type of the thing being pointed to rather than CTF_K_FORWARD.

include/
	* ctf-api.h (ctf_type_kind_forwarded): New.
libctf/
	* ctf-types.c (ctf_type_kind_forwarded): New.
2020-07-22 17:57:37 +01:00
Nick Alcock
01d9317436 libctf: add ctf_type_name_raw
We already have a function ctf_type_aname_raw, which returns the raw
name of a type with no decoration for structures or arrays or anything
like that: just the underlying name of whatever it is that's being
ultimately pointed at.

But this can be inconvenient to use, becauswe it always allocates new
storage for the string and copies it in, so it can potentially fail.
Add ctf_type_name_raw, which just returns the string directly out of
libctf's guts: it will live until the ctf_file_t is closed (if we later
gain the ability to remove types from writable dicts, it will live as
long as the type lives).

Reimplement ctf_type_aname_raw in terms of it.

include/
	* ctf-api.c (ctf_type_name_raw): New.

libctf/
	* ctf-types.c (ctf_type_name_raw): New.
	(ctf_type_aname_raw): Reimplement accordingly.
2020-07-22 17:57:36 +01:00
Nick Alcock
7eea9d3bdb libctf: restructure error handling to reduce relocations
Jose Marchesi noted that the traditional-Unix error array in ctf-error.c
introduces one reloc per error to initialize the array: 58 so far.  We
can reduce this to zero using an array of carefully-sized individual
members which is used to construct a string table, that is then
referenced by the lookup functions: but doing this automatically is a
pain.

Bruno Haible wrote suitable code years ago: I got permission to reuse it
(Bruno says "... which I hereby put in the public domain"); I modified
it a tiny bit (similarly to what Ulrich Drepper did in the dsohowto
text, but I redid it from scratch), commented it up a bit, and shifted
the error table into that form, migrating it into the new file
ctf-error.h.

This has the advantage that it spotted both typos in the text of the
errors in the comments in ctf-api.h and typos in the error defines in
the comments in ctf-error.c, and places where the two were simply not
in sync.  All are now fixed.

One new constant exists in ctf-api.h: CTF_NERR, since the old method of
working out the number of errors in ctf-error.c was no longer usable,
and it seems that the number of CTF errors is something users might
reasonably want as well.  It should be pretty easy to keep up to date as
new errors are introduced.

include/
	* ctf-api.h (ECTF_*): Improve comments.
	(ECTF_NERR): New.

libctf/
	* ctf-error.c: Include <stddef.h>, for offsetof.
	(_ctf_errlist): Migrate to...
	(_ctf_errlist_t): ... this.
	(_ctf_erridx): New, indexes into _ctf_errlist_t.
	(_ctf_nerr): Remove.
	(ctf_errmsg): Adjust accordingly.
	* Makefile.am (BUILT_SOURCES): Note...
	(ctf-error.h): ... this new rule.
	* Makefile.in: Regenerate.
	* mkerrors.sed: New, process ctf-api.h to generate ctf-error.h.
	* .gitignore: New, ignore ctf-error.h.
2020-07-22 17:57:20 +01:00
Nick Alcock
b64751cf0b include, libctf: typo fixes
include/
	* ctf-api.h: Fix typos in comments.
libctf/
	* ctf-impl.h: Fix typos in comments.
2020-07-22 17:57:19 +01:00
H.J. Lu
0e6a3f07f5 ld: Properly override the IR definition
We change the previous definition in the IR object to undefweak only
after all LTO symbols have been read.

include/

	PR ld/26262
	PR ld/26267
	* bfdlink.h (bfd_link_info): Add lto_all_symbols_read.

ld/

	PR ld/26262
	PR ld/26267
	* ldlang.c (lang_process): Set lto_all_symbols_read after all
	LTO IR symbols have been read.
	* plugin.c (plugin_notice): Override the IR definition only if
	all LTO IR symbols have been read or the new definition is
	non-weak and the the IR definition is weak
	* testsuite/ld-plugin/lto.exp: Run PR ld/26262 and ld/26267
	tests.
	* testsuite/ld-plugin/pr26262a.c: New file.
	* testsuite/ld-plugin/pr26262b.c: Likewise.
	* testsuite/ld-plugin/pr26262c.c: Likewise.
	* testsuite/ld-plugin/pr26267.err: Likewise.
	* testsuite/ld-plugin/pr26267a.c: Likewise.
	* testsuite/ld-plugin/pr26267b.c: Likewise.
	* testsuite/ld-plugin/pr26267c.c: Likewise.
2020-07-22 03:49:17 -07:00
H.J. Lu
a308b89de7 x86: Support GNU_PROPERTY_X86_FEATURE_2_TMM
Support GNU_PROPERTY_X86_FEATURE_2_TMM in

https://gitlab.com/x86-psABIs/x86-64-ABI/-/merge_requests/1

 #define GNU_PROPERTY_X86_FEATURE_2_TMM      (1U << 10)

binutils/

	* readelf.c (decode_x86_feature_2): Handle
	GNU_PROPERTY_X86_FEATURE_2_TMM.

gas/

	* config/tc-i386.c (output_insn): Check i.xstate to set
	GNU_PROPERTY_X86_FEATURE_2_TMM.
	* testsuite/gas/i386/i386.exp: Run x86-64-property-7,
	x86-64-property-8 and x86-64-property-9.
	* testsuite/gas/i386/x86-64-property-7.d: New file.
	* testsuite/gas/i386/x86-64-property-7.s: Likewise.
	* testsuite/gas/i386/x86-64-property-8.d: Likewise.
	* testsuite/gas/i386/x86-64-property-8.s: Likewise.
	* testsuite/gas/i386/x86-64-property-9.d: Likewise.
	* testsuite/gas/i386/x86-64-property-9.s: Likewise.

include/

	* elf/common.h (GNU_PROPERTY_X86_FEATURE_2_TMM): New.
2020-07-11 04:04:20 -07:00
John Baldwin
fc238d4a06 Support several new ELF auxiliary vector types on FreeBSD.
FreeBSD's kernel recently added several ELF auxiliary vector entries
to describe the arguments passed to new executable images during
exec().  The AT_FREEBSD_ARGC and AT_FREEBSD_ARGV entries give the
length and address of the process argument array.  AT_FREEBSD_ENVC and
AT_FREEBSD_ENVV entries give the length and address of the initial
process environment.  AT_FREEBSD_PS_STRINGS gives the address of the
'struct ps_strings' object.

include/ChangeLog:

	* elf/common.h (AT_FREEBSD_ARGC, AT_FREEBSD_ARGV, AT_FREEBSD_ENVC)
	(AT_FREEBSD_ENVV, AT_FREEBSD_PS_STRINGS): Define.

gdb/ChangeLog:

	* fbsd-tdep.c (fbsd_print_auxv_entry): Handle AT_FREEBSD_ARGC,
	AT_FREEBSD_ARGV, AT_FREEBSD_ENVC, AT_FREEBSD_ENVV,
	AT_FREEBSD_PS_STRINGS.
2020-07-09 09:39:05 -07:00
Alan Modra
fe49679d51 Remove powerpc PE support
Plus some leftover powerpc lynxos support.

bfd/
	* coff-ppc.c: Delete.
	* pe-ppc.c: Delete.
	* pei-ppc.c: Delete.
	* Makefile.am (BFD32_BACKENDS, BFD32_BACKENDS_CFILES): Remove PE PPC.
	* coffcode.h (coff_set_arch_mach_hook, coff_set_flags): Remove
	PPCMAGIC code.
	(coff_write_object_contents): Remove PPC_PE code.
	* config.bfd: Move powerpcle-pe to removed targets.
	* configure.ac: Remove powerpc PE entries.
	* libcoff-in.h (ppc_allocate_toc_section): Delete.
	(ppc_process_before_allocation): Delete.
	* peXXigen.c: Remove POWERPC_LE_PE code and comments.
	* targets.c: Remove powerpc PE vectors.
	* po/SRC-POTFILES.in: Regenerate.
	* libcoff.h: Regenerate.
	* Makefile.in: Regenerate.
	* configure: Regenerate.
binutils/
	* dlltool.c: Remove powerpc PE support and comments.
	* configure.ac: Remove powerpc PE dlltool config.
	* configure: Regenerate.
gas/
	* config/obj-coff.h: Remove TE_PE support.
	* config/tc-ppc.c: Likewise.
	* config/tc-ppc.h: Likewise.
	* configure.tgt: Remove powerpc PE and powerpc lynxos.
	* testsuite/gas/cfi/cfi.exp (cfi-common-6): Remove powerpc PE
	condition.
	* testsuite/gas/macros/macros.exp: Don't xfail powerpc PE.
include/
	* coff/powerpc.h: Delete.
ld/
	* emulparams/ppcpe.sh: Delete.
	* scripttempl/ppcpe.sc: Delete.
	* emulparams/ppclynx.sh: Delete.
	* Makefile.am (ALL_EMULATION_SOURCES): Remove ppc PE and lynxos.
	* configure.tgt: Likewise.
	* emultempl/beos.em: Remove powerpc PE support.
	* emultempl/pe.em: Likewise.
	* po/BLD-POTFILES.in: Regenerate.
	* Makefile.in: Regenerate.
2020-07-09 22:58:16 +09:30
Nick Clifton
b115b9fd3c Add markers for binutils 2.35 branch 2020-07-04 10:16:22 +01:00
Nelson Chu
08ccfccf0e RISC-V: Support debug and float CSR as the unprivileged ones.
The unprivileged CSR should be controlled by other specific specs rather
than the privileged spec.  For example, the debug CSR should be controlled
by the debug spec, and the float CSR should be controlled by the float
spec.  User may use assembler options to choose what the debug and other
specs they want, or may encode the versions of specs into the architecture
string directly.  Since we haven't decided which one is better, we set the
defined and aborted versions of unprivileged CSR to PRIV_SPEC_CLASS_NONE
in the include/opcode/riscv-opc.h, to tell assembler don't check priv spec
versions for them.  However, these PRIV_SPEC_CLASS_NONE will be changed
to FLOAT_SPEC_CLASS_* and DEBUG_SPEC_CLASS_* in the future.

	gas/
	* config/tc-riscv.c (riscv_csr_class_check): Removed.  Move the
	checking into riscv_csr_address.
	(riscv_csr_version_check): Likewise.
	(riscv_csr_address): New function.  Return the suitable CSR address
	after checking the ISA dependency and versions.  Issue warnings	if
	we find any conflict and -mcsr-check is set.  CSR_CLASS_F and
	CSR_CLASS_DEBUG are unprivileged CSR for now, so don't check the
	priv spec versions for them.
	(reg_csr_lookup_internal): Call riscv_csr_address to find the
	suitable CSR address.

	* testsuite/gas/riscv/priv-reg-fail-fext.d: Remove -mpriv-spec=1.11.
	* testsuite/gas/riscv/priv-reg-fail-read-only-01.d: Likewise.
	* testsuite/gas/riscv/priv-reg-fail-rv32-only.d: Likewise.
	* testsuite/gas/riscv/priv-reg-fail-fext.l:  We don't care the
	priv spec warnings here.  These warnings are added by accident.
	Remove them and only focus on the ISA dependency warnings.
	* testsuite/gas/riscv/priv-reg-fail-rv32-only.l: Likewise.
	* testsuite/gas/riscv/priv-reg-fail-read-only-01.l: Likewise.
	* testsuite/gas/riscv/priv-reg-fail-version-1p9.l: Updated since
	dscratch0 and dscratch1 are regarded as the unprivileged CSR rather
	than the privileged ones.
	* testsuite/gas/riscv/priv-reg-fail-version-1p9p1.l: Likewise.
	* testsuite/gas/riscv/priv-reg-fail-version-1p10.l: Likewise.
	* testsuite/gas/riscv/priv-reg-fail-version-1p11.l: Likewise.
	* testsuite/gas/riscv/priv-reg.s: Likewise.  Add missing debug CSR.
	* testsuite/gas/riscv/priv-reg-version-1p9.d: Likewise.
	* testsuite/gas/riscv/priv-reg-version-1p9p1.d: Likewise.
	* testsuite/gas/riscv/priv-reg-version-1p10.d: Likewise.
	* testsuite/gas/riscv/priv-reg-version-1p11.d: Likewise.
	* testsuite/gas/riscv/csr-dw-regnums.d: Likewise.
	* testsuite/gas/riscv/csr-dw-regnums.s: Likewise.

	include/
	* opcode/riscv-opc.h: Support the unprivileged CSR.  The versions
	of the unprivileged CSR should be PRIV_SPEC_CLASS_NONE for now.
	* opcode/riscv.h (enum riscv_csr_class): Add CSR_CLASS_DEBUG.

	opcodes/
	* riscv-dis.c (print_insn_args, case 'E'): Updated.  Let the
	unprivileged CSR can also be initialized.
2020-06-30 09:54:55 +08:00
Nelson Chu
83d7d99e75 RISC-V: Cleanup the include/opcode/riscv-opc.h.
The include/opcode/riscv-opc.h file is no longer automatically generated,
so we remove the misleading comments and add new ones.  Besides, the CAUSE_*
macros and DECLARE_CAUSE are unused for binutils and gdb.  Therefore, remove
them, too.

	include/
	* opcode/riscv-opc.h: Cleanup and remove the unused macros.
2020-06-30 09:38:00 +08:00
Alan Modra
279edac53d C++ comments
binutils isn't c99 (yet).  This replaces or removes some C++ style
comments.

bfd/
	* arc-got.h: Use C style comments.
	* coff-z80.c: Likewise.
	* elf32-csky.c: Likewise.
	* peXXigen.c: Likewise.
	* elf32-m32c.c (m32c_elf_relax_delete_bytes): Remove commented out
	code.
binutils/
	* dwarf.c: Use C style comments.
	* resrc.c: Likewise.
gas/
	* config/tc-s12z.c: Use C style comments.
	* config/tc-z80.c: Likewise.
	* config/tc-xtensa.c (emit_ld_r_n): Remove commented out code.
include/
	* coff/internal.h: Use C style comments.
	* coff/pe.h: Likewise.
	* elf/ppc64.h: Likewise.
opcodes/
	* arm-dis.c: Use C style comments.
	* cr16-opc.c: Likewise.
	* ft32-dis.c: Likewise.
	* moxie-opc.c: Likewise.
	* tic54x-dis.c: Likewise.
	* s12z-opc.c: Remove useless comment.
	* xgate-dis.c: Likewise.
2020-06-29 10:07:56 +09:30
Nick Alcock
2f6ecaed66 libctf, binutils: support CTF archives like objdump
objdump and readelf have one major CTF-related behavioural difference:
objdump can read .ctf sections that contain CTF archives and extract and
dump their members, while readelf cannot.  Since the linker often emits
CTF archives, this means that readelf intermittently and (from the
user's perspective) randomly fails to read CTF in files that ld emits,
with a confusing error message wrongly claiming that the CTF content is
corrupt.  This is purely because the archive-opening code in libctf was
needlessly tangled up with the BFD code, so readelf couldn't use it.

Here, we disentangle it, moving ctf_new_archive_internal from
ctf-open-bfd.c into ctf-archive.c and merging it with the helper
function in ctf-archive.c it was already using.  We add a new public API
function ctf_arc_bufopen, that looks very like ctf_bufopen but returns
an archive given suitable section data rather than a ctf_file_t: the
archive is a ctf_archive_t, so it can be called on raw CTF dictionaries
(with no archive present) and will return a single-member synthetic
"archive".

There is a tiny lifetime tweak here: before now, the archive code could
assume that the symbol section in the ctf_archive_internal wrapper
structure was always owned by BFD if it was present and should always be
freed: now, the caller can pass one in via ctf_arc_bufopen, wihch has
the usual lifetime rules for such sections (caller frees): so we add an
extra field to track whether this is an internal call from ctf-open-bfd,
in which case we still free the symbol section.

include/
	* ctf-api.h (ctf_arc_bufopen): New.
libctf/
	* ctf-impl.h (ctf_new_archive_internal): Declare.
	(ctf_arc_bufopen): Remove.
	(ctf_archive_internal) <ctfi_free_symsect>: New.
	* ctf-archive.c (ctf_arc_close): Use it.
	(ctf_arc_bufopen): Fuse into...
	(ctf_new_archive_internal): ... this, moved across from...
	* ctf-open-bfd.c: ... here.
	(ctf_bfdopen_ctfsect): Use ctf_arc_bufopen.
	* libctf.ver: Add it.
binutils/
	* readelf.c (dump_section_as_ctf): Support .ctf archives using
	ctf_arc_bufopen.  Automatically load the .ctf member of such
	archives as the parent of all other members, unless specifically
	overridden via --ctf-parent.  Split out dumping code into...
	(dump_ctf_archive_member): ... here, as in objdump, and call
	it once per archive member.
	(dump_ctf_indent_lines): Code style fix.
2020-06-26 15:56:39 +01:00
Pat Bernardi
85f7484a3a m68k: tag floating-point ABI used
This patch adds GNU attribute support to m68k and utilises it to tag the
floating-point calling convention used (hard-float or soft-float). It enables
the linker to ensure linked objects use a consistent floating-point ABI and
allows tools like GDB to infer the ABI used from the ELF file. It is based on
similar work done for PowerPC.

bfd/
	* elf32-m68k.c (m68k_elf_merge_obj_attributes): New function.
	(elf32_m68k_merge_private_bfd_data): Merge GNU attributes.
binutils/
	* readelf.c (display_m68k_gnu_attribute): New function.
	(process_arch_specific): Call display_m68k_gnu_attribute for EM_68K.
gas/
	* config/tc-m68k.c (m68k_elf_gnu_attribute): New function.
	(md_pseudo_table): Handle "gnu_attribute".
	* doc/as.texi: Document GNU attribute for M68K.
include/
	* elf/m68k.h: Add enum for GNU object attribute with floating point
	tag name and values.
ld/
	* testsuite/ld-m68k/attr-gnu-4-0.s: New file.
	* testsuite/ld-m68k/attr-gnu-4-1.s: Likewise.
	* testsuite/ld-m68k/attr-gnu-4-2.s: Likewise.
	* testsuite/ld-m68k/attr-gnu-4-00.d: Likewise.
	* testsuite/ld-m68k/attr-gnu-4-01.d: Likewise.
	* testsuite/ld-m68k/attr-gnu-4-02.d: Likewise.
	* testsuite/ld-m68k/attr-gnu-4-10.d: Likewise.
	* testsuite/ld-m68k/attr-gnu-4-11.d: Likewise.
	* testsuite/ld-m68k/attr-gnu-4-12.d: Likewise.
	* testsuite/ld-m68k/attr-gnu-4-20.d: Likewise.
	* testsuite/ld-m68k/attr-gnu-4-21.d: Likewise.
	* testsuite/ld-m68k/attr-gnu-4-22.d: Likewise.
	* testsuite/ld-m68k/m68k.exp: Run the new tests.
2020-06-26 14:42:19 +09:30
Nick Clifton
6248d9d647 Remove the use of the register keyword in the libiberty.h header file - it is deprecated and incompatible with C++17.
* libiberty.h (bsearch_r): Remove use of the register keyword from
	the prototype.
2020-06-25 11:16:42 +01:00
H.J. Lu
727b7b1864 Sync config, include and libiberty with GCC
config/

2020-06-24  H.J. Lu  <hongjiu.lu@intel.com>

	Sync with GCC
	2020-05-29  H.J. Lu  <hjl.tools@gmail.com>

	PR bootstrap/95413
	* cet.m4: Replace save_CFLAGS and save_LDFLAGS with
	cet_save_CFLAGS and cet_save_LDFLAGS.

include/

2020-06-24  H.J. Lu  <hongjiu.lu@intel.com>

	Sync with GCC
	2020-06-23  Nick Alcock  <nick.alcock@oracle.com>

	* libiberty.h (bsearch_r): New.

	2020-04-17  Martin Liska  <mliska@suse.cz>
		    Jonathan Yong <10walls@gmail.com>

	PR gcov-profile/94570
	* filenames.h (defined): Do not define HAVE_DOS_BASED_FILE_SYSTEM
	for CYGWIN.

libiberty/

2020-06-23  Nick Alcock  <nick.alcock@oracle.com>

	* bsearch_r.c: New file.
	* Makefile.in (CFILES): Add bsearch_r.c.
	(REQUIRED_OFILES): Add bsearch_r.o.
	* functions.texi: Regenerate.

2020-05-29  H.J. Lu  <hjl.tools@gmail.com>

	PR bootstrap/95413
	* configure: Regenerated.

2020-05-15  Iain Buclaw  <ibuclaw@gdcproject.org>

	* d-demangle.c (dlang_attributes): Add @live attribute.
	* testsuite/d-demangle-expected: Add new tests.

2020-05-14  Rainer Schuetze  <r.sagitario@gmx.de>
	    Iain Buclaw  <ibuclaw@gdcproject.org>

	* d-demangle.c (enum dlang_symbol_kinds): Remove enum.
	(struct dlang_info): New struct
	(dlang_decode_backref): New function.
	(dlang_backref): New function.
	(dlang_symbol_backref): New function.
	(dlang_type_backref): New function.
	(dlang_symbol_name_p): New function.
	(dlang_function_type_noreturn): New function.
	(dlang_function_type): Add 'info' parameter.  Decode function type
	with dlang_function_type_noreturn.
	(dlang_function_args): Add 'info' parameter.
	(dlang_type): Add 'info' parameter.  Handle back referenced types.
	(dlang_identifier): Replace 'kind' parameter with 'info'.  Handle back
	referenced symbols.  Split off decoding of plain identifiers to...
	(dlang_lname): ...here.
	(dlang_parse_mangle): Replace 'kind' parameter with 'info'.  Decode
	function type and return with dlang_type.
	(dlang_parse_qualified): Replace 'kind' parameter with 'info', add
	'suffix_modifier' parameter.  Decode function type with
	dlang_function_type_noreturn.
	(dlang_parse_tuple): Add 'info' parameter.
	(dlang_template_symbol_param): New function.
	(dlang_template_args): Add 'info' parameter.  Decode symbol parameter
	with dlang_template_symbol_param.  Handle back referenced values, and
	externally mangled parameters.
	(dlang_parse_template): Add 'info' parameter.
	(dlang_demangle_init_info): New function.
	(dlang_demangle): Initialize and pass 'info' parameter.
	* testsuite/d-demangle-expected: Add new tests.
2020-06-24 16:52:48 -07:00
Alex Coplan
359157df20 aarch64: Normalize and sort feature bit macros
This patch normalizes and sorts the feature bit macros in
include/opcode/aarch64.h such that it's easy to tell which bits are
allocated and where it's safe to add new feature bits.

Testing:
 * Testsuite run on aarch64-none-elf.

include/ChangeLog:

2020-06-22  Alex Coplan  <alex.coplan@arm.com>

	* opcode/aarch64.h (AARCH64_FEATURE_SHA2): Normalize.
	(AARCH64_FEATURE_AES): Likewise.
	(AARCH64_FEATURE_V8_4): Likewise.
	(AARCH64_FEATURE_SM4): Likewise.
	(AARCH64_FEATURE_SHA3): Likewise.
	(AARCH64_FEATURE_V8): Likewise.
	(AARCH64_FEATURE_V8_2): Likewise.
	(AARCH64_FEATURE_V8_3): Likewise.
	(AARCH64_FEATURE_FP): Likewise.
	(AARCH64_FEATURE_SIMD): Likewise.
	(AARCH64_FEATURE_CRC): Likewise.
	(AARCH64_FEATURE_LSE): Likewise.
	(AARCH64_FEATURE_PAN): Likewise.
	(AARCH64_FEATURE_LOR): Likewise.
	(AARCH64_FEATURE_RDMA): Likewise.
	(AARCH64_FEATURE_V8_1): Likewise.
	(AARCH64_FEATURE_F16): Likewise.
	(AARCH64_FEATURE_RAS): Likewise.
	(AARCH64_FEATURE_PROFILE): Likewise.
	(AARCH64_FEATURE_SVE): Likewise.
	(AARCH64_FEATURE_RCPC): Likewise.
	(AARCH64_FEATURE_COMPNUM): Likewise.
	(AARCH64_FEATURE_DOTPROD): Likewise.
	(AARCH64_FEATURE_F16_FML): Likewise.
	(AARCH64_FEATURE_V8_5): Likewise.
	(AARCH64_FEATURE_V8_6): Likewise.
	(AARCH64_FEATURE_BFLOAT16): Likewise.
	(AARCH64_FEATURE_FLAGMANIP): Likewise.
	(AARCH64_FEATURE_FRINTTS): Likewise.
	(AARCH64_FEATURE_SB): Likewise.
	(AARCH64_FEATURE_PREDRES): Likewise.
	(AARCH64_FEATURE_CVADP): Likewise.
	(AARCH64_FEATURE_RNG): Likewise.
	(AARCH64_FEATURE_BTI): Likewise.
	(AARCH64_FEATURE_SCXTNUM): Likewise.
	(AARCH64_FEATURE_ID_PFR2): Likewise.
	(AARCH64_FEATURE_SSBS): Likewise.
	(AARCH64_FEATURE_MEMTAG): Likewise.
	(AARCH64_FEATURE_TME): Likewise.
	(AARCH64_FEATURE_I8MM): Likewise.
	(AARCH64_FEATURE_F32MM): Likewise.
	(AARCH64_FEATURE_F64MM): Likewise.
	(AARCH64_FEATURE_SVE2): Likewise.
	(AARCH64_FEATURE_SVE2_AES): Likewise.
	(AARCH64_FEATURE_SVE2_BITPERM): Likewise.
	(AARCH64_FEATURE_SVE2_SM4): Likewise.
	(AARCH64_FEATURE_SVE2_SHA3): Likewise.
2020-06-22 14:51:04 +01:00
Saagar Jha
d768f160a9 Recognize some new Mach-O load commands
bfd
	* mach-o.c: Support the new load commands by reading a linkedit data
	command for them.
binutils
	* od-macho.c: Dump linkedit data for new load commands.
include
	* mach-o/loader.h: Add declarations of two new Mach-O load
	commands.
2020-06-22 14:29:20 +01:00
Nelson Chu
39ff0b8123 RISC-V: Report warning when linking the objects with different priv specs.
We do know some conflicts among different privileged specs.  For linker,
the safest approach is that don't allow the object linked with others which
may cause conflicts.  But this may cause inconvenience since not all objects
with conflicting priv specs are linked will cause problems.  But it is hard
to know the detailed conflict cases for linker, so we probably need a option
to tell linker that we do know there are no conflicts, or we are willing to
take risks to link the objects with conflicted priv specs.  But the option
is still under discussion.

Therefore, we can report warnings rather than errors when linking the objects
with conflicted priv specs.  This not only makes the linker more flexible,
but also warns people that the conflicts may happen.  We also need to update
the output priv spec version once the input priv spec is newer.

	bfd/
	* elfxx-riscv.c (struct priv_spec_t priv_specs[]): Move them from
	opcodes/riscv-opc.c to bfd/elfxx-riscv.c, since we need it in linker.
	(riscv_get_priv_spec_class): Likewise.
	(riscv_get_priv_spec_name): Likewise.
	(riscv_get_priv_spec_class_from_numbers): New function, convert
	the version numbers into string, then call riscv_get_priv_spec_class
	to get the priv spec class.
	* elfxx-riscv.h (riscv_get_priv_spec_class): Move forward declaration
	from include/opcode/riscv.h to bfd/elfxx-riscv.h.
	(riscv_get_priv_spec_name): Likewise.
	(riscv_get_priv_spec_class_from_numbers): New forward declaration.
	(opcode/riscv.h): Include it in the header rather than elfxx-riscv.c.
	* elfnn-riscv.c (riscv_merge_attributes):  Get the priv spec classes
	of input and output objects form their priv spec attributes by
	riscv_get_priv_spec_class_from_numbers.  Report warning rather than
	errors when linking objects with differnet priv spec versions.  We do
	know v1.9.1 may have conflicts to other versions, so report the
	warning, too.  After that, update the output priv spec version to the
	newest one so far.

	gas/
	* config/tc-riscv.c (buf_size, buf): Remove the unused variables.
	(riscv_set_default_priv_spec): Get the priv spec version from the
	priv spec attributes by riscv_get_priv_spec_class_from_numbers.

	include/
	* opcode/riscv.h (riscv_get_priv_spec_class): Move the function
	forward declarations to bfd/elfxx-riscv.h.
	(riscv_get_priv_spec_name): Likewise.

	opcodes/
	* riscv-opc.c: Move the structures and functions to bfd/elfxx-riscv.c.
	* riscv-dis.c: Include elfxx-riscv.h.

	ld/
	* testsuite/ld-riscv-elf/attr-merge-priv-spec-failed-01.d: Updated.
	* testsuite/ld-riscv-elf/attr-merge-priv-spec-failed-02.d: Updated.
	* testsuite/ld-riscv-elf/attr-merge-priv-spec-failed-03.d: Updated.
	* testsuite/ld-riscv-elf/attr-merge-priv-spec-failed-04.d: Updated.
	* testsuite/ld-riscv-elf/attr-merge-priv-spec-failed-05.d: Updated.
	* testsuite/ld-riscv-elf/attr-merge-priv-spec-failed-06.d: Updated.
2020-06-22 10:01:14 +08:00
Max Filippov
7a77f1ac2c xtensa: allow runtime ABI selection
2020-06-15  Max Filippov  <jcmvbkbc@gmail.com>
bfd/
	* elf32-xtensa.c (XSHAL_ABI, XTHAL_ABI_UNDEFINED)
	(XTHAL_ABI_WINDOWED, XTHAL_ABI_CALL0): New macros.
	(elf32xtensa_abi): New global variable.
	(xtensa_abi_choice): New function.
	(elf_xtensa_create_plt_entry): Use xtensa_abi_choice instead of
	XSHAL_ABI to select PLT code.

gas/
	* config/tc-xtensa.c (XTHAL_ABI_WINDOWED, XTHAL_ABI_CALL0): New
	macros.
	(elf32xtensa_abi): New declaration.
	(option_abi_windowed, option_abi_call0): New enum constants.
	(md_longopts): Add entries for --abi-windowed and --abi-call0.
	(md_parse_option): Add handlers for --abi-windowed and
	--abi-call0.
	(xtensa_add_config_info): Use xtensa_abi_choice instead of
	XSHAL_ABI to format ABI tag.
	* doc/as.texi (Target Xtensa options): Add --abi-windowed and
	--abi-call0 to the list of options.
	* doc/c-xtensa.texi: Add description for options --abi-windowed
	and --abi-call0.
	* testsuite/gas/xtensa/abi-call0.d: New test definition.
	* testsuite/gas/xtensa/abi-windowed.d: New test definition.
	* testsuite/gas/xtensa/abi.s: New test source.

include/
	* elf/xtensa.h (xtensa_abi_choice): New declaration.

ld/
	* emultempl/xtensaelf.em (XSHAL_ABI): Remove macro definition.
	(XTHAL_ABI_UNDEFINED, XTHAL_ABI_WINDOWED, XTHAL_ABI_CALL0): New
	macros.
	(elf32xtensa_abi): New declaration.
	(xt_config_info_unpack_and_check): Set elf32xtensa_abi if it is
	undefined.  Use xtensa_abi_choice instead of XSHAL_ABI to test
	ABI tag consistency.
	(xtensa_add_config_info): Use xtensa_abi_choice instead of
	XSHAL_ABI to format ABI tag.
	(PARSE_AND_LIST_PROLOGUE): Define OPTION_ABI_WINDOWED,
	OPTION_ABI_CALL0 and declare elf32xtensa_abi.
	(PARSE_AND_LIST_LONGOPTS): Add entries for --abi-windowed and
	--abi-call0.
	(PARSE_AND_LIST_OPTIONS): Add help text for --abi-windowed and
	--abi-call0.
	(PARSE_AND_LIST_ARGS_CASES): Add handlers for --abi-windowed and
	--abi-call0.
	* ld.texi: Add description for options --abi-windowed and
	--abi-call0.
2020-06-15 13:01:30 -07:00
Roland McGrath
cae64165f4 gold, ld: Implement -z start-stop-visibility=... option.
gold/
	Implement -z start-stop-visibility=... option.
	* options.h (class General_options): Handle -z start-stop-visibility=.
	(General_options::start_stop_visibility_enum): New public method.
	(General_options::set_start_stop_visibility_enum): New private method.
	(General_options::start_stop_visibility_enum_): New private member.
	* options.cc (General_options::General_options): Add initializer.
	(General_options::finalize): Set this->start_stop_visibility_enum_
	from string value.
	* layout.cc (Layout::define_section_symbols): Use option setting.

bfd/
	* elflink.c (bfd_elf_define_start_stop): Use start_stop_visibility
	field of bfd_link_info.

include/
	* bfdlink.h (struct bfd_link_info): New field start_stop_visibility.

ld/
	* NEWS: Mention -z start-stop-visibility=... option for ELF.
	* ld.texi (Options): Document -z start-stop-visibility=... option.
	* ldmain.c (main): Initialize link_info.start_stop_visibility.
	* emultempl/elf.em (gld${EMULATION_NAME}_handle_option):
	Parse -z start-stop-visibility=... option.
2020-06-15 11:45:02 -07:00
Nelson Chu
d8af286fff RISC-V: Drop the privileged spec v1.9 support.
There is a conflict between v1.9 and v1.9.1 - CSR MISA address.  MISA is
0xf10 in v1.9, but change to 0x301 in v1.9.1.  The change made MISA writable,
but may also cause risk of compatibility.  Binutils already support the
-mpriv-spec options and ELF priv attributes, which can used to choose what
privileged spec you want, and then give a correponding CSR name and address
to use.  But Gdb and other tools don't have the simialr mechanism for now.
However, there are two things can be confirmed,

1. If we don't have a way to control the priv specs, then the changes, like
MISA, will cause risk and hard to maintain.

2. We get the guarantee that the CSR address won't be reused in the future
specs, even if it is dropped.

I'm not sure if Gdb needs to care about the priv spec versions, it is still
discussing.  But drop the priv spec v1.9, and make sure that we won't reuse
the CSR address is a useful solution for now.  Also, we might drop the v1.9.1
in a year or two.  After that, specs above v1.10 should be compatible anyway.

	gas/
	* testsuite/gas/riscv/priv-reg-fail-version-1p9.d: Removed.
	* testsuite/gas/riscv/priv-reg-fail-version-1p9.l: Likewise.
	* testsuite/gas/riscv/priv-reg-version-1p9.d: Likewise.

	include/
	* opcode/riscv-opc.h: Update the defined versions of CSR from
	PRIV_SPEC_CLASS_1P9 to PRIV_SPEC_CLASS_1P9P1.  Also, drop the
	MISA DECLARE_CSR_ALIAS since it's aborted version is v1.9.
	* opcode/riscv.h (enum riscv_priv_spec_class): Remove
	PRIV_SPEC_CLASS_1P9.

	opcodes/
	* riscv-opc.c (priv_specs): Remove v1.9 and PRIV_SPEC_CLASS_1P9.
2020-06-12 09:41:20 +08:00
Alex Coplan
14962256b3 [PATCH]: aarch64: Refactor representation of system registers
Prior to this patch, the information describing the AArch64 system
registers was separate from the information describing which system
registers are available depending on the CPU feature set. Indeed, the
latter was implemented as a separate function from the main table with
the system register information.

This patch remedies this situation and puts the feature information into
the system register table itself.

This has several advantages:

 * Having all the information described in one place is easier to
   maintain.
 * The logic to check whether a system register is supported now becomes
   trivial (and much more efficient).

Since this patch ended up touching every line of the system register
table, I took the opportunity to make the formatting more consistent and
remove some redundant comments.

Note that there is still more refactoring that could be done along the
same lines here (e.g. with the TLB instructions) but this seemed like a
reasonable first pass.

Testing:

 * Regression tested an x64 -> aarch64-none-elf cross binutils.
 * Built aarch64-none-elf cross toolchain, checked newlib startup
   code still works.
 * Bootstrapped binutils on aarch64-linux-gnu, regression tested.
 * Built aarch64 kernel using new binutils with allyesconfig.

OK for master? If so, I'll need a maintainer to commit on my behalf
since I don't have write access.

Thanks,
Alex

---

include/ChangeLog:

2020-06-11  Alex Coplan  <alex.coplan@arm.com>

	* opcode/aarch64.h (aarch64_sys_reg): Add required features to struct
	describing system registers.

opcodes/ChangeLog:

2020-06-11  Alex Coplan  <alex.coplan@arm.com>

	* aarch64-opc.c (SYSREG): New macro for describing system registers.
	(SR_CORE): Likewise.
	(SR_FEAT): Likewise.
	(SR_RNG): Likewise.
	(SR_V8_1): Likewise.
	(SR_V8_2): Likewise.
	(SR_V8_3): Likewise.
	(SR_V8_4): Likewise.
	(SR_PAN): Likewise.
	(SR_RAS): Likewise.
	(SR_SSBS): Likewise.
	(SR_SVE): Likewise.
	(SR_ID_PFR2): Likewise.
	(SR_PROFILE): Likewise.
	(SR_MEMTAG): Likewise.
	(SR_SCXTNUM): Likewise.
	(aarch64_sys_regs): Refactor to store feature information in the table.
	(aarch64_sys_reg_supported_p): Collapse logic for system registers
	that now describe their own features.
	(aarch64_pstatefield_supported_p): Likewise.
2020-06-11 12:34:37 +01:00
Alan Modra
d0c4e7802d asan: readelf: process_mips_specific buffer overflow
DT_MIPS_OPTIONS is not a regular array as assumed by readelf.  This
patch corrects that assumption, and to do so easily, makes various
internal (host byte order) structs the same size as external (target
byte order) structs.

include/
	* elf/mips.h (Elf32_RegInfo): Use fixed width integer types.
	(Elf64_Internal_RegInfo, Elf_Internal_Options): Likewise.
binutils/
	* readelf.c (process_mips_specific): Assert size of internal
	types match size of external types, and simplify allocation of
	internal buffer.  Catch possible integer overflow when sanity
	checking option size.  Don't assume options are a regular array.
	Sanity check reginfo option against option size.  Use PRI macros
	when printing.
2020-06-11 13:54:46 +09:30
Alan Modra
87c69f9732 Rename PowerPC64 pcrel GOT TLS relocations
These relocations should have had REL in their names, to reflect the
fact that they are pc-relative.  Fix that now by adding _PCREL.
I've added some back-compatibility code to support anyone using
.reloc with the old relocations.

include/
	* elf/ppc64.h (elf_ppc64_reloc_type): Rename
	R_PPC64_GOT_TLSGD34 to R_PPC64_GOT_TLSGD_PCREL34,
	R_PPC64_GOT_TLSLD34 to R_PPC64_GOT_TLSLD_PCREL34,
	R_PPC64_GOT_TPREL34 to R_PPC64_GOT_TPREL_PCREL34, and
	R_PPC64_GOT_DTPREL34 to R_PPC64_GOT_DTPREL_PCREL34.
bfd/
	* reloc.c: Rename
	BFD_RELOC_PPC64_GOT_TLSGD34 to BFD_RELOC_PPC64_GOT_TLSGD_PCREL34,
	BFD_RELOC_PPC64_GOT_TLSLD34 to BFD_RELOC_PPC64_GOT_TLSLD_PCREL34,
	BFD_RELOC_PPC64_GOT_TPREL34 to BFD_RELOC_PPC64_GOT_TPREL_PCREL34,
	BFD_RELOC_PPC64_GOT_DTPREL34 to BFD_RELOC_PPC64_GOT_DTPREL_PCREL34.
	* elf64-ppc.c: Update throughout for reloc renaming.
	(ppc64_elf_reloc_name_lookup): Handle old reloc names.
	* libbfd.h: Regenerate.
	* bfd-in2.h: Regenerate.
gas/
	* config/tc-ppc.c: Update throughout for reloc renaming.
elfcpp/
	* powerpc.h: Rename
	R_PPC64_GOT_TLSGD34 to R_PPC64_GOT_TLSGD_PCREL34,
	R_PPC64_GOT_TLSLD34 to R_PPC64_GOT_TLSLD_PCREL34,
	R_PPC64_GOT_TPREL34 to R_PPC64_GOT_TPREL_PCREL34, and
	R_PPC64_GOT_DTPREL34 to R_PPC64_GOT_DTPREL_PCREL34.
gold/
	* powerpc.cc: Update throughout for reloc renaming.
2020-06-06 14:44:32 +09:30
Jose E. Marchesi
e9bffec9af opcodes: discriminate endianness and insn-endianness in CGEN ports
The CGEN support code in opcodes accesses instruction contents using a
couple of functions defined in cgen-opc.c: cgen_get_insn_value and
cgen_put_insn_value.  These functions use the "instruction endianness"
in the CPU description to order the read/written bytes.

The process of writing an instruction to the object file is:

  a) cgen_put_insn_value        ;; Writes out the opcodes.
  b) ARCH_cgen_insert_operand
       insert_normal
         insert_1
           cgen_put_insn_value  ;; Writes out the bytes of the
                                ;; operand.

Likewise, the process of reading an instruction from the object file
is:

  a) cgen_get_insn_value        ;; Reads the opcodes.
  b) ARCH_cgen_extract_operand
       extract_normal
         extract_1
           cgen_get_insn_value  ;; Reads in the bytes of the
                                ;; operand.

As can be seen above, cgen_{get,put}_insn_value are used to both
process the instruction opcodes (the constant fields conforming the
base instruction) and also the values of the instruction operands,
such as immediates.

This is problematic for architectures in which the endianness of
instructions is different to the endianness of data.  An example is
BPF, where instructions are always encoded big-endian but the data may
be either big or little.

This patch changes the cgen_{get,put}_insn_value functions in order to
get an extra argument with the endianness to use, and adapts the
existin callers to these functions in order to provide cd->endian or
cd->insn_endian, whatever appropriate.  Callers like extract_1 and
insert_1 pass cd->endian (since they are reading/writing operand
values) while callers reading/writing the base instruction pass
cd->insn_endian instead.

A few little adjustments have been needed in some existing CGEN based
ports:
* The BPF assembler uses cgen_put_insn_value.  It has been adapted to
  pass the new endian argument.
* The mep port has code in mep.opc that uses cgen_{get,put}_insn_value.
  It has been adapted to pass the new endianargument.  Ditto for a
  call in the assembler.

Tested with --enable-targets=all.
Regested in all supported targets.
No regressions.

include/ChangeLog:

2020-06-04  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* opcode/cgen.h: Get an `endian' argument in both
	cgen_get_insn_value and cgen_put_insn_value.

opcodes/ChangeLog:

2020-06-04  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* cgen-opc.c (cgen_get_insn_value): Get an `endian' argument.
	(cgen_put_insn_value): Likewise.
	(cgen_lookup_insn): Pass endianness to cgen_{get,put}_insn_value.
	* cgen-dis.in (print_insn): Likewise.
	* cgen-ibld.in (insert_1): Likewise.
	(insert_1): Likewise.
	(insert_insn_normal): Likewise.
	(extract_1): Likewise.
	* bpf-dis.c: Regenerate.
	* bpf-ibld.c: Likewise.
	* bpf-ibld.c: Likewise.
	* cgen-dis.in: Likewise.
	* cgen-ibld.in: Likewise.
	* cgen-opc.c: Likewise.
	* epiphany-dis.c: Likewise.
	* epiphany-ibld.c: Likewise.
	* fr30-dis.c: Likewise.
	* fr30-ibld.c: Likewise.
	* frv-dis.c: Likewise.
	* frv-ibld.c: Likewise.
	* ip2k-dis.c: Likewise.
	* ip2k-ibld.c: Likewise.
	* iq2000-dis.c: Likewise.
	* iq2000-ibld.c: Likewise.
	* lm32-dis.c: Likewise.
	* lm32-ibld.c: Likewise.
	* m32c-dis.c: Likewise.
	* m32c-ibld.c: Likewise.
	* m32r-dis.c: Likewise.
	* m32r-ibld.c: Likewise.
	* mep-dis.c: Likewise.
	* mep-ibld.c: Likewise.
	* mt-dis.c: Likewise.
	* mt-ibld.c: Likewise.
	* or1k-dis.c: Likewise.
	* or1k-ibld.c: Likewise.
	* xc16x-dis.c: Likewise.
	* xc16x-ibld.c: Likewise.
	* xstormy16-dis.c: Likewise.
	* xstormy16-ibld.c: Likewise.

gas/ChangeLog:

2020-06-04  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* cgen.c (gas_cgen_finish_insn): Pass the endianness to
	cgen_put_insn_value.
	(gas_cgen_md_apply_fix): Likewise.
	(gas_cgen_md_apply_fix): Likewise.
	* config/tc-bpf.c (md_apply_fix): Pass data endianness to
	cgen_put_insn_value.
	* config/tc-mep.c (mep_check_ivc2_scheduling): Pass endianness to
	cgen_put_insn_value.

cpu/ChangeLog:

2020-06-02  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* mep.opc (print_slot_insn): Pass the insn endianness to
	cgen_get_insn_value.
2020-06-04 16:17:42 +02:00
Jose E. Marchesi
b3db6d07be opcodes: support insn endianness in cgen_cpu_open
This patch adds support for a new CGEN_OPEN_INSN_ENDIAN argument
for @arch@_cgen_cpu_open.  This is useful for architectures in
which the endianness of the instruction words is not the same
than the endianness used for data.

An accompanying patch has been sent to the CGEN mailing list that
adds support for this argument on the CGEN side [1].  Its been
already pre-approved [2], and will be applied simultaneously with
this binutils series.

[1] https://sourceware.org/pipermail/cgen/2020q2/002733.html
[2] https://sourceware.org/pipermail/cgen/2020q2/002737.html

include/ChangeLog:

2020-06-04  Jose E. Marchesi  <jemarch@gnu.org>

	* opcode/cgen.h (enum cgen_cpu_open_arg): New value
	CGEN_CPU_OPEN_INSN_ENDIAN.

opcodes/ChangeLog:

2020-06-04  Jose E. Marchesi  <jemarch@gnu.org>

	* cgen-dis.in (cpu_desc_list): New field `insn_endian'.
	(print_insn_): Handle instruction endian.
	* bpf-dis.c: Regenerate.
	* bpf-desc.c: Regenerate.
	* epiphany-dis.c: Likewise.
	* epiphany-desc.c: Likewise.
	* fr30-dis.c: Likewise.
	* fr30-desc.c: Likewise.
	* frv-dis.c: Likewise.
	* frv-desc.c: Likewise.
	* ip2k-dis.c: Likewise.
	* ip2k-desc.c: Likewise.
	* iq2000-dis.c: Likewise.
	* iq2000-desc.c: Likewise.
	* lm32-dis.c: Likewise.
	* lm32-desc.c: Likewise.
	* m32c-dis.c: Likewise.
	* m32c-desc.c: Likewise.
	* m32r-dis.c: Likewise.
	* m32r-desc.c: Likewise.
	* mep-dis.c: Likewise.
	* mep-desc.c: Likewise.
	* mt-dis.c: Likewise.
	* mt-desc.c: Likewise.
	* or1k-dis.c: Likewise.
	* or1k-desc.c: Likewise.
	* xc16x-dis.c: Likewise.
	* xc16x-desc.c: Likewise.
	* xstormy16-dis.c: Likewise.
	* xstormy16-desc.c: Likewise.

binutils/ChangeLog:

2020-06-04  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* objdump.c (disassemble_data): Set disasm_info.endian_code to
        disasm_info.endian after the latter is initialized to the
        endianness reported by BFD.
2020-06-04 16:17:42 +02:00
Nelson Chu
44730156af RISC-V: Fix the error when building RISC-V linux native gdbserver.
The original report is as follow,
https://sourceware.org/pipermail/binutils/2020-June/111383.html

Inlcude the bfd.h in the include/opcode/riscv.h may cause gdbserver fail
to build.  I just want to use the `bfd_boolean` in the opcodes/riscv-opc.c,
but I didn't realize this cause the build failed.  Fortunately, I can also
use the `int` as the function return types just like others in the
opcodes/riscv-opc.c.

	include/
	* opcode/riscv.h: Remove #include "bfd.h".  And change the return
	types of riscv_get_isa_spec_class and riscv_get_priv_spec_class
	from bfd_boolean to int.

	opcodes/
	* riscv-opc.c (riscv_get_isa_spec_class): Change bfd_boolean to int.
	(riscv_get_priv_spec_class): Likewise.
2020-06-03 09:20:59 +08:00
Alan Modra
8eff95bcb6 PR26044, Some targets can't be compiled with GCC 10 (tilepro)
Since this value is used in fields of type tilepro_pipeline (as
NO_PIPELINE, see tc-tilepro.c) it is appropriate to put it in
the tilepro_pipelen enum.  This avoids a warning about converting from
one enum type to another.

	PR 26044
	* opcode/tilepro.h (TILEPRO_NUM_PIPELINE_ENCODINGS): Move to
	tilepro_pipeline enum.
2020-05-28 21:11:51 +09:30
H.J. Lu
a6dbf402de ld: Add --warn-textrel and obsolete --warn-shared-textrel
--warn-shared-textrel and -z text apply to both shared object and PIE.
Add --warn-textrel and obsolete --warn-shared-textrel.  Consolidate
--warn-textrel and -z text/notext/textoff implementation.

bfd/

	PR ld/22909
	* elflink.c (bfd_elf_final_link): Use bfd_link_textrel_check.
	Check bfd_link_dll when issue a DT_TEXTREL warning.
	* elfxx-x86.c (maybe_set_textrel): Likewise.
	(_bfd_x86_elf_size_dynamic_sections): Likewise.

include/

	PR ld/22909
	* bfdlink.h (textrel_check_method): New enum.
	(bfd_link_textrel_check): New.
	(bfd_link_info): Replace warn_shared_textrel and error_textrel
	with textrel_check.

ld/

	PR ld/22909
	* NEWS: Mention --warn-textrel.
	* ld.texi: Update -z text/notext/textoff.  Add --warn-textrel.
	Remove --warn-shared-textrel.
	* ldlex.h (option_values): Rename OPTION_WARN_SHARED_TEXTREL to
	OPTION_WARN_TEXTREL.
	* lexsup.c (ld_options): Add --warn-textrel.  Obsolete
	--warn-shared-textrel.
	(parse_args): Updated.
	(elf_shlib_list_options): Check link_info.textrel_check.
	* emultempl/elf.em: Updated.
	* testsuite/ld-elf/pr19539.d: Replace -z notext with
	--warn-textrel.  Expect a warning.
	* testsuite/ld-i386/warn1.d: Update expected warning.
2020-05-27 04:54:10 -07:00
H.J. Lu
68dc60e6a7 ELF: Updated comments for ET_EXEC and ET_DYN
include/elf/common.h has

 #define ET_EXEC         2       /* Executable file */
 #define ET_DYN          3       /* Shared object file */

These predate PIE:

https://groups.google.com/forum/#!topic/generic-abi/mBKlSNldFW4

Updated comments to

 #define ET_EXEC         2       /* Position-dependent executable file */
 #define ET_DYN          3       /* Position-independent executable or
                                    shared object file */

	* elf/common.h: Update comments for ET_EXEC and ET_DYN.
2020-05-25 11:26:48 -07:00
Nelson Chu
8f595e9b4f [PATCH v2 0/9] RISC-V: Support version controling for ISA standard extensions and CSR
1. Remove the -mriscv-isa-version and --with-riscv-isa-version options.
We can still use -march to choose the version for each extensions, so there is
no need to add these.

2. Change the arguments of options from [1p9|1p9p1|...] to [1.9|1.9.1|...].
Unlike the architecture string has specified by spec, ther is no need to do
the same thing for options.

3. Spilt the patches to reduce the burdens of review.

[PATCH 3/7] RISC-V: Support new GAS options and configure options to set ISA versions
to
[PATCH v2 3/9] RISC-V: Support GAS option -misa-spec to set ISA versions
[PATCH v2 4/9] RISC-V: Support configure options to set ISA versions by default.

[PATCH 4/7] RISC-V: Support version checking for CSR according to privilege version.
to
[PATCH v2 5/9] RISC-V: Support version checking for CSR according to privilege spec version.
[PATCH v2 6/9] RISC-V: Support configure option to choose the privilege spec version.

4. Use enum class rather than string to compare the choosen ISA spec in opcodes/riscv-opc.c.
The behavior is same as comparing the choosen privilege spec.

include	* opcode/riscv.h: Include "bfd.h" to support bfd_boolean.
	(enum riscv_isa_spec_class): New enum class.  All supported ISA spec
	belong to one of the class
	(struct riscv_ext_version): New structure holds version information
	for the specific ISA.
	* opcode/riscv-opc.h (DECLARE_CSR): There are two version information,
	define_version and abort_version.  The define_version means which
	privilege spec is started to define the CSR, and the abort_version
	means which privilege spec is started to abort the CSR.  If the CSR is
	valid for the newest spec, then the abort_version should be
	PRIV_SPEC_CLASS_DRAFT.
	(DECLARE_CSR_ALIAS): Same as DECLARE_CSR, but only for the obselete CSR.
	* opcode/riscv.h (enum riscv_priv_spec_class): New enum class.  Define
	the current supported privilege spec versions.
	(struct riscv_csr_extra): Add new fields to store more information
	about the CSR.  We use these information to find the suitable CSR
	address when user choosing a specific privilege spec.

binutils * dwarf.c: Updated since DECLARE_CSR is changed.

opcodes	* riscv-opc.c (riscv_ext_version_table): The table used to store
	all information about the supported spec and the corresponding ISA
	versions.  Currently, only Zicsr is supported to verify the
	correctness of Z sub extension settings.  Others will be supported
	in the future patches.
	(struct isa_spec_t, isa_specs): List for all supported ISA spec
	classes and the corresponding strings.
	(riscv_get_isa_spec_class): New function.  Get the corresponding ISA
	spec class by giving a ISA spec string.
	* riscv-opc.c (struct priv_spec_t): New structure.
	(struct priv_spec_t priv_specs): List for all supported privilege spec
	classes and the corresponding strings.
	(riscv_get_priv_spec_class): New function.  Get the corresponding
	privilege spec class by giving a spec string.
	(riscv_get_priv_spec_name): New function.  Get the corresponding
	privilege spec string by giving a CSR version class.
	* riscv-dis.c: Updated since DECLARE_CSR is changed.
	* riscv-dis.c: Add new disassembler option -Mpriv-spec to dump the CSR
	according to the chosen version.  Build a hash table riscv_csr_hash to
	store the valid CSR for the chosen pirv verison.  Dump the direct
	CSR address rather than it's name if it is invalid.
	(parse_riscv_dis_option_without_args): New function.  Parse the options
	without arguments.
	(parse_riscv_dis_option): Call parse_riscv_dis_option_without_args to
	parse the options without arguments first, and then handle the options
	with arguments.  Add the new option -Mpriv-spec, which has argument.
	* riscv-dis.c (print_riscv_disassembler_options): Add description
	about the new OBJDUMP option.

ld	* testsuite/ld-riscv-elf/attr-merge-arch-01.d: Updated
        priv attributes according to the -mpriv-spec option.
	* testsuite/ld-riscv-elf/attr-merge-arch-02.d: Likewise.
	* testsuite/ld-riscv-elf/attr-merge-arch-03.d: Likewise.
	* testsuite/ld-riscv-elf/attr-merge-priv-spec-a.s: Likewise.
	* testsuite/ld-riscv-elf/attr-merge-priv-spec-b.s: Likewise.
	* testsuite/ld-riscv-elf/attr-merge-priv-spec.d: Likewise.
	* testsuite/ld-riscv-elf/attr-merge-stack-align.d: Likewise.
	* testsuite/ld-riscv-elf/attr-merge-strict-align-01.d: Likewise.
	* testsuite/ld-riscv-elf/attr-merge-strict-align-02.d: Likewise.
	* testsuite/ld-riscv-elf/attr-merge-strict-align-03.d: Likewise.
	* testsuite/ld-riscv-elf/attr-merge-strict-align-04.d: Likewise.
	* testsuite/ld-riscv-elf/attr-merge-strict-align-05.d: Likewise.

bfd 	* elfxx-riscv.h (riscv_parse_subset_t): Add new callback function
	get_default_version.  It is used to find the default version for
	the specific extension.
	* elfxx-riscv.c (riscv_parsing_subset_version): Remove the parameters
	default_major_version and default_minor_version.  Add new bfd_boolean
	parameter *use_default_version.  Set it to TRUE if we need to call
	the callback rps->get_default_version to find the default version.
	(riscv_parse_std_ext): Call rps->get_default_version if we fail to find
	the default version in riscv_parsing_subset_version, and then call
	riscv_add_subset to add the subset into subset list.
	(riscv_parse_prefixed_ext): Likewise.
	(riscv_std_z_ext_strtab): Support Zicsr extensions.
	* elfnn-riscv.c (riscv_merge_std_ext): Use strcasecmp to compare the
	strings rather than characters.
	riscv_merge_arch_attr_info): The callback function get_default_version
	is only needed for assembler, so set it to NULL int the linker.
	* elfxx-riscv.c (riscv_estimate_digit): Remove the static.
	* elfxx-riscv.h: Updated.

gas	* testsuite/gas/riscv/priv-reg-fail-read-only-01.s: Updated.
	* config/tc-riscv.c (default_arch_with_ext, default_isa_spec):
	Static variables which are used to set the ISA extensions. You can
	use -march (or ELF build attributes) and -misa-spec to set them,
	respectively.
	(ext_version_hash): The hash table used to handle the extensions
	with versions.
	(init_ext_version_hash): Initialize the ext_version_hash according
	to riscv_ext_version_table.
	(riscv_get_default_ext_version): The callback function of
	riscv_parse_subset_t.  According to the choosed ISA spec,
	get the default version for the specific extension.
	(riscv_set_arch): Set the callback function.
	(enum options, struct option md_longopts): Add new option -misa-spec.
	(md_parse_option): Do not call riscv_set_arch for -march.  We will
	call it later in riscv_after_parse_args.  Call riscv_get_isa_spec_class
	to set default_isa_spec class.
	(riscv_after_parse_args): Call init_ext_version_hash to initialize the
	ext_version_hash, and then call riscv_set_arch to set the architecture
	with versions according to default_arch_with_ext.
	* testsuite/gas/riscv/attribute-02.d: Set 0p0 as default version for
	x extensions.
	* testsuite/gas/riscv/attribute-03.d: Likewise.
	* testsuite/gas/riscv/attribute-09.d: New testcase.  For i-ext, we
	already set it's version to 2p1 by march, so no need to use the default
	2p2 version.  For m-ext, we do not set the version by -march and ELF arch
	attribute, so set the default 2p0 to it.  For zicsr, it is not defined in
	ISA spec 2p2, so set 0p0 to it.
	* testsuite/gas/riscv/attribute-10.d: New testcase.  The version of
	zicsr is 2p0 according to ISA spec 20191213.
	* config/tc-riscv.c (DEFAULT_RISCV_ARCH_WITH_EXT)
	(DEFAULT_RISCV_ISA_SPEC): Default configure option settings.
	You can set them by configure options --with-arch and
	--with-isa-spec, respectively.
	(riscv_set_default_isa_spec): New function used to set the
	default ISA spec.
	(md_parse_option): Call riscv_set_default_isa_spec rather than
	call riscv_get_isa_spec_class directly.
	(riscv_after_parse_args): If the -isa-spec is not set, then we
	set the default ISA spec according to DEFAULT_RISCV_ISA_SPEC by
	calling riscv_set_default_isa_spec.
	* testsuite/gas/riscv/attribute-01.d: Add -misa-spec=2.2, since
	the --with-isa-spec may be set to different ISA spec.
	* testsuite/gas/riscv/attribute-02.d: Likewise.
	* testsuite/gas/riscv/attribute-03.d: Likewise.
	* testsuite/gas/riscv/attribute-04.d: Likewise.
	* testsuite/gas/riscv/attribute-05.d: Likewise.
	* testsuite/gas/riscv/attribute-06.d: Likewise.
	* testsuite/gas/riscv/attribute-07.d: Likewise.
	* configure.ac: Add configure options, --with-arch and
	--with-isa-spec.
	* configure: Regenerated.
	* config.in: Regenerated.
	* config/tc-riscv.c (default_priv_spec): Static variable which is
	used to check if the CSR is valid for the chosen privilege spec. You
	can use -mpriv-spec to set it.
	(enum reg_class): We now get the CSR address from csr_extra_hash rather
	than reg_names_hash.  Therefore, move RCLASS_CSR behind RCLASS_MAX.
	(riscv_init_csr_hashes): Only need to initialize one hash table
	csr_extra_hash.
	(riscv_csr_class_check): Change the return type to void.  Don't check
	the ISA dependency if -mcsr-check isn't set.
	(riscv_csr_version_check): New function.  Check and find the CSR address
	from csr_extra_hash, according to default_priv_spec.  Report warning
	for the invalid CSR if -mcsr-check is set.
	(reg_csr_lookup_internal): Updated.
	(reg_lookup_internal): Likewise.
	(md_begin): Updated since DECLARE_CSR and DECLARE_CSR_ALIAS are changed.
	(enum options, struct option md_longopts): Add new GAS option -mpriv-spec.
	(md_parse_option): Call riscv_set_default_priv_version to set
	default_priv_spec.
	(riscv_after_parse_args): If -mpriv-spec isn't set, then set the default
	privilege spec to the newest one.
	(enum riscv_csr_class, struct riscv_csr_extra): Move them to
	include/opcode/riscv.h.
	* testsuite/gas/riscv/priv-reg-fail-fext.d: This test case just want
	to check the ISA dependency for CSR, so fix the spec version by adding
	-mpriv-spec=1.11.
	* testsuite/gas/riscv/priv-reg-fail-fext.l: Likewise.  There are some
	version warnings for the test case.
	* gas/testsuite/gas/riscv/priv-reg-fail-read-only-01.d: Likewise.
	* gas/testsuite/gas/riscv/priv-reg-fail-read-only-01.l: Likewise.
	* gas/testsuite/gas/riscv/priv-reg-fail-read-only-02.d: Likewise.
	* gas/testsuite/gas/riscv/priv-reg-fail-rv32-only.d: Likewise.
	* gas/testsuite/gas/riscv/priv-reg-fail-rv32-only.l: Likewise.
	* gas/testsuite/gas/riscv/priv-reg-fail-version-1p9.d: New test case.
	Check whether the CSR is valid when privilege version 1.9 is choosed.
	* gas/testsuite/gas/riscv/priv-reg-fail-version-1p9.l: Likewise.
	* gas/testsuite/gas/riscv/priv-reg-fail-version-1p9p1.d: New test case.
	Check whether the CSR is valid when privilege version 1.9.1 is choosed.
	* gas/testsuite/gas/riscv/priv-reg-fail-version-1p9p1.l: Likewise.
	* gas/testsuite/gas/riscv/priv-reg-fail-version-1p10.d: New test case.
	Check whether the CSR is valid when privilege version 1.10 is choosed.
	* gas/testsuite/gas/riscv/priv-reg-fail-version-1p10.l: Likewise.
	* gas/testsuite/gas/riscv/priv-reg-fail-version-1p11.d: New test case.
	Check whether the CSR is valid when privilege version 1.11 is choosed.
	* gas/testsuite/gas/riscv/priv-reg-fail-version-1p11.l: Likewise.
	* config/tc-riscv.c (DEFAULT_RISCV_ISA_SPEC): Default configure option
	setting.  You can set it by configure option --with-priv-spec.
	(riscv_set_default_priv_spec): New function used to set the default
	privilege spec.
	(md_parse_option): Call riscv_set_default_priv_spec rather than
	call riscv_get_priv_spec_class directly.
	(riscv_after_parse_args): If -mpriv-spec isn't set, then we set the
	default privilege spec according to DEFAULT_RISCV_PRIV_SPEC by
	calling riscv_set_default_priv_spec.
	* testsuite/gas/riscv/csr-dw-regnums.d: Add -mpriv-spec=1.11, since
	the --with-priv-spec may be set to different privilege spec.
	* testsuite/gas/riscv/priv-reg.d: Likewise.
	* configure.ac: Add configure option --with-priv-spec.
	* configure: Regenerated.
	* config.in: Regenerated.
	* config/tc-riscv.c (explicit_attr): Rename explicit_arch_attr to
	explicit_attr.  Set it to TRUE if any ELF attribute is found.
	(riscv_set_default_priv_spec): Try to set the default_priv_spec if
	the priv attributes are set.
	(md_assemble): Set the default_priv_spec according to the priv
	attributes when we start to assemble instruction.
	(riscv_write_out_attrs): Rename riscv_write_out_arch_attr to
	riscv_write_out_attrs.  Update the arch and priv attributes.  If we
	don't set the corresponding ELF attributes, then try to output the
	default ones.
	(riscv_set_public_attributes): If any ELF attribute or -march-attr
	options is set (explicit_attr is TRUE), then call riscv_write_out_attrs
	to update the arch and priv attributes.
	(s_riscv_attribute): Make sure all arch and priv attributes are set
	before any instruction.
	* testsuite/gas/riscv/attribute-01.d: Update the priv attributes if any
	ELF attribute or -march-attr is set.  If the priv attributes are not
	set, then try to update them by the default setting (-mpriv-spec or
	--with-priv-spec).
	* testsuite/gas/riscv/attribute-02.d: Likewise.
	* testsuite/gas/riscv/attribute-03.d: Likewise.
	* testsuite/gas/riscv/attribute-04.d: Likewise.
	* testsuite/gas/riscv/attribute-06.d: Likewise.
	* testsuite/gas/riscv/attribute-07.d: Likewise.
	* testsuite/gas/riscv/attribute-08.d: Likewise.
	* testsuite/gas/riscv/attribute-09.d: Likewise.
	* testsuite/gas/riscv/attribute-10.d: Likewise.
	* testsuite/gas/riscv/attribute-unknown.d: Likewise.
	* testsuite/gas/riscv/attribute-05.d: Likewise.  Also, the priv spec
	set by priv attributes must be supported.
	* testsuite/gas/riscv/attribute-05.s: Likewise.
	* testsuite/gas/riscv/priv-reg-fail-version-1p9.d: Likewise.  Updated
	priv attributes according to the -mpriv-spec option.
	* testsuite/gas/riscv/priv-reg-fail-version-1p9p1.d: Likewise.
	* testsuite/gas/riscv/priv-reg-fail-version-1p10.d: Likewise.
	* testsuite/gas/riscv/priv-reg-fail-version-1p11.d: Likewise.
	* testsuite/gas/riscv/priv-reg.d: Removed.
	* testsuite/gas/riscv/priv-reg-version-1p9.d: New test case.  Dump the
	CSR according to the priv spec 1.9.
	* testsuite/gas/riscv/priv-reg-version-1p9p1.d: New test case.  Dump the
	CSR according to the priv spec 1.9.1.
	* testsuite/gas/riscv/priv-reg-version-1p10.d: New test case.  Dump the
	CSR according to the priv spec 1.10.
	* testsuite/gas/riscv/priv-reg-version-1p11.d: New test case.  Dump the
	CSR according to the priv spec 1.11.
	* config/tc-riscv.c (md_show_usage): Add descriptions about
	the new GAS options.
	* doc/c-riscv.texi: Likewise.
2020-05-20 17:22:48 +01:00
Alexander Fedotov
164446e04c Fix the ARM assembler to generate a Realtime profile for armv8-r.
PR 25992
gas	* config/tc-arm.c : Add arm_ext_v8r feature.
	(it_fsm_post_encode): Check arm_ext_v8r feature.
	(get_aeabi_cpu_arch_from_fset): Check arm_ext_v8r feature.

include	* opcode/arm.h (ARM_EXT2_V8R): Define. Modified ARM_AEXT2_V8R.
2020-05-19 12:45:42 +01:00
Alan Modra
aa3c112fab Power10 Reduced precision outer product operations
include/
	* opcode/ppc.h (PPC_OPERAND_ACC): Define.  Renumber following
	PPC_OPERAND defines.
opcodes/
	* ppc-opc.c (insert_xa6a, extract_xa6a, insert_xb6a, extract_xb6a):
	New functions.
	(powerpc_operands): Define ACC, PMSK8, PMSK4, PMSK2, XMSK, YMSK,
	YMSK2, XA6a, XA6ap, XB6a entries.
	(PMMIRR, P_X_MASK, P_XX1_MASK, P_GER_MASK): Define
	(P_GER2_MASK, P_GER4_MASK, P_GER8_MASK, P_GER64_MASK): Define.
	(PPCVSX4): Define.
	(powerpc_opcodes): Add xxmfacc, xxmtacc, xxsetaccz,
	xvi8ger4pp, xvi8ger4, xvf16ger2pp, xvf16ger2, xvf32gerpp, xvf32ger,
	xvi4ger8pp, xvi4ger8, xvi16ger2spp, xvi16ger2s, xvbf16ger2pp,
	xvbf16ger2, xvf64gerpp, xvf64ger, xvi16ger2, xvf16ger2np,
	xvf32gernp, xvi8ger4spp, xvi16ger2pp, xvbf16ger2np, xvf64gernp,
	xvf16ger2pn, xvf32gerpn, xvbf16ger2pn, xvf64gerpn, xvf16ger2nn,
	xvf32gernn, xvbf16ger2nn, xvf64gernn, xvcvbf16sp, xvcvspbf16.
	(prefix_opcodes): Add pmxvi8ger4pp, pmxvi8ger4, pmxvf16ger2pp,
	pmxvf16ger2, pmxvf32gerpp, pmxvf32ger, pmxvi4ger8pp, pmxvi4ger8,
	pmxvi16ger2spp, pmxvi16ger2s, pmxvbf16ger2pp, pmxvbf16ger2,
	pmxvf64gerpp, pmxvf64ger, pmxvi16ger2, pmxvf16ger2np, pmxvf32gernp,
	pmxvi8ger4spp, pmxvi16ger2pp, pmxvbf16ger2np, pmxvf64gernp,
	pmxvf16ger2pn, pmxvf32gerpn, pmxvbf16ger2pn, pmxvf64gerpn,
	pmxvf16ger2nn, pmxvf32gernn, pmxvbf16ger2nn, pmxvf64gernn.
gas/
	* config/tc-ppc.c (pre_defined_registers): Add accumulators.
	(md_assemble): Check acc specified in correct operand.
	* testsuite/gas/ppc/outerprod.d,
	* testsuite/gas/ppc/outerprod.s,
	* testsuite/gas/ppc/vsx4.d,
	* testsuite/gas/ppc/vsx4.s: New tests.
	* testsuite/gas/ppc/ppc.exp: Run them.
2020-05-11 21:08:37 +09:30
Alan Modra
7c1f422735 PowerPC Rename powerxx to power10
Now that ISA3.1 is out we can finish with the powerxx silliness.

bfd/
	* elf64-ppc.c: Rename powerxx to power10 throughout.
gas/
	* config/tc-ppc.c (md_assemble): Update for PPC_OPCODE_POWER10
	renaming.
	* testsuite/gas/ppc/prefix-align.d: Use -mpower10/-Mpower10 in
	place of -mfuture/-Mfuture.
	* testsuite/gas/ppc/prefix-pcrel.d: Likewise.
	* testsuite/gas/ppc/prefix-reloc.d: Likewise.
gold/
	* powerpc.cc: Rename powerxx to power10 throughout.
include/
	* elf/ppc64.h: Update comment.
	* opcode/ppc.h (PPC_OPCODE_POWER10): Rename from PPC_OPCODE_POWERXX.
ld/
	* testsuite/ld-powerpc/callstub-1.d: Use -mpower10/-Mpower10 in
	place of -mfuture/-Mfuture.
	* testsuite/ld-powerpc/notoc2.d: Likewise.
	* testsuite/ld-powerpc/powerpc.exp: Likewise.
	* testsuite/ld-powerpc/tlsgd.d: Likewise.
	* testsuite/ld-powerpc/tlsie.d: Likewise.
	* testsuite/ld-powerpc/tlsld.d: Likewise.
opcodes/
	* ppc-dis.c (ppc_opts): Add "power10" entry.
	(print_insn_powerpc): Update for PPC_OPCODE_POWER10 renaming.
	* ppc-opc.c (POWER10): Rename from POWERXX.  Update all uses.
2020-05-11 21:08:36 +09:30
Alex Coplan
09c1e68a16 AArch64: add GAS support for UDF instruction
binutils * testsuite/binutils-all/aarch64/in-order-all.d: Update to use new
          disassembly.
        * testsuite/binutils-all/aarch64/out-of-order-all.d: Likewise.

ld/     * testsuite/ld-aarch64/erratum843419_tls_ie.d: Use udf in disassembly.
        * testsuite/ld-aarch64/farcall-b-section.d: Likewise.
        * testsuite/ld-aarch64/farcall-back.d: Likewise.
        * testsuite/ld-aarch64/farcall-bl-section.d: Likewise.

gas/   * config/tc-aarch64.c (fix_insn): Implement for AARCH64_OPND_UNDEFINED.
          (parse_operands): Implement for AARCH64_OPND_UNDEFINED.
        * testsuite/gas/aarch64/udf.s: New.
        * testsuite/gas/aarch64/udf.d: New.
        * testsuite/gas/aarch64/udf-invalid.s: New.
        * testsuite/gas/aarch64/udf-invalid.l: New.
        * testsuite/gas/aarch64/udf-invalid.d: New.

include * opcode/aarch64.h (enum aarch64_opnd): Add AARCH64_OPND_UNDEFINED.

opcodes * aarch64-opc.h (enum aarch64_field_kind): Add FLD_imm16_2.
        * aarch64-opc.c (fields): Add entry for FLD_imm16_2.
          (operand_general_constraint_met_p): validate AARCH64_OPND_UNDEFINED.
        * aarch64-tbl.h (aarch64_opcode_table): Add udf instruction, entry for
          FLD_imm16_2.
        * aarch64-asm-2.c: Regenerated.
        * aarch64-dis-2.c: Regenerated.
        * aarch64-opc-2.c: Regenerated.
2020-04-30 15:47:30 +01:00
Anton Kolesov
2745674244 arc: Add support for ARC HS extra registers in core files
When a coredump is generated, there are a few registers in
ARC HS that are put under a special section, namely ".reg-v2".
It is for backward compatibility reasons with older tools that
we have decided not to extend the generic ".reg" section.

This patch makes it possible to display the information better
regarding that section.  Compare the output of "readelf" without
and with these changes:

$ readelf -n core     # without the patch
  ...
  LINUX    0x0000000c  Unknown note type: (0x00000600)
   description data: 78 08 00 00 2f 6c 64 2d 75 43 6c 69

$ readelf -n core     # with the patch
  ...
  LINUX    0x0000000c  NT_ARC_V2 (ARC HS accumulator/extra registers)
   description data: 78 08 00 00 2f 6c 64 2d 75 43 6c 69

In another commit (soon to be submitted), GDB will makes use of these
changes to parse the extra section and its registers.

bfd/ChangeLog
2020-03-26  Anton Kolesov  <anton.kolesov@synopsys.com>

	* elf-bfd.h (elfcore_write_arc_v2): Add prototype.
	* elf.c (elfcore_grok_arc_v2): New function.
	(elfcore_grok_note): Call the new function to handle the corresponding
	note.
	(elfcore_write_arc_v2): New function.
	(elfcore_write_register_note): Call the new function to handle the
	corresponding pseudo-sections.

binutils/ChangeLog
2020-03-26  Anton Kolesov  <anton.kolesov@synopsys.com>

	* readelf.c (get_note_type): Handle NT_ARC_V2.

include/elf/ChangeLog
2020-03-26  Anton Kolesov  <anton.kolesov@synopsys.com>

	* common.h (NT_ARC_V2): New macro definitions.
2020-04-23 11:09:09 +03:00
Max Filippov
30ce8e47fa xtensa: fix PR ld/25861
Introduce new relaxations XTENSA_PDIFF{8,16,32} for positive differences
(subtracted symbol precedes diminished symbol) and XTENSA_NDIFF{8,16,32}
for negative differences (subtracted symbol follows diminished symbol).
Don't generate XTENSA_DIFF relocations in the assembler, generate
XTENSA_PDIFF or XTENSA_NDIFF based on relative symbol position.

Handle XTENSA_DIFF in BFD for compatibility with old object files.
Handle XTENSA_PDIFF and XTENSA_NDIFF in BFD, treating difference value
as unsigned.

2020-04-22  Max Filippov  <jcmvbkbc@gmail.com>
bfd/
	* bfd-in2.h: Regenerated.
	* elf32-xtensa.c (elf_howto_table): New entries for
	R_XTENSA_PDIFF{8,16,32} and R_XTENSA_NDIFF{8,16,32}.
	(elf_xtensa_reloc_type_lookup, elf_xtensa_do_reloc)
	(relax_section): Add cases for R_XTENSA_PDIFF{8,16,32} and
	R_XTENSA_NDIFF{8,16,32}.
	* libbfd.h (bfd_reloc_code_real_names): Add names for
	BFD_RELOC_XTENSA_PDIFF{8,16,32} and
	BFD_RELOC_XTENSA_NDIFF{8,16,32}.
	* reloc.c: Add documentation for BFD_RELOC_XTENSA_PDIFF{8,16,32}
	and BFD_RELOC_XTENSA_NDIFF{8,16,32}.

binutils/
	* readelf.c (is_none_reloc): Recognize
	BFD_RELOC_XTENSA_PDIFF{8,16,32} and
	BFD_RELOC_XTENSA_NDIFF{8,16,32}.

gas/
	* config/tc-xtensa.c (md_apply_fix): Replace
	BFD_RELOC_XTENSA_DIFF{8,16,32} generation with
	BFD_RELOC_XTENSA_PDIFF{8,16,32} and
	BFD_RELOC_XTENSA_NDIFF{8,16,32} generation.
	* testsuite/gas/xtensa/loc.d: Replace BFD_RELOC_XTENSA_DIFF16
	with BFD_RELOC_XTENSA_PDIFF16 in the expected output.

include/
	* elf/xtensa.h (elf_xtensa_reloc_type): New entries for
	R_XTENSA_PDIFF{8,16,32} and R_XTENSA_NDIFF{8,16,32}.

ld/
	* testsuite/ld-xtensa/relax-loc.d: New test definition.
	* testsuite/ld-xtensa/relax-loc.s: New test source.
	* testsuite/ld-xtensa/xtensa.exp (relax-loc): New test.
2020-04-22 18:46:45 -07:00
Alan Modra
fad3d2c1b2 Remove SH-5 remnants
git commit 211dc24b87 removed most sh5 and sh64 SuperH support, after
they were obsoleted by git commit 2b213129c5.  This patch removes a
few remaining pieces that should have gone with 211dc24b87.

include/
	* elf/sh.h (STO_SH5_ISA32, SHF_SH5_ISA32, SHF_SH5_ISA32_MIXED),
	(SHT_SH5_CR_SORTED, STT_DATALABEL): Delete.
bfd/
	* elf32-sh.c (sh_elf_relocate_section): Remove STO_SH5_ISA32
	processing.
2020-04-21 11:35:43 +09:30
Fangrui Song
95a5156812 Unify the behaviour of ld.bfd and ld.gold with respect to warning about unresolved symbol references. (PR 24613)
PR binutils/24613
include	* bfdlink.h (enum report_method): Delete RM_GENERATE_WARNING and
	RM_GENERATE_ERROR. Add RM_DIAGNOSE.
	(struct bfd_link_info): Add warn_unresolved_syms.

ld	* lexsup.c (parse_args): Change RM_GENERATE_WARNING and
	RM_GENERATE_ERROR to RM_DIAGNOSE.
	* emultempl/aix.em (ld_${EMULATION_NAME}_emulation): Change
	RM_GENERATE_ERROR to RM_DIAGNOSE.
	* emultempl/elf.em (ld_${EMULATION_NAME}_emulation): Likewise.

bfd	* coff-rs6000.c (xcoff_ppc_relocate_section): Change RM_GENERATE_ERROR
	to RM_DIAGNOSE plus a check of warn_unresolved_syms.
	* coff64-rs6000.c (xcoff_ppc_relocate_section): Likewise.
	* elf-bfd.h (_bfd_elf_large_com_section): Likewise.
	* elf32-m32r.c (m32r_elf_relocate_section): Likewise.
	* elf32-score.c (s3_bfd_score_elf_relocate_section): Likewise.
	* elf32-score7.c (s7_bfd_score_elf_relocate_section): Likewise.
	* elf32-sh.c (sh_elf_relocate_section): Likewise.
	* elf32-spu.c (spu_elf_relocate_section): Likewise.
	* elf64-hppa.c (elf64_hppa_relocate_section): Likewise.
	* elflink.c (elf_link_output_extsym): Likewise.
	* elfxx-mips.c (mips_elf_calculate_relocation): Likewise.
2020-04-15 14:25:08 +01:00
Stephen Casner
fa1477dc34 Fixes for the magic number used in PDP11 AOUT binaries.
PR ld/25677
include	* aout/aout64.h (N_DATADDR): Add IMAGIC case.

bfd	* pdp11.c: Add implementation of --imagic option.
	(adjust_o_magic): Fix objcopy --extract-symbol test.
	* libaout.h (enum aout_magic): Add i_magic.

ld	* emulparams/pdp11.sh (SCRIPT_NAME): Change to pdp11.
	(EXTRA_EM_FILE): New, add emulation file pdp11.
	* scripttempl/pdp11.sc: New, derived from aout.sc without
	irrelevant input sections.
	* emultempl/pdp11.em (_add_options, _handle_option)
	(_list_options): New. Add options -z, --imagic for pdp11-aout.
	(_before_parse): Make --omagic be default instead of --nmagic.
	(_get_script): Modify special-case linker script for --imagic.
	* lexsup.c (parse_args): Explictly set config.text_read_only for -n.
	* ld.texi (Options): Add documentation of PDP11-specific options.
	(Options): Fix unrelated typo to --no-compact-branches.
	* gen-doc.texi: @set PDP11.
	* testsuite/ld-pdp11/pdp11.exp: New, start pdp11 testing.
	* testsuite/ld-pdp11/sections.s: New, source for options tests.
	* testsuite/ld-pdp11/imagic.d: New, test --imagic format.
	* testsuite/ld-pdp11/imagicz.d: New, test -z (imagic) format.
	* testsuite/ld-pdp11/nmagic.d: New, test --nmagic format.
	* testsuite/ld-pdp11/omagic.d: New, test --omagic format.
2020-04-14 14:41:27 +01:00
Jan W. Jagersma
4d095f5b5e coff-go32-exe: support variable-length stubs
The stub size in GO32 executables has historically been fixed at 2048
bytes, due to hardcoded limitations in bfd.  Recent patches to djgpp by
Stas Sergeev (CC'd) have pushed the stub right up to this limit, so if
any further expansion is desired, this must first be patched in bfd.

This series includes three patches:  The first changes the meaning of
the bfd->origin field slightly, so that target code can use this to
specify an offset into the file where the actual bfd is located.
The second patch then uses this to enable support for variable-sized
stubs in the coff-go32-exe format.
The final patch is only a cleanup, it normalizes function and variable
names in coff-stgo32.c so that they all begin with the same prefix.

bfd	* bfdio.c (bfd_bread, bfd_tell, bfd_seek, bfd_mmap): Always add
	bfd->origin to file offset.
	* bfdwin.c (bfd_get_file_window): Likewise.
	* bfd.c: Clarify the use of the bfd->origin field.
	* bfd-in2.h: Regenerate.
	* coff-i386.c: Don't include go32exe.h. Allow overriding
	coff_write_object_contents via COFF_WRITE_CONTENTS.
	* coff-stgo32.c (go32exe_cleanup, go32exe_mkobject)
	(go32exe_write_object_contents): New functions.
	(go32exe_temp_stub, go32exe_temp_stub_size): New static globals.
	(COFF_WRITE_CONTENTS, GO32EXE_DEFAULT_STUB_SIZE): Define.
	(create_go32_stub): Remove check for 2k size limit.  Read stub
	from go32exe_temp_stub if present.
	(go32_stubbed_coff_bfd_copy_private_bfd_data): Allocate and
	copy variable-length stub.
	(go32_check_format): Read stub to go32exe_temp_stub, set
	origin, return go32exe_cleanup.
	(adjust_filehdr_in_post, adjust_filehdr_out_pre)
	(adjust_filehdr_out_post, adjust_scnhdr_in_post)
	(adjust_scnhdr_out_pre, adjust_scnhdr_out_post)
	(adjust_aux_in_post, adjust_aux_out_pre, adjust_aux_out_post):
	Remove functions and their associated #defines.
	* coffcode.h (coff_mkobject_hook): Remove stub copying code.
	* libcoff-in.h: (struct coff_tdata): New field stub_size.
	Rename field go32stub to stub.
	* libcoff.h: Regenerate.
	* coff-stgo32.c (go32_check_format): Rename to...
	(go32exe_check_format): ...this.
	(go32_stubbed_coff_bfd_copy_private_bfd_data): Rename to...
	(go32exe_copy_private_bfd_data): ...this.
	(stub_bytes): Rename to...
	(go32exe_default_stub): ...this.
	(create_go32_stub): Rename to...
	(go32exe_create_stub): ...this.
	* coff-stgo32.c (go32exe_copy_private_bfd_data): Avoid realloc
	when possible.

include	* coff/go32exe.h: Remove file.
	* coff/internal.h (struct internal_filehdr): Remove field
	go32stub.  Remove flag F_GO32STUB.
2020-04-02 14:31:43 +01:00
Martin Liska
40bd13ced9 include: Sync plugin-api.h with GCC
Fix typo in a macro usage.

	PR lto/94249
	* plugin-api.h: Fix a typo.
2020-04-01 02:36:11 -07:00
Nelson Chu
d1a89da5de RISC-V: Update CSR to privileged spec 1.11.
gas/
	* testsuite/gas/riscv/alias-csr.d: Move this to priv-reg-pseudo.
	* testsuite/gas/riscv/alias-csr.s: Likewise.
	* testsuite/gas/riscv/no-aliases-csr.d: Move this
	to priv-reg-pseudo-noalias.
	* testsuite/gas/riscv/bad-csr.d: Rename to priv-reg-fail-nonexistent.
	* testsuite/gas/riscv/bad-csr.l: Likewise.
	* testsuite/gas/riscv/bad-csr.s: Likewise.
	* testsuite/gas/riscv/satp.d: Removed.  Already included in priv-reg.
	* testsuite/gas/riscv/satp.s: Likewise.
	* testsuite/gas/riscv/priv-reg-pseudo.d: New testcase for all pseudo
	csr instruction, including alias-csr testcase.
	* testsuite/gas/riscv/priv-reg-pseudo.s: Likewise.
	* testsuite/gas/riscv/priv-reg-pseudo-noalias.d: New testcase for all
	pseudo instruction with objdump -Mno-aliases.
	* testsuite/gas/riscv/priv-reg-fail-nonexistent.d: New testcase.
	* testsuite/gas/riscv/priv-reg-fail-nonexistent.l: Likewise.
	* testsuite/gas/riscv/priv-reg-fail-nonexistent.s: Likewise.
	* testsuite/gas/riscv/priv-reg.d: Update CSR to 1.11.
	* testsuite/gas/riscv/priv-reg.s: Likewise.
	* testsuite/gas/riscv/priv-reg-fail-rv32-only.l: Likewise.
	* testsuite/gas/riscv/csr-dw-regnums.d: Likewise.
	* testsuite/gas/riscv/csr-dw-regnums.s: Likewise.

	include/
	* opcode/riscv-opc.h: Update CSR to 1.11.

	gdb/
	* features/riscv/32bit-csr.xml: Regenerated.
	* features/riscv/64bit-csr.xml: Regenerated.
2020-03-30 12:24:53 -07:00