Commit Graph

102583 Commits

Author SHA1 Message Date
Mark Wielaard
d89b66edf5 Sync libiberty and include with GCC for get_DW_UT_name.
This adds a get_DW_UT_name function to dwarfnames using dwarf2.def
for use in binutils readelf to show the unit types in a DWARF5 header.

include/ChangeLog:

	Sync with GCC
	* dwarf2.def: Add DWARF5 Unit type header encoding macros
	DW_UT_FIRST, DW_UT and DW_UT_END.
	* dwarf2.h (enum dwarf_unit_type): Removed and define using
	DW_UT_FIRST, DW_UT and DW_UT_END macros.
	(get_DW_UT_name): New function declaration.

libiberty/ChangeLog:

	Sync with GCC
	* dwarfnames.c (get_DW_UT_name): Define using DW_UT_FIRST, DW_UT
	and DW_UT_END.

(cherry picked from commit d7b477c541)
2020-11-16 20:41:54 +01:00
Mark Wielaard
c9ebbcc99b binutils: Handle DWARF5 DW_FORM_ref_addr and DW_UT_partial.
dwz in DWARF5 mode might produce DW_UT_partial unit types, which are
the same as DW_UT_compile unit types (but start with a DW_TAG_partial_unit)
and it might produce DW_FORM_ref_addr to create a reference between
units. Accept both constructs.

binutils/ChangeLog:

	* dwarf.c (read_and_display_attr_value): Handle DW_FORM_ref_addr
	for dwarf_version 5 just as version 3 and 4 (only 2 is different).
	(process_debug_info): Allow DW_UT_partial.

(cherry picked from commit ec47b32a85)
2020-11-16 20:41:54 +01:00
H.J. Lu
1767e3f3bd elf: Set rel_from_abs to 1 for __ehdr_start
bfdlink.h has

  /* Symbol will be converted from absolute to section-relative.  Set for
     symbols defined by a script from "dot" (also SEGMENT_START or ORIGIN)
     outside of an output section statement.  */
  unsigned int rel_from_abs : 1;

linker.c has

.{* Return TRUE if the symbol described by a linker hash entry H
.   is going to be absolute.  Linker-script defined symbols can be
.   converted from absolute to section-relative ones late in the
.   link.  Use this macro to correctly determine whether the symbol
.   will actually end up absolute in output.  *}
.#define bfd_is_abs_symbol(H) \
.  (((H)->type == bfd_link_hash_defined \
.    || (H)->type == bfd_link_hash_defweak) \
.   && bfd_is_abs_section ((H)->u.def.section) \
.   && !(H)->rel_from_abs)
.

Set rel_from_abs to 1 for __ehdr_start which will be converted from
absolute to section-relative in assign_file_positions_for_load_sections.

	PR ld/26869
	* ldelf.c (ldelf_before_allocation): Set rel_from_abs to 1 for
	__ehdr_start.
	* testsuite/ld-i386/i386.exp: Run pr26869.
	* testsuite/ld-i386/pr26869.d: New file.
	* testsuite/ld-i386/pr26869.s: Likewise.

(cherry picked from commit cbd5b99cce)
2020-11-16 06:38:07 -08:00
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Alex Coplan
1d63b4bfae aarch64: Add support for Neoverse N2 CPU
This patch backports the AArch64 support for Arm's Neoverse N2 CPU to
binutils 2.35.

gas/ChangeLog:

	* config/tc-aarch64.c (aarch64_cpus): Add neoverse-n2.
	* doc/c-aarch64.texi: Document support for Neoverse N2.
2020-11-05 14:45:28 +00:00
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Srinath Parvathaneni
83b4a887fc arm: Fix the wrong error message string for mve vldr/vstr (PR26763).
For mve vldr/vstr instructions assembler is throwing wrong error message.
Instead of 'Error: syntax error' assembler fails with 'Error: lo register required'.
This patch fixes the issue.

eg:
$ cat x.s
.syntax unified
.thumb

vldrb.s16 q0, r0

Before this patch:
$ arm-none-eabi-as x.s -march=armv8.1-m.main+mve -mfloat-abi=hard
x.s: Assembler messages:
x.s:4: Error: lo register required -- `vldrb.s16 q0,r0'

After this patch:
$ arm-none-eabi-as x.s -march=armv8.1-m.main+mve -mfloat-abi=hard
x.s: Assembler messages:
x.s:4: Error: syntax error -- `vldrb.s16 q0,r0'

gas/ChangeLog:

2020-10-21  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>

	PR target/26763
	* config/tc-arm.c (parse_address_main): Add new MVE addressing mode
	check.
	* testsuite/gas/arm/mve-vldr-vstr-bad.d: New test.
	* testsuite/gas/arm/mve-vldr-vstr-bad.l: Likewise.
	* testsuite/gas/arm/mve-vldr-vstr-bad.s: Likewise.
2020-10-22 13:49:21 +01:00
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Alex Coplan
72e2c97030 arm: Add support for Neoverse N2 CPU
This patch backports the AArch32 support for Arm's Neoverse N2 CPU to
binutils 2.35.

gas/ChangeLog:

	* config/tc-arm.c (arm_cpus): Add Neoverse N2.
	* doc/c-arm.texi: Document -mcpu=neoverse-n2.
2020-10-09 15:05:51 +01:00
Alan Modra
43fb3c78d4 [GOLD] Power10 segv due to wild r2
Calling non-pcrel functions from pcrel code requires a stub to set up
r2.  Gold created the stub, but an "optimisation" made the stub jump
to the function local entry, ie. r2 was not initialised.

This patch fixes that long branch stub problem, and another that might
occur for plt call stubs to local functions.

bfd/
	* elf64-ppc.c (write_plt_relocs_for_local_syms): Don't do local
	entry offset optimisation.
gold/
	* powerpc.cc (Powerpc_relobj::do_relocate_sections): Don't do
	local entry offset optimisation for lplt_section.
	(Target_powerpc::Branch_info::make_stub): Don't add local
	entry offset to long branch dest passed to
	add_long_branch_entry.  Do pass st_other bits.
	(Stub_table::Branch_stub_ent): Add "other_" field.
	(Stub_table::add_long_branch_entry): Add "other" param, and
	save.
	(Stub_table::branch_stub_size): Adjust long branch offset.
	(Stub_table::do_write): Likewise.
	(Target_powerpc::Relocate::relocate): Likewise.

(cherry picked from commit fa40fbe484)
2020-10-10 00:13:58 +10:30
Alan Modra
caa173b504 [GOLD] internal error in relocate, at powerpc.cc:10473
GOT relocations can refer directly to a function in a fixed position
executable, unlike ADDR64 which needs a global entry stub, or branch
relocs, which need PLT stubs.

	* powerpc.cc (is_got_reloc): New function.
	(Target_powerpc::Relocate::relocate): Use it here, exclude GOT
	relocs when looking for stubs.

(cherry picked from commit 4290b0ab2b)
2020-10-10 00:13:58 +10:30
Alex Coplan
923aeb9c87 arm: Add support for Neoverse V1 CPU
This patch backports the AArch32 support for Arm's Neoverse V1 CPU to
binutils 2.35.

gas/ChangeLog:

	* config/tc-arm.c (arm_cpus): Add Neoverse V1.
	* doc/c-arm.texi: Document Neoverse V1 support.
2020-10-09 10:57:01 +01:00
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H.J. Lu
e6a9b6b62f gold: Update testsuite/split_[i386|x32|x86_64].sh
Update testsuite/split_i386.sh, testsuite/split_x32.sh and
testsuite/split_x86_64.sh for

commit f9ff65d4df
Author: Alan Modra <amodra@gmail.com>
Date:   Thu Oct 8 10:27:43 2020 +1030

    [GOLD] Increase --split-stack-adjust-size

	* testsuite/split_i386.sh: Updated for --split-stack-adjust-size
	default change.
	* testsuite/split_x32.sh: Likewise.
	* testsuite/split_x86_64.sh: Likewise.

(cherry picked from commit f511427204)
2020-10-08 22:52:22 +10:30
Alan Modra
5cffc4901e [GOLD] Increase --split-stack-adjust-size
For functions with small (< 256 bytes) stack frames, the current x86
do_calls_non_split ignores --split-stack-adjust-size and, in
combination with __morestack_non_split, supplies a non-split-stack
function with at least 0x100000 (1M) available stack.  On powerpc64, a
default of 0x4000 is not large enough to reliably work with the golang
testsuite.  This increase the default size to the defacto x86 value.

	* options.h (split_stack_adjust_size): Default to 0x100000.

(cherry picked from commit f9ff65d4df)
2020-10-08 17:26:35 +10:30