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50 Commits

Author SHA1 Message Date
Andreas Schwab
7102e95e49 gas/: 
* config/tc-ppc.c (ppc_set_cpu): Cast PPC_OPCODE_xxx to ppc_cpu_t
before inverting.

binutils/:
* ppc-dis.c (powerpc_init_dialect): Cast PPC_OPCODE_xxx to
ppc_cpu_t before inverting.
 2010-07-03 08:27:23 +00:00
Alan Modra
bdc70b4a03 include/opcode/ 
* ppc.h (PPC_OPCODE_32, PPC_OPCODE_BOOKE64, PPC_OPCODE_CLASSIC): Delete.
	Renumber other PPC_OPCODE defines.
gas/
	* config/tc-ppc.c (ppc_set_cpu): Remove old opcode flags.
	(ppc_setup_opcodes): Likewise.  Simplify opcode selection.
opcodes/
	* ppc-dis.c (ppc_opts, powerpc_init_dialect): Remove old opcode flags.
	* ppc-opc.c (PPC32, POWER32, COM32, CLASSIC): Delete.
	(PPC64, MFDEC2): Update.
	(NON32, NO371): Define.
	(powerpc_opcode): Update to not use old opcode flags, and avoid
	-m601 duplicates.
 2010-07-03 06:51:56 +00:00
Alan Modra
e01d869a3b gas/ 
* config/tc-ppc.c (md_assemble): Emit APUinfo section for
	PPC_OPCODE_E500.
gas/testsuite/
	* gas/ppc/e500.s: Add eieio, mbar and lwsync
	* gas/ppc/e500.d: Likewise.
include/opcode/
	* ppc.h (PPC_OPCODE_E500): Define.
opcodes/
	* ppc-dis.c (ppc_opts):  Remove PPC_OPCODE_E500MC from e500 and
	e500x2. Add PPC_OPCODE_E500 to e500 and e500x2
	* ppc-opc.c (powerpc_opcodes): Deprecate all opcodes on EFS which
	touch floating point regs and are enabled by COM, PPC or PPCCOM.
	Treat sync as msync on e500.  Treat eieio as mbar 1 on e500.
	Treat lwsync as msync on e500.
 2010-06-14 14:48:05 +00:00
Alan Modra
63d0fa4e9e * ppc-dis.c (ppc_opts): Add PPC_OPCODE_E500MC for "e500mc64". 2010-02-25 01:00:13 +00:00
Richard Sandiford
cdc51b0748 gas/ 
* config/tc-ppc.c (md_show_usage): Add -mpwr4, -mpwr5, -mpwr5x,
	-mpwr6 and -mpwr7.

opcodes/
	* ppc-dis.c (ppc_opts): Add "pwr4", "pwr5", "pwr5x", "pwr6"
	and "pwr7".  Move "a2" into alphabetical order.
 2010-02-10 19:59:07 +00:00
Alan Modra
ce3d2015b2 include/ 
* opcode/ppc.h (PPC_OPCODE_TITAN): Define.
bfd/
	* archures.c (bfd_mach_ppc_titan): Define.
	* bfd-in2.h: Regenerate.
	* cpu-powerpc.c (bfd_powerpc_archs): Add titan entry.
opcodes/
	* ppc-dis.c (ppc_opts): Add titan entry.
	* ppc-opc.c (TITAN, MULHW): Define.
	(powerpc_opcodes): Support AppliedMicro Titan core (APM83xxx).
gas/
	* config/tc-ppc.c (md_show_usage): Mention -mtitan.  Don't use tabs.
	(ppc_mach): Handle titan.
	* doc/c-ppc.texi: Mention -mtitan.
gas/testsuite/
	* gas/ppc/titan.d, * gas/ppc/titan.s: New test.
	* gas/ppc/ppc.exp: Run it.
 2010-02-08 01:59:38 +00:00
Alan Modra
0dc9305793 bfd/ 
* archures.c: Add bfd_mach_ppc_e500mc64.
	* bfd-in2.h: Regenerate.
	* cpu-powerpc.c (bfd_powerpc_archs): Add entry for
	bfd_mach_ppc_e500mc64.
gas/
	* config/tc-ppc.c (md_show_usage): Document -me500mc64.
opcodes/
	* ppc-dis.c (ppc_opts): Add entry for "e500mc64".
 2010-01-04 02:32:56 +00:00
Peter Bergner
9fe54b1ca1 gas/ 
* config/tc-ppc.c (md_show_usage): Document -m476.
	* doc/c-ppc.texi (PowerPC-Opts): Document -m476.

gas/testsuite/
	* gas/ppc/476.s: New test.
	* gas/ppc/476.d: Likewise.
	* gas/ppc/ppc.exp: Run the 476 test.

include/opcode/
	* ppc.h (PPC_OPCODE_476): Define.

opcodes/
	* ppc-dis.c (ppc_opts): Add "476" entry.
	* ppc-opc.c (PPC476): Define.
	(powerpc_opcodes): Update mnemonics where required for 476.
 2009-10-02 14:42:42 +00:00
Peter Bergner
634b50f2a6 gas/ 
* config/tc-ppc.c (md_show_usage): Rename "ppca2" to "a2".
	* doc/c-ppc.texi (PowerPC-Opts): Likewise.

gas/testsuite/
	* gas/ppc/a2.d: Rename "ppca2" to "a2".

include/opcode/
	* ppc.h (PPC_OPCODE_A2): Rename from PPC_OPCODE_PPCA2.

opcodes/
	* ppc-opc.c (PPCA2): Use renamed mask PPC_OPCODE_A2.
	* ppc-dis.c (ppc_opts): Likewise.
	Rename "ppca2" to "a2".
 2009-10-01 19:24:48 +00:00
Ben Elliston
e0d602ecff gas/ 
* config/tc-ppc.c (md_show_usage): Document -mpcca2.
	* doc/c-ppc.texi (PowerPC-Opts): Document -mppca2.

gas/testsuite/
	* gas/ppc/a2.s: New.
	* gas/ppc/a2.d: Likewise.
	* gas/ppc/ppc.exp: Run the a2 dump test.

include/opcode/
	* ppc.h (PPC_OPCODE_PPCA2): New.

opcodes/
	* ppc-dis.c (ppc_opts): Add "ppca2" entry.
	* ppc-opc.c (powerpc_opcodes): Add eratilx, eratsx, eratsx.,
	eratre, wchkall, eratwe, ldawx., mdfcrx., mfdcr. mtdcrx., icswx,
	icswx., mtdcr., dci, wclrone, wclrall, wclr, erativax, tlbsrx.,
	ici mnemonics.
	(ERAT_T): New operand.
	(XWC_MASK): New mask.
	(XOPL2): New macro.
	(PPCA2): Define.
 2009-09-21 10:29:07 +00:00
Peter Bergner
70dc4e324b opcodes/ 
* ppc-dis.c (powerpc_init_dialect): Do not choose a default dialect
	due to -many/-Many.
	(print_insn_powerpc): Make sure we only deprecate instructions using
	the original dialect and not a modified dialect due to -Many handling.
	Move the handling of the condition register and default operands to
	the end of the if/else if/else chain.
	* ppc-opc.c (powerpc_opcodes): Reorder the opcode table so that
	instructions from newer processors are listed before older ones.
	<"icblce", "sync", "eieio", "tlbld">: Deprecate for processors
	that have instructions with conflicting opcodes.
 2009-04-02 13:30:56 +00:00
Alan Modra
69fe9ce501 include/opcode/ 
* ppc.h (ppc_parse_cpu): Declare.
opcodes/
	* ppc-dis.c: Include "opintl.h".
	(struct ppc_mopt, ppc_opts): New.
	(ppc_parse_cpu): New function.
	(powerpc_init_dialect): Use it.
	(print_ppc_disassembler_options): Dump options from ppc_opts.
	Internationalize message.
gas/
	* config/tc-ppc.c (parse_cpu): Delete.
	(md_parse_option, ppc_machine): Use ppc_parse_cpu.
gas/testsuite/
	* gas/ppc/altivec_and_spe.d (objdump): Add -Maltivec.
	* gas/ppc/common.d: Adjust for -Mcom not including -Mppc.
 2009-03-10 06:53:46 +00:00
Peter Bergner
066be9f7bd gas/ 
* config/tc-ppc.c (pre_defined_registers): Add "f32" to "f63",
	"f.32" to "f.63", "vs0" to "vs63" and "vs.0" to "vs.63".
	(parse_cpu): Extend -mpower7 to accept power7 and isel instructions.

gas/testsuite/
	* gas/ppc/e500mc.d ("wait", "waitsrv", "waitimpl"): Add tests.
	* gas/ppc/e500mc.s: Likewise.
	* gas/ppc/power6.d ("cdtbcd", "cbcdtd", "addg6s"): Add tests.
	* gas/ppc/power6.s: Likewise.
	* gas/ppc/power7.d ("lfdpx", "mffgpr", "mftgpr"): Remove invalid tests.
	("wait", "waitsrv", "waitimpl", "divwe", "divwe.", "divweo", "divweo.",
	"divweu", "divweu.", "divweuo", "divweuo.", "bpermd", "popcntw",
	"popcntd", "ldbrx", "stdbrx", "lfiwzx", "lfiwzx", "fcfids", "fcfids.",
	"fcfidus", "fcfidus.", "fctiwu", "fctiwu.", "fctiwuz", "fctiwuz.",
	"fctidu", "fctidu.", "fctiduz", "fctiduz.", "fcfidu", "fcfidu.",
	"ftdiv", "ftdiv", "ftsqrt", "ftsqrt", "dcbtt", "dcbtstt", "dcffix",
	"dcffix.", "lbarx", "lbarx", "lbarx", "lharx", "lharx", "lharx",
	"stbcx.", "sthcx.", "fre", "fre.", "fres", "fres.", "frsqrte",
	"frsqrte.", "frsqrtes", "frsqrtes.", "isel"): Add tests.
	* gas/ppc/power7.s: Likewise.
	* gas/ppc/vsx.d: New test.
	* gas/ppc/vsx.s: Likewise.
	* gas/ppc/ppc.exp: Run it.

include/opcode/
	* ppc.h (PPC_OPCODE_POWER7): New.

opcodes/
	* ppc-dis.c (powerpc_init_dialect): Extend -Mpower7 to disassemble
	the power7 and the isel instructions.
	* ppc-opc.c (insert_xc6, extract_xc6): New static functions.
	(insert_dm, extract_dm): Likewise.
	(XB6): Update comment to include XX2 form.
	(WC, XC6, SHW, DMEX, UIM, XX2, XX3RC, XX4, XX2_MASK, XX2UIM_MASK,
	XX2BF_MASK, XX3BF_MASK, XX3SHW_MASK, XX4_MASK, XWC_MASK, POWER7): New.
	(RemoveXX3DM): Delete.
	(powerpc_opcodes): <"lfdp", "lfdpx", "mcrxr", "mftb", "mffgpr",
	"mftgpr">: Deprecate for POWER7.
	<"fres", "fres.", "frsqrtes", "frsqrtes.", "fre", "fre.", "frsqrte",
	"frsqrte.">: Deprecate the three operand form and enable the two
	operand form for POWER7 and later.
	<"wait">: Extend to accept optional parameter.  Enable for POWER7.
	<"waitsrv", "waitimpl">: Add extended opcodes.
	<"ldbrx", "stdbrx">: Enable for POWER7.
	<"cdtbcd", "cbcdtd", "addg6s">: Add POWER6 opcodes.
	<"bpermd", "dcbtstt", "dcbtt", "dcffix.", "dcffix", "divde.", "divde",
	"divdeo.", "divdeo", "divdeu.", "divdeu", "divdeuo.", "divdeuo",
	"divwe.", "divwe", "divweo.", "divweo", "divweu.", "divweu", "divweuo.",
	"divweuo", "fcfids.", "fcfids", "fcfidu.", "fcfidu", "fcfidus.",
	"fcfidus", "fctidu.", "fctidu", "fctiduz.", "fctiduz", "fctiwu.",
	"fctiwu", "fctiwuz.", "fctiwuz", "ftdiv", "ftsqrt", "lbarx", "lfiwzx",
	"lharx", "popcntd", "popcntw", "stbcx.", "sthcx.">: Add POWER7 opcodes.
	<"lxsdux", "lxsdx", "lxvdsx", "lxvw4ux", "lxvw4x", "stxsdux", "stxsdx",
	"stxvw4ux", "stxvw4x", "xsabsdp", "xsadddp", "xscmpodp", "xscmpudp",
	"xscpsgndp", "xscvdpsp", "xscvdpsxds", "xscvdpsxws", "xscvdpuxds",
	"xscvdpuxws", "xscvspdp", "xscvsxddp", "xscvuxddp", "xsdivdp",
	"xsmaddadp", "xsmaddmdp", "xsmaxdp", "xsmindp", "xsmsubadp",
	"xsmsubmdp", "xsmuldp", "xsnabsdp", "xsnegdp", "xsnmaddadp",
	"xsnmaddmdp", "xsnmsubadp", "xsnmsubmdp", "xsrdpi", "xsrdpic",
	"xsrdpim", "xsrdpip", "xsrdpiz", "xsredp", "xsrsqrtedp", "xssqrtdp",
	"xssubdp", "xstdivdp", "xstsqrtdp", "xvabsdp", "xvabssp", "xvadddp",
	"xvaddsp", "xvcmpeqdp.", "xvcmpeqdp", "xvcmpeqsp.", "xvcmpeqsp",
	"xvcmpgedp.", "xvcmpgedp", "xvcmpgesp.", "xvcmpgesp", "xvcmpgtdp.",
	"xvcmpgtdp", "xvcmpgtsp.", "xvcmpgtsp", "xvcpsgnsp", "xvcvdpsp",
	"xvcvdpsxds", "xvcvdpsxws", "xvcvdpuxds", "xvcvdpuxws", "xvcvspdp",
	"xvcvspsxds", "xvcvspsxws", "xvcvspuxds", "xvcvspuxws", "xvcvsxddp",
	"xvcvsxdsp", "xvcvsxwdp", "xvcvsxwsp", "xvcvuxddp", "xvcvuxdsp",
	"xvcvuxwdp", "xvcvuxwsp", "xvdivdp", "xvdivsp", "xvmaddadp",
	"xvmaddasp", "xvmaddmdp", "xvmaddmsp", "xvmaxdp", "xvmaxsp",
	"xvmindp", "xvminsp", "xvmovsp", "xvmsubadp", "xvmsubasp", "xvmsubmdp",
	"xvmsubmsp", "xvmuldp", "xvmulsp", "xvnabsdp", "xvnabssp", "xvnegdp",
	"xvnegsp", "xvnmaddadp", "xvnmaddasp", "xvnmaddmdp", "xvnmaddmsp",
	"xvnmsubadp", "xvnmsubasp", "xvnmsubmdp", "xvnmsubmsp", "xvrdpi",
	"xvrdpic", "xvrdpim", "xvrdpip", "xvrdpiz", "xvredp", "xvresp",
	"xvrspi", "xvrspic", "xvrspim", "xvrspip", "xvrspiz", "xvrsqrtedp",
	"xvrsqrtesp", "xvsqrtdp", "xvsqrtsp", "xvsubdp", "xvsubsp", "xvtdivdp",
	"xvtdivsp", "xvtsqrtdp", "xvtsqrtsp", "xxland", "xxlandc", "xxlnor",
	"xxlor", "xxlxor", "xxmrghw", "xxmrglw", "xxsel", "xxsldwi", "xxspltd",
	"xxspltw", "xxswapd">: Add VSX opcodes.
 2009-02-26 22:07:33 +00:00
Peter Bergner
21169fcfad opcodes/ 
* ppc-dis.c (print_insn_powerpc): Skip insn if it is deprecated.
	* ppc-opc.c (powerpc_opcodes) <mtfsf, mtfsf.>: Deprecate the two
	operand form and enable the four operand form for POWER6 and later.
	<mtfsfi, mtfsfi.>: Deprecate the two operand form and enable the
	three operand form for POWER6 and later.

gas/testsuite/
	* gas/ppc/power6.s ("mtfsf", "mtfsf.", "mtfsfi", "mtfsfi."): Add tests.
	* gas/ppc/power6.d: Likewise.
 2009-01-15 04:27:28 +00:00
Ben Elliston
2f3bb96af7 opcodes/ 
* ppc-dis.c (powerpc_init_dialect): Do not set PPC_OPCODE_BOOKE
	for -Mbooke.
	(print_ppc_disassembler_options): Update usage.
	* ppc-opc.c (DE, DES, DEO, DE_MASK): Remove.
	(BOOKE64): Remove.
	(PPCCHLK64): Likewise.
	(powerpc_opcodes): Remove all BOOKE64 instructions.

gas/
	* config/tc-ppc.c (parse_cpu): Remove booke64 support. Update
	usage strings.
	(ppc_setup_opcodes): Likewise, remove booke64 support.
	* doc/c-ppc.texi (PowerPC-Opts): Remove -mbooke32 and -mbooke64.
	* doc/as.texinfo (Overview): Likewise.

binutils/
	* doc/binutils.texi (objdump): Update booke documentation.
	* NEWS: Document user-visible changes to command line options.
 2008-12-04 10:29:16 +00:00
Peter Bergner
9b4e57660d gas/ 
* config/tc-ppc.c (parse_cpu): Rename altivec_or_spe to retain_flags.
	Handle -mvsx and -mpower7.
	(md_show_usage): Document -mpower7 and -mvsx.
	* doc/as.texinfo (Target PowerPC): Document -mvsx.
	* doc/c-ppc.texi (PowerPC-Opts): Document -mvsx and -mpower7.

gas/testsuite/
	* gas/ppc/power7.d: New.
	* gas/ppc/power7.s: Likewise.
	* gas/ppc/ppc.exp: Run power7 test.

include/opcode/
	* ppc.h (PPC_OPCODE_VSX, PPC_OPERAND_VSR): New.

opcodes/
	* ppc-dis.c (powerpc_init_dialect): Handle power7 and vsx options.
	(print_insn_powerpc): Prepend 'vs' when printing VSX registers.
	(print_ppc_disassembler_options): Document -Mpower7 and -Mvsx.
	* ppc-opc.c (insert_xt6): New static function.
	(extract_xt6): Likewise.
	(insert_xa6): Likewise.
	(extract_xa6: Likewise.
	(insert_xb6): Likewise.
	(extract_xb6): Likewise.
	(insert_xb6s): Likewise.
	(extract_xb6s): Likewise.
	(XS6, XT6, XA6, XB6, XB6S, DM, XX3, XX3DM, XX1_MASK, XX3_MASK,
	XX3DM_MASK, PPCVSX): New.
	(powerpc_opcodes): Add opcodes "lxvd2x", "lxvd2ux", "stxvd2x",
	"stxvd2ux", "xxmrghd", "xxmrgld", "xxpermdi", "xvmovdp", "xvcpsgndp".
 2008-08-02 04:38:51 +00:00
Alan Modra
081ba1b3c0 include/opcode/ 
* ppc.h (PPC_OPCODE_405): Define.
	(PPC_OPERAND_FSL, PPC_OPERAND_FCR, PPC_OPERAND_UDI): Define.
gas/
	* config/tc-ppc.c (parse_cpu): Separate handling of -m403/405.
	(md_show_usage): Likewise.
opcodes/
	* ppc-dis.c (print_insn_powerpc): Disassemble FSL/FCR/UDI fields.
	* ppc-opc.c (powerpc_operands): Add Xilinx APU related operands.
	(insert_sprg, PPC405): Use PPC_OPCODE_405.
	(powerpc_opcodes): Add Xilinx APU related opcodes.
 2008-07-30 06:29:22 +00:00
Peter Bergner
c8187e1509 gas/ 
* config/tc-ppc.c (parse_cpu): Handle -m464.
	(md_show_usage): Likewise.

opcodes/
	* ppc-dis.c (powerpc_init_dialect): Handle -M464.
	(print_ppc_disassembler_options): Likewise.
	* ppc-opc.c (PPC464): Define.
	(powerpc_opcodes): Add mfdcrux and mtdcrux.
 2008-06-25 16:49:03 +00:00
Peter Bergner
fa452fa683 include/opcode/ 
* ppc.h (ppc_cpu_t): New typedef.
	(struct powerpc_opcode <flags>): Use it.
	(struct powerpc_operand <insert, extract>): Likewise.
	(struct powerpc_macro <flags>): Likewise.

gas/
	* config/tc-ppc.c (ppc_cpu): Use ppc_cpu_t typedef.
	(ppc_insert_operand): Likewise.
	(ppc_machine): Likewise.
	* config/tc-ppc.h: #include "opcode/ppc.h"
	(struct _ppc_fix_extra <ppc_cpu>): Use ppc_cpu_t typedef.
	(ppc_cpu): Update extern decl.

opcodes/
	* ppc-dis.c (print_insn_powerpc): Update prototye to use new
	ppc_cpu_t typedef.
	(struct dis_private): New.
	(POWERPC_DIALECT): New define.
	(powerpc_dialect): Renamed to...
	(powerpc_init_dialect): This.  Update to use ppc_cpu_t and
	struct dis_private.
	(print_insn_big_powerpc): Update for using structure in
	info->private_data.
	(print_insn_little_powerpc): Likewise.
	(operand_value_powerpc): Change type of dialect param to ppc_cpu_t.
	(skip_optional_operands): Likewise.
	(print_insn_powerpc): Likewise.  Remove initialization of dialect.
	* ppc-opc.c (extract_bat, extract_bba, extract_bdm, extract_bdp,
	extract_bo, extract_boe, extract_fxm, extract_mb6, extract_mbe,
	extract_nb, extract_nsi, extract_rbs, extract_sh6, extract_spr,
	extract_sprg, extract_tbr insert_bat, insert_bba, insert_bdm,
	insert_bdp, insert_bo, insert_boe, insert_fxm, insert_mb6, insert_mbe,
	insert_nsi, insert_ral, insert_ram, insert_raq, insert_ras, insert_rbs,
	insert_sh6, insert_spr, insert_sprg, insert_tbr): Change the dialect
	param to be of type ppc_cpu_t.  Update prototype.
 2008-06-13 20:16:00 +00:00
Alan Modra
19a6653ce8 ppc e500mc support 2008-04-14 11:01:38 +00:00
Ben Elliston
c3d65c1ced binutils/ 
* doc/binutils.texi (objdump): Document -Mppcps.

gas/
	* config/tc-ppc.c (parse_cpu): Handle "750cl".
	(pre_defined_registers): Add "gqr0" to "gqr7", "gqr.0" to "gqr.7".
	(md_show_usage): Document -m750cl.
	(md_assemble): Handle two delimiters in succession (eg. `),').
	* doc/c-ppc.texi (PowerPC-Opts): Document -m750cl.
	* testsuite/gas/ppc/ppc.exp: Run ppc70ps dump tests.
	* testsuite/gas/ppc/ppc750ps.s: New file.
	* testsuite/gas/ppc/ppc750ps.d: Likewise.

include/opcode/
	* ppc.h (PPC_OPCODE_PPCPS): New.

opcodes/
	* ppc-opc.c (PSW, PSWM, PSQ, PSQM, PSD, MTMSRD_L): New.
	(XOPS, XOPS_MASK, XW, XW_MASK): Likewise.
	(PPCPS): Likewise.
	(powerpc_opcodes): Add all pair singles instructions.
	* ppc-dis.c (powerpc_dialect): Handle "ppcps".
	(print_ppc_disassembler_options): Document -Mppcps.
 2007-08-24 00:56:30 +00:00
Nick Clifton
9b201bb5e5 Change source files over to GPLv3. 2007-07-05 09:49:03 +00:00
Alan Modra
65b650b4c7 * ppc-dis.c (print_insn_powerpc): Don't skip all operands 
after setting skip_optional.
 2007-05-18 01:32:58 +00:00
Peter Bergner
ea192fa395 * ppc-dis.c (operand_value_powerpc, skip_optional_operands): New. 
(print_insn_powerpc): Use the new operand_value_powerpc and
	skip_optional_operands functions to omit or print all optional
	operands as a group.
	* ppc-opc.c (BFF, W, XFL_L, XWRA_MASK): New.
	(XFL_MASK): Delete L and W bits from the mask.
	(mtfsfi, mtfsfi.): Replace use of BF with BFF.  Relpace use of XRA_MASK
	with XWRA_MASK.  Use W.
	(mtfsf, mtfsf.): Use XFL_L and W.
 2007-05-17 00:52:14 +00:00
Alan Modra
b84bf58af1 include/opcode/ 
* ppc.h (struct powerpc_operand): Replace "bits" with "bitm".
	(num_powerpc_operands): Declare.
	(PPC_OPERAND_SIGNED et al): Redefine as hex.
	(PPC_OPERAND_PLUS1): Define.
opcodes/
	* ppc-dis.c (print_insn_powerpc): Adjust for struct powerpc_operand
	change.
	* ppc-opc.c (powerpc_operands): Replace bit count with bit mask
	in all entries.  Add PPC_OPERAND_SIGNED to DE entry.  Remove
	references to following deleted functions.
	(insert_bd, extract_bd, insert_dq, extract_dq): Delete.
	(insert_ds, extract_ds, insert_de, extract_de): Delete.
	(insert_des, extract_des, insert_li, extract_li): Delete.
	(insert_nb, insert_rsq, insert_rtq, insert_ev2, extract_ev2): Delete.
	(insert_ev4, extract_ev4, insert_ev8, extract_ev8): Delete.
	(num_powerpc_operands): New constant.
	(XSPRG_MASK): Remove entire SPRG field.
	(powerpc_opcodes <bcctre, bcctrel>): Use XLBB_MASK not XLYBB_MASK.
gas/
	* messages.c (as_internal_value_out_of_range): Extend to report
	errors for values with invalid low bits set.
	* config/tc-ppc.c (ppc_setup_opcodes): Check powerpc_operands bitm
	fields.  Check that operands and opcode fields are disjoint.
	(ppc_insert_operand): Check operands using mask rather than bit
	count.   Check low bits too.  Handle PPC_OPERAND_PLUS1.  Adjust
	insertion code.
	(md_apply_fix): Adjust for struct powerpc_operand change.
 2007-04-20 12:25:15 +00:00
Nick Clifton
64a3a6fcf9 * ppc-dis.c (powerpc_dialect): Handle ppc440. 
* ppc-dis.c (print_ppc_disassembler_options): Note the -M440 can be used.
 2007-02-02 12:37:41 +00:00
Alan Modra
ede602d7c8 Add powerpc cell support. 2006-10-24 01:27:29 +00:00
Alan Modra
9622b051cf include/opcode/ 
* ppc.h (PPC_OPCODE_POWER6): Define.
	Adjust whitespace.
gas/
	* config/tc-ppc.c (parse_cpu): Handle "-mpower6".
	(md_show_usage): Document it.
	(ppc_setup_opcodes): Test power6 opcode flag bits.
	* doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
opcodes/
	* ppc-dis.c (powerpc_dialect): Handle power6 option.
	(print_ppc_disassembler_options): Mention power6.
 2006-06-07 05:23:59 +00:00
Daniel Jacobowitz
6edfbbad08 bfd/ 
* elf32-arm.c (elf32_arm_check_relocs): Avoid aliasing warnings from
	GCC.
	(elf32_arm_size_dynamic_sections): Likewise.
	* ecofflink.c (bfd_ecoff_debug_one_external): Likewise.
	* elf32-hppa.c (elf32_hppa_check_relocs): Likewise.
	* elf32-m32r.c (m32r_elf_check_relocs): Likewise.
	* elf32-m68k.c (elf_m68k_check_relocs): Likewise.
	* elf32-ppc.c (ppc_elf_check_relocs): Likewise.
	* elf32-s390.c (elf_s390_check_relocs): Likewise.
	(elf_s390_size_dynamic_sections): Likewise.
	* elf32-sh.c (sh_elf_check_relocs): Likewise.
	* elf64-ppc.c (ppc64_elf_check_relocs, dec_dynrel_count)
	(ppc64_elf_size_dynamic_sections): Likewise.
	* elf64-s390.c (elf_s390_check_relocs): Likewise.
	(elf_s390_size_dynamic_sections): Likewise.
	* elfxx-mips.c (_bfd_mips_elf_finish_dynamic_sections): Likewise.
	* elfxx-sparc.c (_bfd_sparc_elf_check_relocs): Likewise.
	(_bfd_sparc_elf_size_dynamic_sections): Likewise.
	* ieee.c (ieee_slurp_section_data): Likewise.
	* oasys.c (oasys_slurp_section_data): Likewise.
opcodes/
	* ppc-dis.c (struct dis_private): Remove.
	(powerpc_dialect): Avoid aliasing warnings.
	(print_insn_big_powerpc, print_insn_little_powerpc): Likewise.
 2005-10-06 19:21:14 +00:00
Daniel Jacobowitz
36ae0db314 gas/ 
* config/tc-ppc.c (parse_cpu): Add -me300 support.
	(md_show_usage): Likewise.
	* doc/c-ppc.texi (PowerPC-Opts): Document it.
include/opcode/
	* ppc.h (PPC_OPCODE_E300): Define.
opcodes/
	* ppc-dis.c (powerpc_dialect): Handle e300.
	(print_ppc_disassembler_options): Likewise.
	* ppc-opc.c (PPCE300): Define.
	(powerpc_opcodes): Mark icbt as available for the e300.
binutils/
	* doc/binutils.texi (objdump): Document -M e300.
 2005-08-15 15:37:15 +00:00
Jim Wilson
0fd3a4776c Kaveh Ghazi's printf format attribute checking patch. 
bfd:
	* elf32-xtensa.c (vsprint_msg): Add format attribute.  Fix
	format bugs.
	* vms.h (_bfd_vms_debug): Add format attribute.
	(_bfd_vms_debug, _bfd_hexdump): Fix typos.

binutils:
	* bucomm.h (report): Add format attribute.
	* dlltool.c (inform): Likewise.
	* dllwrap.c (display, inform, warn): Likewise.
	* objdump.c (objdump_sprintf): Likewise.
	* readelf.c (error, warn): Likewise.  Fix format bugs.

gas:
	* config/tc-tic30.c (debug): Add format attribute.  Fix format
	bugs.

include:
	* dis-asm.h (fprintf_ftype): Add format attribute.

opcodes:
	* arc-dis.c, arm-dis.c, cris-dis.c, crx-dis.c, d10v-dis.c,
	d30v-dis.c, fr30-dis.c, h8300-dis.c, h8500-dis.c, i860-dis.c,
	ia64-dis.c, ip2k-dis.c, m10200-dis.c, m10300-dis.c,
	m88k-dis.c, mcore-dis.c, mips-dis.c, ms1-dis.c, or32-dis.c,
	ppc-dis.c, sh64-dis.c, sparc-dis.c, tic4x-dis.c, tic80-dis.c,
	v850-dis.c: Fix format bugs.
	* ia64-gen.c (fail, warn): Add format attribute.
	* or32-opc.c (debug): Likewise.
 2005-07-07 19:27:52 +00:00
Alan Modra
1ed8e1e4fb * ppc-dis.c (powerpc_dialect): Handle "-Mpower5". 
(print_ppc_disassembler_options): Document it.
	* ppc-opc.c (SCV_LEV): Define.
	(LEV): Allow optional operand.
	(POWER5): Define.
	(powerpc_opcodes): Extend "sc".  Adjust "svc" and "svcl".  Add
	"hrfid", "popcntb", "fsqrtes", "fsqrtes.", "fre" and "fre.".
 2005-05-19 07:00:40 +00:00
Nick Clifton
f432110413 Update the address and phone number of the FSF 2005-05-07 07:34:31 +00:00
Alan Modra
4eb30afc41 * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when 
BOOKE.
 2005-03-16 02:38:39 +00:00
Alan Modra
fdd12ef3c6 opcodes/ 
* ppc-dis.c (print_insn_powerpc): Don't print tabs.  Handle
	PPC_OPERANDS_GPR_0.
	* ppc-opc.c (RA0): Define.
	(RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
	(RAOPT): Rename from RAO.  Update all uses.
	(powerpc_opcodes): Use RA0 as appropriate.  Add "lsdx", "lsdi",
	"stsdx", "stsdi", "lmd" and "stmd" insns.

include/opcode/
	* ppc.h (PPC_OPERAND_GPR_0): Define.  Bump other operand defines.

gas/testsuite/
	Update gas/ppc/.

ld/testsuite/
	Update ld-powerpc/.
 2004-03-16 00:58:43 +00:00
Alan Modra
661bd698e4 * ppc-dis.c (struct dis_private): New. 
(powerpc_dialect): Make static.  Accept -Many in addition to existing
	options.  Save dialect in dis_private.
	(print_insn_big_powerpc): Retrieve dialect from dis_private.
	(print_insn_little_powerpc): Likewise.
	(print_insn_powerpc): Call powpc_dialect here.  Remove unnecessary
	efs/altivec check.  Try harder to disassemble if given -Many.
	* ppc-opc.c (insert_fxm): Expand comment.
	(PPC, PPCCOM, PPC32, PPC64, PPCVEC): Remove PPC_OPCODE_ANY.
	(POWER, POWER2, PPCPWR2, POWER32, COM, COM32, M601, PWRCOM): Likewise.
	(POWER4): Remove PPCCOM.
	(PPCONLY): Don't define.  Update all occurrences to PPC.
 2003-09-04 01:51:37 +00:00
Alan Modra
823bbe9d95 * ppc-opc.c (powerpc_opcodes): Combine identical PPC403/BOOKE entries. 
Move duplicate mnemonic entries together.  Use RS instead of RT on
	all mt*.
	* ppc-dis.c: Convert to ISO C.
 2003-09-02 04:15:29 +00:00
Alan Modra
8427c42425 * ppc-opc.c: Remove NULL pointer checks. Formatting. Remove 
extraneous ATTRIBUTE_UNUSED.
	* ppc-dis.c (print_insn_powerpc): Always pass a valid address to
	operand->extract.
 2003-07-07 01:34:04 +00:00
Alan Modra
8b4fa15520 * ppc-dis.c (print_insn_powerpc): Correct condition register display. 2002-11-12 04:03:31 +00:00
Alan Modra
9ec878e367 * ppc-dis.c (powerpc_dialect): Add missing PPC_OPCODE_CLASSIC. 2002-09-12 03:58:37 +00:00
Nick Clifton
07dd56a969 Have objdump's --help switch document PPC -M options. 2002-09-04 10:08:08 +00:00
Elena Zannoni
2397604975 2002-08-19 Elena Zannoni <ezannoni@redhat.com> 
From  matthew green  <mrg@redhat.com>

        * ppc-dis.c (powerpc_dialect): Support `-m500', `-m500x2' and
        `-mefs'. Turn off AltiVec for E500 and efs.
        (print_insn_powerpc): Don't print an AltiVec instruction if the
        dialect is not efs.

        * ppc-opc.c (insert_pmrn, extract_pmrn, insert_ev2, extract_ev2,
        insert_ev4, extract_ev4, insert_ev8, extract_ev8): New functions
        for extracting pmrn/evld/evstd/etc operands.
        (CRB, CRFD, CRFS, DC, RD): New instruction fields.
        (CT): Make this equal to RD + 1.
        (PMRN): New operand.
        (RA): Update.
        (EVUIMM, EVUIMM_2, EVUIMM_4, EVUIMM_8): New operands.
        (WS): Update.
        (EVSEL, EVSEL_MASK): New instruction form and mask for EVSEL.
        (ISEL, ISEL_MASK): New instruction form and mask for ISEL.
        (XISEL, XISEL_MASK): New instruction form and mask for ISEL.
        (CTX, CTX_MASK): New instruction form and mask for context cache
        instructions.
        (UCTX, UCTX_MASK): New instruction form and mask for user context
        cache instructions.
        (XC, XC_MASK, XUC, XUC_MASK): New instruction forms.
        (CLASSIC): New define.
        (PPCESPE): New define.
        (PPCISEL, , PPCBRLK, PPCPMR, PPCCHLK, PPCRFMI): New
        defines for integer select, cache control, branch
        locking, power management, cache locking and machine check
        APU instructions, respectively.
        (efsabs, efsnabs, efsneg, efsadd, efssub, efsmul,
        efsdiv, efscmpgt, efscmplt, efscmpeq, efststgt, efststlt,
        efststeq, efscfui, efsctuiz, efscfsi, efscfuf, efscfsf,
        efsctui, efsctsi, efsctsiz, efsctuf, efsctsf,
        evaddw, evaddiw, evsubfw, evsubifw, evabs, evneg, evextsb,
        evextsh, evrndw, evcntlzw, evcntlsw, brinc, evand, evandc, evor,
        evorc, evxor, eveqv, evnand, evnor, evrlw, evrlwi, evslw, evslwi,
        evsrws, evsrwu, evsrwis, evsrwiu, evsplati, evsplatfi, evmergehi,
        evmergelo, evmergehilo, evmergelohi, evcmpgts, evcmpgtu, evcmplts,
        evcmpltu, evcmpeq, evsel, evldd, evlddx, evldw, evldwx, evldh,
        evldhx, evlwhe, evlwhex, evlwhou, evlwhoux, evlwhos, evlwhosx,
        evlwwsplat, evlwwsplatx, evlwhsplat, evlwhsplatx, evlhhesplat,
        evlhhesplatx, evlhousplat, evlhousplatx, evlhossplat, evlhossplatx,
        evstdd, evstddx, evstdw, evstdwx, evstdh, evstdhx, evstwwe,
        evstwwex, evstwwo, evstwwox, evstwhe, evstwhex, evstwho, evstwhox,
        evfsabs, evfsnabs, evfsneg, evfsadd, evfssub, evfsmul, evfsdiv,
        evfscmpgt, evfscmplt, evfscmpeq, evfststgt, evfststlt, evfststeq,
        evfscfui, evfsctuiz, evfscfsi, evfscfuf, evfscfsf, evfsctui,
        evfsctsi, evfsctsiz, evfsctuf, evfsctsf, evsabs, evsnabs, evsneg,
        evsadd, evssub, evsmul, evsdiv, evscmpgt, evsgmplt, evsgmpeq,
        evststgt, evststlt, evststeq, evscfui, evscfsi, evscfuf, evscfsf,
        evsctui, evsctuiz, evsctsi, evsctsiz, evsctuf, evsctsf, evmhossf,
        evmhossfa, evmhosmf, evmhosmfa, evmhosmi, evmhosmia, evmhoumi,
        evmhoumia, evmhessf, evmhessfa, evmhesmf, evmhesmfa, evmhesmi,
        evmhesmia, evmheumi, evmheumia, evmhossfaaw, evmhossiaaw,
        evmhosmfaaw, evmhosmiaaw, evmhousiaaw, evmhoumiaaw, evmhessfaaw,
        evmhessiaaw, evmhesmfaaw, evmhesmiaaw, evmheusiaaw, evmheumiaaw,
        evmhossfanw, evmhossianw, evmhosmfanw, evmhosmianw, evmhousianw,
        evmhoumianw, evmhessfanw, evmhessianw, evmhesmfanw, evmhesmianw,
        evmheusianw, evmheumianw, evmhogsmfaa, evmhogsmiaa, evmhogumiaa,
        evmhegsmfaa, evmhegsmiaa, evmhegumiaa, evmhogsmfan, evmhogsmian,
        evmhogumian, evmhegsmfan, evmhegsmian, evmhegumian, evmwhssf,
        evmwhssfa, evmwhssfaa, evmwhssmaa, evmwhsmfaa, evmwhsmiaa,
        evmwhusiaa, evmwhumiaa, evmwhssfan, evmwhssian, evmwhsmfan,
        evmwhsmian, evmwhusian, evmwhumian, evmwhgssfaa, evmwhgsmfaa,
        evmwhgsmiaa, evmwhgumiaa, evmwhgssfan, evmwhgsmfan, evmwhgsmian,
        evmwhgumian, evmwhsmf, evmwhsmfa, evmshsmi, evmshsmia, evmshumi,
        evmshumia, evmmlssf, evmmlssfa, evmwlsmf, evmwlsmfa, evmwlumi,
        evmwlumia, evmwlssfaaw, evmwlssiaaw, evmwlsmfaaw, evmwlsmiaaw,
        evmwlusiaaw, evmwlumiaaw, evmwissfanw, evmwissianw, evmwlsmfanw,
        evmwlsmianw, evmwlusianw, evmwlumianw, evmwssf, evmwssfa,
        evmwsmf, evmwsmfa, evmwsmi, evmwsmia, evmwumi, evmwumia,
        evmwssfaa, evmwsmfaa, evmwsmiaa, evmwumiaa, evmwssfan, evmwsmfan,
        evmwsmian, evmwumian, evaddssiaaw, evaddsmiaaw, evaddusiaaw,
        evaddumiaaw, evsubfssiaaw, evsubfsmiaaw, evsubfusiaaw,
        evsubfumiaaw, evmra, evdivws, evdivws): New e500x2 Core Complex
        instructions.
        (rfmci): New machine check APU instruction.
        (isel): New integer select APU instructino.
        (icbtls, icbtlse, icblc, icblce, dcbtls, dcbtlse, dcbtstls,
        dcbtstlse, dcblc, dcblce): New cache control APU instructions.
        (mtspefscr, mfspefscr): New instructions.
        (mfpmr, mtpmr): New performance monitor APU instructions.
        (savecontext): New context cache APU instructions.
        (bblels, bbelr): New branch locking APU instructions.
        (bblels, bbelr): New instructions.
        (mftbl, mftbu, mftb): Set as CLASSIC instructions.  Add BOOKE alias.
 2002-08-19 20:59:10 +00:00
Alan Modra
94efba1253 * ppc-dis.c (powerpc_dialect): Handle power4 option. 
* ppc-opc.c (insert_bdm): Correct description of "at" branch
	hints.  Test PPC_OPCODE_POWER4 to determine branch hint flavour.
	(extract_bdm, insert_bdp, extract_bdp, valid_bo): Likewise.
	(BOFM64, BOFP64, BOTM64, BOFP64): Rename to BOFM4, BOFP4 etc.
	(BODNZM64, BODNZP64, BODZM64, BODZP64): Likewise.
	(PPCCOM32, PPCCOM64): Delete.
	(NOPOWER4, POWER4): Define.
	(powerpc_opcodes): Replace occurences of PPCCOM32 with NOPOWER4,
	and PPCCOM4 with POWER4 so that "at" style branch hint opcodes
	are enabled for power4 rather than ppc64.
 2002-02-25 03:43:46 +00:00
Matthew Green
9a0ccb2478 * ppc-opc.c (powerpc_dialect): Fix comment; BookE is not Motorola 
specific.
 2002-02-19 15:20:26 +00:00
Alan Modra
802a735ed9 binutils/ChangeLog 
* doc/binutils.texi (objdump): Document ppc -M options.
gas/ChangeLog
	* config/tc-ppc.c (ppc_insert_operand): Pass (ppc_cpu | ppc_size)
	to operand->insert.
	(md_assemble): Likewise.
gas/testsuite/ChangeLog
	* gas/ppc/booke.d: Modify reloc and target matches for powerpc64.
include/opcode/ChangeLog
	* ppc.h (struct powerpc_operand <insert, extract>): Add dialect param.
opcodes/ChangeLog
	* ppc-opc.c (PPC64): Revert 2001-10-12. Do include PPC_OPCODE_PPC.
	(insert_bat, extract_bat, insert_bba, extract_bba,
	insert_bd, extract_bd, insert_bdm, extract_bdm,
	insert_bdp, extract_bdp, valid_bo,
	insert_bo, extract_bo, insert_boe, extract_boe,
	insert_ds, extract_ds, insert_de, extract_de,
	insert_des, extract_des, insert_li, extract_li,
	insert_mbe, extract_mbe, insert_mb6, extract_mb6,
	insert_nb, extract_nb, insert_nsi, extract_nsi,
	insert_ral, insert_ram, insert_ras,
	insert_rbs, extract_rbs, insert_sh6, extract_sh6,
	insert_spr, extract_spr, insert_tbr, extract_tbr): Add dialect param.
	(extract_bd, extract_bdm, extract_bdp,
	extract_ds, extract_des,
	extract_li, extract_nsi): Implement sign extension without conditional.
	(insert_bdm, extract_bdm,
	insert_bdp, extract_bdp, valid_bo): Handle 64 bit branch hints.
	(extract_bdm, extract_bdp): Correct 32 bit validation.
	(AT1_MASK, AT2_MASK): Define.
	(BBOAT_MASK): Define.
	(BBOATCB_MASK, BBOAT2CB_MASK, BBOATBI_MASK): Define.
	(BOFM64, BOFP64, BOTM64, BOTP64): Define.
	(BODNZM64, BODNZP64, BODZM64, BODZP64): Define.
	(PPCCOM32, PPCCOM64): Define.
	(powerpc_opcodes): Modify existing 32 bit insns with branch hints
	and add new patterns to implement 64 bit branches with hints.  Move
	booke instructions so they match before ppc64.
	* ppc-dis.c (powerpc_dialect): Set PPC_OPCODE_64 in dialect for
	64 bit default targets, and parse "32" and "64" in options.
	Formatting fixes.
	(print_insn_powerpc): Pass dialect to operand->extract.
 2001-11-15 01:08:53 +00:00
Matthew Green
418c174284 [gas/ChangeLog] 
* config/tc-ppc.c (md_parse_option): New -m7410, -m7450 and -m7455
	flags, equivalent to -m7400.  New -maltivec to enable AltiVec
	instructions.  New -mbook64 and -mbooke/-mbooke32 flags to enable
	64-bit and 32-bit BookE support, respectively.  Change -m403 and
	-m405 to set PPC403 option.
	(md_show_usage): Adjust for new options.
	* doc/all.texi: Set PPC.
	* doc/as.texinfo: Add PPC support and pull in c-ppc.texi.
	* doc/c-ppc.texi: New file.
	* doc/Makefile.am (CPU_DOCS): Add c-ppc.texi.
	* doc/Makefile.in: Regenerate.

[gas/testsuite/ChangeLog]
	* gas/ppc/booke.s: New test for Motorola BookE.
	* gas/ppc/booke.d: New file.
	* gas/ppc/ppc.exp: Test booke.s.

[include/opcode/ChangeLog]
	* ppc.h (PPC_OPCODE_BOOKE, PPC_OPCODE_403): New opcode flags for
	BookE and PowerPC403 instructions.

[opcodes/ChangeLog]
	* ppc-opc.c (insert_de, extract_de, insert_des, extract_des): New
	instruction field instruction/extraction functions for new BookE
	DE form instructions.
	(CT): New macro for CT field in an X form instruction.
	(DE, DES, DEO, DE_MASK): New macros for DE/DES fields in DE form
	instructions.
	(PPC64): Don't include PPC_OPCODE_PPC.
	(403): New opcode macro for PPC403 processors.
	(BOOKE): New opcode macro for BookE processors.
	(bce, bcel, bcea, bcela, bclre, bclrel: New BookE instructions.
	(bcctre, bcctrel, be, bel, bea, bela, icbt, icbte, lwzxe): Likewise.
	(dcbste, lwzuxe, luxe, dcbfe, lbzxe, lwarxe, lbzuxe): Likewise.
	(stwcxe, stwxe, stxe, stwuxe, stuxe, stbxe, dcbtste, stbuxe): Likewise.
	(mfapidi, dcbte, lhzxe, lhzuxe, lhaxe, lhauxe, subfe64): Likewise.
	(subfeo64, adde64, addeo64, sthxe, sthuxe, subfze64): Likewise.
	(subfzeo64, addze64, addzeo64, dcbie, subfme64, subfmeo64): Likewise.
	(addme64, addmeo64, stdcxe., mcrxr64, lwbrxe, lfsxe, lfsuxe): Likewise.
	(lfdxe, lfduxe, stwbrxe, stfsxe, stfsuxe, stfdxe, dcbae): Likewise.
	(stfduxe, tlbivax, tlbivaxe, lhbrxe, ldxe, lduxe, tlbsx): Likewise.
	(tlbsxe, sthbrxe, stdxe, stduxe, icbie, stfiwxe, dcbze, lbze): Likewise.
	(lbzue, ldue, lhze, lhzue, lhae, lhaue, lwze, lwzue): Likewise.
	(stbe, stbue, sthe, sthue, stwe, stwue, lfse, lfsue, lfde): Likewise.
	(lfdue, stde, stdue, stfse, stfsue, stfde, stfdue): Likewise.

	* ppc-dis.c (print_insn_big_powerpc, print_insn_little_powerpc): Look
	for a disassembler option of `booke', `booke32' or `booke64' to enable
	BookE support in the disassembler.
 2001-10-13 01:59:09 +00:00
Nick Clifton
060d22b0d0 Fix typos in ChangeLogs; fix dates in copyright notices 2001-03-13 22:58:38 +00:00
J.T. Conklin
786e2c0f62 * ppc-opc.c (VA, VB, VC, VD, VS, SIMM, UIMM, SHB): New macros, for 
vector unit operands.
(VX, VX_MASK, VXA, VXA_MASK, VXR, VXR_MASK): New macros, for vector
unit instruction formats.
(PPCVEC): New macro, mask for vector instructions.
(powerpc_operands): Add table entries for above operand types.
(powerpc_opcodes): Add table entries for vector instructions.

* ppc-dis.c (print_insn_big_powerpc): Add PPC_OPCODE_ALTIVEC to mask.
(print_insn_little_powerpc): Likewise.
(print_insn_powerpc): Prepend 'v' when printing vector registers.
 2000-05-03 22:25:08 +00:00
Alan Modra
0d8dfecfe9 More portability patches. Include sysdep.h everywhere. 2000-04-14 04:16:58 +00:00
Richard Henderson
252b5132c7 19990502 sourceware import 1999-05-03 07:29:11 +00:00