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146 Commits

Author SHA1 Message Date
Alan Modra
1a0670f374 -Wimplicit-fallthrough warning fixes 
Comment changes.

bfd/
	* coff-h8300.c: Spell fall through comments consistently.
	* coffgen.c: Likewise.
	* elf32-hppa.c: Likewise.
	* elf32-ppc.c: Likewise.
	* elf32-score.c: Likewise.
	* elf32-score7.c: Likewise.
	* elf64-ppc.c: Likewise.
	* elfxx-aarch64.c: Likewise.
	* elfxx-mips.c: Likewise.
	* cpu-ns32k.c: Add missing fall through comments.
	* elf-m10300.c: Likewise.
	* elf32-arm.c: Likewise.
	* elf32-avr.c: Likewise.
	* elf32-bfin.c: Likewise.
	* elf32-frv.c: Likewise.
	* elf32-i386.c: Likewise.
	* elf32-microblaze.c: Likewise.
	* elf32-nds32.c: Likewise.
	* elf32-ppc.c: Likewise.
	* elf32-rl78.c: Likewise.
	* elf32-rx.c: Likewise.
	* elf32-s390.c: Likewise.
	* elf32-sh.c: Likewise.
	* elf32-tic6x.c: Likewise.
	* elf64-ia64-vms.c: Likewise.
	* elf64-ppc.c: Likewise.
	* elf64-s390.c: Likewise.
	* elf64-x86-64.c: Likewise.
	* elflink.c: Likewise.
	* elfnn-aarch64.c: Likewise.
	* elfnn-ia64.c: Likewise.
	* ieee.c: Likewise.
	* oasys.c: Likewise.
	* pdp11.c: Likewise.
	* srec.c: Likewise.
	* versados.c: Likewise.
opcodes/
	* aarch64-opc.c: Spell fall through comments consistently.
	* i386-dis.c: Likewise.
	* aarch64-dis.c: Add missing fall through comments.
	* aarch64-opc.c: Likewise.
	* arc-dis.c: Likewise.
	* arm-dis.c: Likewise.
	* i386-dis.c: Likewise.
	* m68k-dis.c: Likewise.
	* mep-asm.c: Likewise.
	* ns32k-dis.c: Likewise.
	* sh-dis.c: Likewise.
	* tic4x-dis.c: Likewise.
	* tic6x-dis.c: Likewise.
	* vax-dis.c: Likewise.
binutils/
	* dlltool.c: Spell fall through comments consistently.
	* objcopy.c: Likewise.
	* readelf.c: Likewise.
	* dwarf.c: Add missing fall through comments.
	* elfcomm.c: Likewise.
	* sysinfo.y: Likewise.
	* readelf.c: Likewise.  Also remove extraneous comments.
gas/
	* app.c: Add missing fall through comments.
	* dw2gencfi.c: Likewise.
	* expr.c: Likewise.
	* config/tc-alpha.c: Likewise.
	* config/tc-arc.c: Likewise.
	* config/tc-arm.c: Likewise.
	* config/tc-cr16.c: Likewise.
	* config/tc-crx.c: Likewise.
	* config/tc-dlx.c: Likewise.
	* config/tc-h8300.c: Likewise.
	* config/tc-hppa.c: Likewise.
	* config/tc-i370.c: Likewise.
	* config/tc-i386.c: Likewise.
	* config/tc-i960.c: Likewise.
	* config/tc-ia64.c: Likewise.
	* config/tc-m68hc11.c: Likewise.
	* config/tc-m68k.c: Likewise.
	* config/tc-mep.c: Likewise.
	* config/tc-metag.c: Likewise.
	* config/tc-microblaze.c: Likewise.
	* config/tc-mips.c: Likewise.
	* config/tc-ns32k.c: Likewise.
	* config/tc-rx.c: Likewise.
	* config/tc-score.c: Likewise.
	* config/tc-score7.c: Likewise.
	* config/tc-sh.c: Likewise.
	* config/tc-tic4x.c: Likewise.
	* config/tc-vax.c: Likewise.
	* config/tc-xstormy16.c: Likewise.
	* config/tc-z80.c: Likewise.
	* config/tc-z8k.c: Likewise.
	* config/obj-elf.c: Likewise.
	* config/tc-i386.c: Likewise.
	* depend.c: Spell fall through comments consistently.
	* config/tc-arm.c: Likewise.
	* config/tc-d10v.c: Likewise.
	* config/tc-i960.c: Likewise.
	* config/tc-ia64.c: Likewise.
	* config/tc-m68k.c: Likewise.
	* config/tc-mcore.c: Likewise.
	* config/tc-mep.c: Likewise.
	* config/tc-ns32k.c: Likewise.
	* config/tc-visium.c: Likewise.
	* config/tc-xstormy16.c: Likewise.
	* config/tc-z8k.c: Likewise.
gprof/
	* gprof.c: Add missing fall through comments.
ld/
	* lexsup.c: Spell fall through comments consistently and add
	missing fall through comments.
 2016-10-06 10:13:15 +10:30
Alan Modra
4eca02287c Remove syntactic sugar 
Now that _bfd_error_handler is not a function pointer.

	* aout-adobe.c: Replace (*_bfd_error_handler) (...) with
	_bfd_error_handler (...) throughout.
	* aout-cris.c, * aoutx.h, * archive.c, * bfd.c, * binary.c,
	* cache.c, * coff-alpha.c, * coff-arm.c, * coff-h8300.c,
	* coff-i860.c, * coff-mcore.c, * coff-ppc.c, * coff-rs6000.c,
	* coff-sh.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c,
	* coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c,
	* coffswap.h, * cpu-arm.c, * cpu-m68k.c, * cpu-sh.c, * dwarf2.c,
	* ecoff.c, * elf-eh-frame.c, * elf-m10300.c, * elf.c, * elf32-arc.c,
	* elf32-arm.c, * elf32-avr.c, * elf32-bfin.c, * elf32-cr16.c,
	* elf32-cris.c, * elf32-crx.c, * elf32-dlx.c, * elf32-frv.c,
	* elf32-hppa.c, * elf32-i370.c, * elf32-i386.c, * elf32-lm32.c,
	* elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc1x.c, * elf32-m68k.c,
	* elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c,
	* elf32-mips.c, * elf32-nds32.c, * elf32-nios2.c, * elf32-or1k.c,
	* elf32-pj.c, * elf32-ppc.c, * elf32-rl78.c, * elf32-s390.c,
	* elf32-score.c, * elf32-score7.c, * elf32-sh.c, * elf32-sh64.c,
	* elf32-sparc.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilepro.c,
	* elf32-v850.c, * elf32-vax.c, * elf32-xtensa.c, * elf64-alpha.c,
	* elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c,
	* elf64-ppc.c, * elf64-s390.c, * elf64-sh64.c, * elf64-sparc.c,
	* elf64-x86-64.c, * elfcode.h, * elfcore.h, * elflink.c,
	* elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfxx-mips.c,
	* elfxx-sparc.c, * elfxx-tilegx.c, * hpux-core.c, * i386linux.c,
	* ieee.c, * ihex.c, * libbfd.c, * linker.c, * m68klinux.c,
	* mach-o.c, * merge.c, * mmo.c, * oasys.c, * osf-core.c, * pdp11.c,
	* pe-mips.c, * peXXigen.c, * pef.c, * plugin.c, * reloc.c,
	* rs6000-core.c, * sco5-core.c, * som.c, * sparclinux.c, * srec.c,
	* stabs.c, * syms.c, * vms-alpha.c, * vms-lib.c, * vms-misc.c,
	* xcofflink.c: Likewise.
 2016-09-30 15:17:44 +09:30
Nick Clifton
d691934d08 Preserve all mapping symbols in ARM and AArch64 object files. 
bfd	* elfnn-aarch64.c (is_aarch64_mapping_symbol): New function.
	Returns TRUE for AArch64 mapping symbols.
	(elfNN_aarch64_backend_symbol_processing): New function.  Marks
	mapping symbols as precious in object files so that they will not
	be stripped.
	(elf_backend_symbol_processing): Define.

	* elf32-arm.c (is_arm_mapping_symbol): New function.  Returns TRUE
	for ARM mapping symbols.
	(elf32_arm_backend_symbol_processing): Make use of the new function.
 2016-06-29 11:17:40 +01:00
H.J. Lu
233cc9c13a Don't generate PLT for IFUNC GOT/pointer reference 
If a backend supports it, PLT entry isn't needed when all references
to a STT_GNU_IFUNC symbols are done via GOT or static function pointers.
For GOT entries, We generate dynamic R_*_GLOB_DAT relocations for
preemptable symbols and R_*_IRELATIVE relocations for non-preemptable
symbols to update them with real function address.  For static pointer
pointers, we generate dynamic pointer relocations and store them in:

1. .rel[a].ifunc section in PIC object.
2. .rel[a].got section in dynamic executable.
3. .rel[a].iplt section in static executable.

We don't allocate GOT entry if it isn't used.

bfd/

	PR ld/20253
	* elf-bfd.h (_bfd_elf_allocate_ifunc_dyn_relocs): Add an
	bfd_boolean argument.
	* elf-ifunc.c (_bfd_elf_create_ifunc_sections): Replace
	"shared object" with "PIC object" in comments.
	(_bfd_elf_allocate_ifunc_dyn_relocs): Updated.  Replace
	"shared object" with "PIC object" in comments.  Avoid PLT if
	requested.  Generate dynamic relocations for non-GOT references.
	Make room for the special first entry in PLT and allocate PLT
	entry only for PLT and PC-relative references.  Store dynamic
	GOT relocations in .rel[a].iplt section for static executables.
	If PLT isn't used, always use GOT for symbol value.  Don't
	allocate GOT entry if it isn't used.
	* elf32-i386.c (elf_i386_check_relocs): Increment PLT reference
	count only in the code section.  Allocate dynamic pointer
	relocation against STT_GNU_IFUNC symbol in the non-code section.
	(elf_i386_adjust_dynamic_symbol): Increment PLT reference count
	only for PC-relative references.
	(elf_i386_allocate_dynrelocs): Pass TRUE to
	_bfd_elf_allocate_ifunc_dyn_relocs.
	(elf_i386_relocate_section): Allow R_386_GOT32/R_386_GOT32X
	relocations against STT_GNU_IFUNC symbols without PLT.  Generate
	dynamic pointer relocation against STT_GNU_IFUNC symbol in
	the non-code section and store it in the proper REL section.
	Don't allow non-pointer relocation against STT_GNU_IFUNC symbol
	without PLT.
	(elf_i386_finish_dynamic_symbol): Generate dynamic
	R_386_IRELATIVE and R_386_GLOB_DAT GOT relocations against
	STT_GNU_IFUNC symbols without PLT.
	(elf_i386_finish_dynamic_sections): Don't handle local
	STT_GNU_IFUNC symbols here.
	(elf_i386_output_arch_local_syms): Handle local STT_GNU_IFUNC
	symbols here.
	(elf_backend_output_arch_local_syms): New.
	* elf32-x86-64.c (elf_i386_check_relocs): Increment PLT reference
	count only in the code section.  Allocate dynamic pointer
	relocation against STT_GNU_IFUNC symbol in the non-code section.
	(elf_x86_64_adjust_dynamic_symbol): Increment PLT reference
	count only for PC-relative references.
	(elf_x86_64_allocate_dynrelocs): Pass TRUE to
	_bfd_elf_allocate_ifunc_dyn_relocs.
	(elf_x86_64_relocate_section): Allow R_X86_64_GOTPCREL,
	R_X86_64_GOTPCRELX, R_X86_64_REX_GOTPCRELX and
	R_X86_64_GOTPCREL64 relocations against STT_GNU_IFUNC symbols
	without PLT.  Generate dynamic pointer relocation against
	STT_GNU_IFUNC symbol in the non-code section and store it in
	the proper RELA section.  Don't allow non-pointer relocation
	against STT_GNU_IFUNC symbol without PLT.
	(elf_x86_64_finish_dynamic_symbol): Generate dynamic
	R_X86_64_IRELATIVE and R_X86_64_GLOB_DAT GOT relocations against
	STT_GNU_IFUNC symbols without PLT.
	(elf_x86_64_finish_dynamic_sections): Don't handle local
	STT_GNU_IFUNC symbols here.
	(elf_x86_64_output_arch_local_syms): Handle local STT_GNU_IFUNC
	symbols here.
	(elf_backend_output_arch_local_syms): New.
	* elfnn-aarch64.c (elfNN_aarch64_allocate_ifunc_dynrelocs):
	Pass FALSE to _bfd_elf_allocate_ifunc_dyn_relocs.

ld/

	PR ld/20253
	* testsuite/ld-i386/i386.exp: Run PR ld/20253 tests.
	* testsuite/ld-i386/no-plt.exp: Likewise.
	* testsuite/ld-x86-64/no-plt.exp: Likewise.
	* testsuite/ld-i386/pr13302.d: Remove .rel.plt section.
	* testsuite/ld-ifunc/ifunc-13-i386.d: Likewise.
	* testsuite/ld-ifunc/ifunc-13-x86-64.d: Likewise.
	* testsuite/ld-ifunc/ifunc-15-i386.d: Likewise.
	* testsuite/ld-ifunc/ifunc-15-x86-64.d: Likewise.
	* testsuite/ld-x86-64/pr13082-5a.d: Likewise.
	* testsuite/ld-x86-64/pr13082-5b.d: Likewise.
	* testsuite/ld-x86-64/pr13082-6a.d: Likewise.
	* testsuite/ld-x86-64/pr13082-6b.d: Likewise.
	* testsuite/ld-i386/pr20244-2a.d: Remove .plt section.
	* testsuite/ld-ifunc/ifunc-21-i386.d: Likewise.
	* testsuite/ld-ifunc/ifunc-21-x86-64.d: Likewise.
	* testsuite/ld-ifunc/ifunc-22-i386.d: Likewise.
	* testsuite/ld-ifunc/ifunc-22-x86-64.d: Likewise.
	* testsuite/ld-i386/pr20244-2b.d: Updated.
	* testsuite/ld-i386/pr20244-2c.d: Likewise.
	* testsuite/ld-ifunc/ifunc-18a-i386.d: Likewise.
	* testsuite/ld-ifunc/ifunc-18a-x86-64.d: Likewise.
	* testsuite/ld-ifunc/ifunc-18b-i386.d: Likewise.
	* testsuite/ld-ifunc/ifunc-18b-x86-64.d: Likewise.
	* testsuite/ld-i386/pr20253-1a.c: New file.
	* testsuite/ld-i386/pr20253-1b.S: Likewise.
	* testsuite/ld-i386/pr20253-1c.S: Likewise.
	* testsuite/ld-i386/pr20253-1d.S: Likewise.
	* testsuite/ld-i386/pr20253-2a.c: Likewise.
	* testsuite/ld-i386/pr20253-2b.S: Likewise.
	* testsuite/ld-i386/pr20253-2c.S: Likewise.
	* testsuite/ld-i386/pr20253-2d.S: Likewise.
	* testsuite/ld-i386/pr20253-3.d: Likewise.
	* testsuite/ld-i386/pr20253-3.s: Likewise.
	* testsuite/ld-i386/pr20253-4.s: Likewise.
	* testsuite/ld-i386/pr20253-4a.d: Likewise.
	* testsuite/ld-i386/pr20253-4b.d: Likewise.
	* testsuite/ld-i386/pr20253-4c.d: Likewise.
	* testsuite/ld-i386/pr20253-5.d: Likewise.
	* testsuite/ld-i386/pr20253-5.s: Likewise.
	* testsuite/ld-ifunc/ifunc-23-x86.s: Likewise.
	* testsuite/ld-ifunc/ifunc-23a-x86.d: Likewise.
	* testsuite/ld-ifunc/ifunc-23b-x86.d: Likewise.
	* testsuite/ld-ifunc/ifunc-23c-x86.d: Likewise.
	* testsuite/ld-ifunc/ifunc-24-x86.s: Likewise.
	* testsuite/ld-ifunc/ifunc-24a-x86.d: Likewise.
	* testsuite/ld-ifunc/ifunc-24b-x86.d: Likewise.
	* testsuite/ld-ifunc/ifunc-24c-x86.d: Likewise.
	* testsuite/ld-ifunc/ifunc-25-x86.s: Likewise.
	* testsuite/ld-ifunc/ifunc-25a-x86.d: Likewise.
	* testsuite/ld-ifunc/ifunc-25b-x86.d: Likewise.
	* testsuite/ld-ifunc/ifunc-25c-x86.d: Likewise.
	* testsuite/ld-x86-64/pr20253-1.s: Likewise.
	* testsuite/ld-x86-64/pr20253-1a.d: Likewise.
	* testsuite/ld-x86-64/pr20253-1b.d: Likewise.
	* testsuite/ld-x86-64/pr20253-1c.d: Likewise.
	* testsuite/ld-x86-64/pr20253-1d.d: Likewise.
	* testsuite/ld-x86-64/pr20253-1e.d: Likewise.
	* testsuite/ld-x86-64/pr20253-1f.d: Likewise.
	* testsuite/ld-x86-64/pr20253-1g.d: Likewise.
	* testsuite/ld-x86-64/pr20253-1h.d: Likewise.
	* testsuite/ld-x86-64/pr20253-1i.d: Likewise.
	* testsuite/ld-x86-64/pr20253-1j.d: Likewise.
	* testsuite/ld-x86-64/pr20253-1k.d: Likewise.
	* testsuite/ld-x86-64/pr20253-1l.d: Likewise.
	* testsuite/ld-x86-64/pr20253-2a.c: Likewise.
	* testsuite/ld-x86-64/pr20253-2b.S: Likewise.
	* testsuite/ld-x86-64/pr20253-2c.S: Likewise.
	* testsuite/ld-x86-64/pr20253-2d.S: Likewise.
	* testsuite/ld-x86-64/pr20253-3.d: Likewise.
	* testsuite/ld-x86-64/pr20253-3.s: Likewise.
	* testsuite/ld-x86-64/pr20253-4.s: Likewise.
	* testsuite/ld-x86-64/pr20253-4a.d: Likewise.
	* testsuite/ld-x86-64/pr20253-4b.d: Likewise.
	* testsuite/ld-x86-64/pr20253-4c.d: Likewise.
	* testsuite/ld-x86-64/pr20253-4d.d: Likewise.
	* testsuite/ld-x86-64/pr20253-4e.d: Likewise.
	* testsuite/ld-x86-64/pr20253-4f.d: Likewise.
	* testsuite/ld-x86-64/pr20253-5.s: Likewise.
	* testsuite/ld-x86-64/pr20253-5a.d: Likewise.
	* testsuite/ld-x86-64/pr20253-5b.d: Likewise.
	* testsuite/ld-ifunc/ifunc-18a-i386.d: Remove extra IRELATIVE
	relocation.
	* testsuite/ld-ifunc/ifunc-18a-x86-64.d: Likewise.
	* testsuite/ld-ifunc/ifunc-18b-i386.d: Likewise.
	* testsuite/ld-ifunc/ifunc-18b-x86-64.d: Likewise.
	* testsuite/ld-ifunc/ifunc-18a.s: Fix a typo.
	* testsuite/ld-x86-64/x86-64.exp: Run pr20253-1 tests.
 2016-06-18 09:17:25 -07:00
Alan Modra
1a72702bb3 Return void from linker callbacks 
The ldmain.c implementation of these linker callback functions always
return true, so any code handling a false return is dead.  What's
more, some of the bfd backends abort if ever a false return is seen,
and there seems to be some confusion in gdb's compile-object-load.c.
The return value was never meant to be "oh yes, a multiple_definition
error occurred", but rather "out of memory or other catastrophic
failure".

This patch removes the status return on the callbacks that always
return true.  I kept the return status for "notice" because that one
does happen to need to return "out of memory".

include/
	* bfdlink.h (struct bfd_link_callbacks): Update comments.
	Return void from multiple_definition, multiple_common,
	add_to_set, constructor, warning, undefined_symbol,
	reloc_overflow, reloc_dangerous and unattached_reloc.
bfd/
	* aoutx.h: Adjust linker callback calls throughout file,
	removing dead code.
	* bout.c: Likewise.
	* coff-alpha.c: Likewise.
	* coff-arm.c: Likewise.
	* coff-h8300.c: Likewise.
	* coff-h8500.c: Likewise.
	* coff-i960.c: Likewise.
	* coff-mcore.c: Likewise.
	* coff-mips.c: Likewise.
	* coff-ppc.c: Likewise.
	* coff-rs6000.c: Likewise.
	* coff-sh.c: Likewise.
	* coff-tic80.c: Likewise.
	* coff-w65.c: Likewise.
	* coff-z80.c: Likewise.
	* coff-z8k.c: Likewise.
	* coff64-rs6000.c: Likewise.
	* cofflink.c: Likewise.
	* ecoff.c: Likewise.
	* elf-bfd.h: Likewise.
	* elf-m10200.c: Likewise.
	* elf-m10300.c: Likewise.
	* elf32-arc.c: Likewise.
	* elf32-arm.c: Likewise.
	* elf32-avr.c: Likewise.
	* elf32-bfin.c: Likewise.
	* elf32-cr16.c: Likewise.
	* elf32-cr16c.c: Likewise.
	* elf32-cris.c: Likewise.
	* elf32-crx.c: Likewise.
	* elf32-d10v.c: Likewise.
	* elf32-epiphany.c: Likewise.
	* elf32-fr30.c: Likewise.
	* elf32-frv.c: Likewise.
	* elf32-ft32.c: Likewise.
	* elf32-h8300.c: Likewise.
	* elf32-hppa.c: Likewise.
	* elf32-i370.c: Likewise.
	* elf32-i386.c: Likewise.
	* elf32-i860.c: Likewise.
	* elf32-ip2k.c: Likewise.
	* elf32-iq2000.c: Likewise.
	* elf32-lm32.c: Likewise.
	* elf32-m32c.c: Likewise.
	* elf32-m32r.c: Likewise.
	* elf32-m68hc1x.c: Likewise.
	* elf32-m68k.c: Likewise.
	* elf32-mep.c: Likewise.
	* elf32-metag.c: Likewise.
	* elf32-microblaze.c: Likewise.
	* elf32-moxie.c: Likewise.
	* elf32-msp430.c: Likewise.
	* elf32-mt.c: Likewise.
	* elf32-nds32.c: Likewise.
	* elf32-nios2.c: Likewise.
	* elf32-or1k.c: Likewise.
	* elf32-ppc.c: Likewise.
	* elf32-s390.c: Likewise.
	* elf32-score.c: Likewise.
	* elf32-score7.c: Likewise.
	* elf32-sh.c: Likewise.
	* elf32-sh64.c: Likewise.
	* elf32-spu.c: Likewise.
	* elf32-tic6x.c: Likewise.
	* elf32-tilepro.c: Likewise.
	* elf32-v850.c: Likewise.
	* elf32-vax.c: Likewise.
	* elf32-visium.c: Likewise.
	* elf32-xstormy16.c: Likewise.
	* elf32-xtensa.c: Likewise.
	* elf64-alpha.c: Likewise.
	* elf64-hppa.c: Likewise.
	* elf64-ia64-vms.c: Likewise.
	* elf64-mmix.c: Likewise.
	* elf64-ppc.c: Likewise.
	* elf64-s390.c: Likewise.
	* elf64-sh64.c: Likewise.
	* elf64-x86-64.c: Likewise.
	* elflink.c: Likewise.
	* elfnn-aarch64.c: Likewise.
	* elfnn-ia64.c: Likewise.
	* elfxx-mips.c: Likewise.
	* elfxx-sparc.c: Likewise.
	* elfxx-tilegx.c: Likewise.
	* linker.c: Likewise.
	* pdp11.c: Likewise.
	* pe-mips.c: Likewise.
	* reloc.c: Likewise.
	* reloc16.c: Likewise.
	* simple.c: Likewise.
	* vms-alpha.c: Likewise.
	* xcofflink.c: Likewise.
	* elf32-rl78.c (get_symbol_value, get_romstart, get_ramstart): Delete
	status param.  Adjust calls to these and linker callbacks throughout.
	* elf32-rx.c: (get_symbol_value, get_gp, get_romstart,
	get_ramstart): Delete status param.  Adjust calls to these and
	linker callbacks throughout.
ld/
	* ldmain.c (multiple_definition, multiple_common, add_to_set,
	constructor_callback, warning_callback, undefined_symbol,
	reloc_overflow, reloc_dangerous, unattached_reloc): Return void.
	* emultempl/elf32.em: Adjust callback calls.
gdb/
	* compile/compile-object-load.c (link_callbacks_multiple_definition,
	link_callbacks_warning, link_callbacks_undefined_symbol,
	link_callbacks_undefined_symbol, link_callbacks_reloc_overflow,
	link_callbacks_reloc_dangerous,
	link_callbacks_unattached_reloc): Return void.
 2016-05-28 11:17:20 +09:30
Jim Wilson
b7f28d873c Enable R_AARCH64_NONE for 64-bit code. 
* elfnn-aarch64.c: Unconditionally enable R_AARCH64_NULL and
	R_AARCH64_NONE.  Use HOWTO64 for R_AARCH64_NULL.
	* relocs.c: Add BFD_RELOC_AARCH64_NULL.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Likewise.
 2016-05-23 16:38:21 -07:00
Alan Modra
4ade44b727 Set dynamic tag VMA and size from dynamic section when possible 
Rather than searching the output for a specific named section, it's
better, where possible, to use a linker created dynamic section to set
a dynamic tag's value.  That way ld doesn't depend on the output
section name, making it possibile to map dynamic sections differently.

bfd/
	* elf-m10300.c (_bfd_mn10300_elf_finish_dynamic_sections): Use
	linker dynamic sections in calculating size and address of
	* dynamic tags rather than using output sections.  Remove asserts.
	* elf32-arm.c (elf32_arm_finish_dynamic_sections): Likewise.
	* elf32-cr16.c (_bfd_cr16_elf_finish_dynamic_sections): Likewise.
	* elf32-cris.c (elf_cris_finish_dynamic_sections): Likewise.
	* elf32-i370.c (i370_elf_finish_dynamic_sections): Likewise.
	* elf32-lm32.c (lm32_elf_finish_dynamic_sections): Likewise.
	* elf32-m32r.c (m32r_elf_finish_dynamic_sections): Likewise.
	* elf32-m68k.c (elf_m68k_finish_dynamic_sections): Likewise.
	* elf32-metag.c (elf_metag_finish_dynamic_sections): Likewise.
	* elf32-microblaze.c (microblaze_elf_finish_dynamic_sections): Likewise.
	* elf32-nds32.c (nds32_elf_finish_dynamic_sections): Likewise.
	* elf32-nios2.c (nios2_elf32_finish_dynamic_sections): Likewise.
	* elf32-or1k.c (or1k_elf_finish_dynamic_sections): Likewise.
	* elf32-s390.c (elf_s390_finish_dynamic_sections): Likewise.
	* elf32-score.c (s3_bfd_score_elf_finish_dynamic_sections): Likewise.
	* elf32-score7.c (s7_bfd_score_elf_finish_dynamic_sections): Likewise.
	* elf32-vax.c (elf_vax_finish_dynamic_sections): Likewise.
	* elf32-xtensa.c (elf_xtensa_finish_dynamic_sections): Likewise.
	* elf64-alpha.c (elf64_alpha_finish_dynamic_sections): Likewise.
	* elf64-s390.c (elf_s390_finish_dynamic_sections): Likewise.
	* elf64-sh64.c (sh64_elf64_finish_dynamic_sections): Likewise.
	* elflink.c (bfd_elf_final_link): Likewise.
	* elfxx-mips.c (_bfd_mips_elf_finish_dynamic_sections): Likewise.
	* elfxx-sparc.c (sparc_finish_dyn): Likewise.  Adjust error message.
	* elf32-arc.c (GET_SYMBOL_OR_SECTION): Remove ASSERT arg and
	don't set doit.  Look up dynobj section.
	(elf_arc_finish_dynamic_sections): Adjust GET_SYMBOL_OR_SECTION
	invocation and dynamic tag vma calculation.  Don't test
	boolean var == TRUE.
	* elfnn-aarch64.c (elfNN_aarch64_finish_dynamic_sections): Fix
	DT_JMPREL calc.
ld/
	* testsuite/ld-arm/arm-elf.exp: Adjust for arm-no-rel-plt now passing.
	Use different output file name for static app without .rel.plt.
	* testsuite/ld-arm/arm-no-rel-plt.ld: Align .rel.dyn and .rela.dyn.
	* testsuite/ld-arm/arm-no-rel-plt.out: Delete.
	* testsuite/ld-arm/arm-no-rel-plt.r: New.
	* testsuite/ld-arm/arm-static-app.d: Don't check file name.
	* testsuite/ld-arm/arm-static-app.r: Likewise.
 2016-05-13 14:34:45 +09:30
Jiong Wang
4e7fbb34f0 [AArch64] Remove redundant tls relax in elfNN_aarch64_final_link_relocate 
bfd/
  * elfnn-aarch64.c (elfNN_aarch64_final_link_relocate): Remove redundant
  aarch64_tls_transition check.
 2016-05-11 11:55:02 +01:00
Jiong Wang
1f56df9d0d [AArch64] Also puts value in place for R_AARCH64_RELATIVE 
When handling absolute relocations for global symbols bind within the
shared object, AArch64 will generate one dynamic RELATIVE relocation,
but won't apply the value for this absolution relocations at static
linking stage. This is different from AArch64 gold linker and x86-64.

This is not a bug as AArch64 is RELA, there is only guarantee that
relocation addend is placed in the relocation entry.  But some
system softwares originally writen for x86-64 might assume AArch64
bfd linker gets the same behavior as x86-64, then they could take
advantage of this buy skipping those RELATIVE dynamic relocations
if the load address is the same as the static linking address.

This patch makes AArch64 BFD linker applies absolution relocations at
static linking stage for scenario described above.  Meanwhile old AArch64
android loader has a bug (PR19163) which relies on current linker behavior
as a workaround, so the same option --no-apply-dynamic-relocs added.
 2016-05-03 11:59:37 +01:00
H.J. Lu
2df3368d85 Properly handle dynamic reloc against normal symbol 
We shouldn't issue an error for read-only segment with dynamic IFUNC
relocations when dynamic relocations are against normal symbols.

bfd/

	PR ld/19939
	* elf-bfd.h (_bfd_elf_allocate_ifunc_dyn_relocs): Add a pointer
	to bfd_boolean.
	* elf-ifunc.c (_bfd_elf_allocate_ifunc_dyn_relocs): Updated.
	Set *readonly_dynrelocs_against_ifunc_p to TRUE if dynamic reloc
	applies to read-only section.
	* elf32-i386.c (elf_i386_link_hash_table): Add
	readonly_dynrelocs_against_ifunc.
	(elf_i386_allocate_dynrelocs): Updated.
	(elf_i386_size_dynamic_sections): Issue an error for read-only
	segment with dynamic IFUNC relocations only if
	readonly_dynrelocs_against_ifunc is TRUE.
	* elf64-x86-64.c (elf_x86_64_link_hash_table): Add
	readonly_dynrelocs_against_ifunc.
	(elf_x86_64_allocate_dynrelocs): Updated.
	(elf_x86_64_size_dynamic_sections): Issue an error for read-only
	segment with dynamic IFUNC relocations only if
	readonly_dynrelocs_against_ifunc is TRUE.
	* elfnn-aarch64.c (elfNN_aarch64_allocate_ifunc_dynrelocs):
	Updated.

ld/

	PR ld/19939
	* testsuite/ld-i386/i386.exp: Run PR ld/19939 tests.
	* testsuite/ld-x86-64/x86-64.exp: Likewise.
	* testsuite/ld-i386/pr19939.s: New file.
	* testsuite/ld-i386/pr19939a.d: Likewise.
	* testsuite/ld-i386/pr19939b.d: Likewise.
	* testsuite/ld-x86-64/pr19939.s: Likewise.
	* testsuite/ld-x86-64/pr19939a.d: Likewise.
	* testsuite/ld-x86-64/pr19939b.d: Likewise.
 2016-04-11 19:41:52 -07:00
Jiong Wang
18f822a08f [AArch64] Create .got section if _GLOBAL_OFFSET_TABLE_ referenced 
2016-03-07  Jiong Wang  <jiong.wang@arm.com>

bfd/
  * elfnn-aarch64.c (elfNN_aarch64_check_relocs): Always create .got section
  if the symbol "_GLOBAL_OFFSET_TABLE_" referenced.

ld/
  * testsuite/ld-aarch64/implicit_got_section_1.s: New test source file.
  * testsuite/ld-aarch64/implicit_got_section_1.d: New test expected result.
  * testsuite/ld-aarch64/aarch64-elf.exp: Run new test.
 2016-03-07 15:40:50 +00:00
Renlin Li
c5e3a3641e [BFD][AARCH64]Fix MOVW_SABS_G(0,1,2) relocation overflow check. 
For these three relocations, 17 bit signed value should be used, instead of
16 bit. The bitsize field is changed from 16 to 17, this field in aarch64
backend is used for overflow check only.

bfd/

2016-02-26  Renlin Li  <renlin.li@arm.com>

    * elfnn-aarch64.c (elfNN_aarch64_howto_table): Fix signed overflow
    check for MOVW_SABS_G0, MOVW_SABS_G1, MOVW_SABS_G2.

ld/

2016-02-26  Renlin Li  <renlin.li@arm.com>

    * testsuite/ld-aarch64/aarch64-elf.exp: Run new testcases.
    * testsuite/ld-aarch64/emit-relocs-270.d: Update to use new boundary.
    * testsuite/ld-aarch64/emit-relocs-271.d: Likewise.
    * testsuite/ld-aarch64/emit-relocs-272.d: Likewise.
    * testsuite/ld-aarch64/emit-relocs-270-overflow.d: New.
    * testsuite/ld-aarch64/emit-relocs-270-overflow.s: New.
    * testsuite/ld-aarch64/emit-relocs-271-overflow.d: New.
    * testsuite/ld-aarch64/emit-relocs-271-overflow.s: New.
    * testsuite/ld-aarch64/emit-relocs-272-overflow.d: New.
    * testsuite/ld-aarch64/emit-relocs-272-overflow.s: New.
 2016-02-26 18:00:15 +00:00
Renlin Li
92d77487b3 Revert "ABS32" 
This reverts commit 30bdf5c82e.
 2016-02-24 15:01:07 +00:00
Renlin Li
30bdf5c82e ABS32 2016-02-24 14:01:48 +00:00
Jiong Wang
9a22846790 [AArch64] Remove redundant calculation of plt stub destination for veneer 
elfNN_aarch64_size_stubs, the caller of aarch64_type_stub has redirected
the final destination of long branch veneer to plt stub if the call
should go through it.

It's redundant to do the same check and redirect again from scratch
inside aarch64_type_stub.

bfd/
  * elfnn-aarch64. (aarch64_type_of_stub): Remove redundation calcuation
  for destination.  Remove useless function parameters.
  (elfNN_aarch64_size_stubs): Update parameters for aarch64_type_of_stub.
 2016-02-22 12:16:06 +00:00
Nick Clifton
027e9c750c Add a more helpful warning message to explain why some AArch64 relocations can overflow. 
bfd	* elfnn-aarch64.c (elfNN_aarch64_relocate_section): Add a more
	helpful warning message to explain why certain AArch64 relocs
	might overflow.

ld	* testsuite/ld-aarch64/reloc-overflow-bad.d: New test.
	* testsuite/ld-aarch64/reloc-overflow-1.s: New source file.
	* testsuite/ld-aarch64/reloc-overflow-2.s: New source file.
	* testsuite/ld-aarch64/aarch64-elf.exp: Run the new test.
 2016-02-09 10:47:54 +00:00
Walfred Tedeschi
0635c87593 Revert "Add a more helpful warning message to explain why some AArch64 relocations can overflow." 
This reverts commit 2ea53e0031.
 2016-02-09 11:36:15 +01:00
Nick Clifton
2ea53e0031 Add a more helpful warning message to explain why some AArch64 relocations can overflow. 
bfd	* elfnn-aarch64.c (elfNN_aarch64_relocate_section): Add a more
	helpful warning message to explain why certain AArch64 relocs
	might overflow.

ld	* testsuite/ld-aarch64/reloc-overflow-bad.d: New test.
	* testsuite/ld-aarch64/reloc-overflow-1.s: New source file.
	* testsuite/ld-aarch64/reloc-overflow-2.s: New source file.
	* testsuite/ld-aarch64/aarch64-elf.exp: Run the new test.
 2016-02-09 09:56:21 +00:00
Jiong Wang
2f340668a9 [AArch64] Relax long branch veneer insertion for non STT_FUNC symbol 
As defined at AArch64 ELF Specification (4.6.7 Call and Jump
  relocations), symbol with type of non STT_FUNC but in different input
  section with relocation place should insert long branch veneer also.

  Meanwhile the current long branch veneer infrastructure havn't considered
  the situation where the branch destination is "sym_value + rela->addend".

  This was OK because we only insert veneer for long call destination is
  STT_FUNC symbol for which the addend is always zero. But as we relax the
  support to other situations by this patch, we need to handle addend be
  non-zero value. For example, for static function, relocation against
  "local symbol" are turned into relocation against "section symbol + offset"
  where there is a valid addend.

  bfd/
	* elfnn-aarch64.c (aarch64_type_of_stub): Allow insert long branch
	veneer for sym_sec != input_sec.
	(elfNN_aarch64_size_stub): Support STT_SECTION symbol.
	(elfNN_aarch64_final_link_relocate): Take rela addend into account when
	calculation destination.

  ld/
	* testsuite/ld-aarch64/farcall-section.d: Delete.
	* testsuite/ld-aarch64/farcall-section.s: Delete.
	* testsuite/ld-aarch64/farcall-b-section.d: New expectation file.
	* testsuite/ld-aarch64/farcall-bl-section.d: Likewise.
	* testsuite/ld-aarch64/farcall-b-section.s: New testcase.
	* testsuite/ld-aarch64/farcall-bl-section.s: Likewise.
	* testsuite/ld-aarch64/aarch64-elf.exp: Likewise.
 2016-01-21 09:57:09 +00:00
Alan Modra
6f2750feaf Copyright update for binutils 2016-01-01 23:00:01 +10:30
Marcus Shawcroft
06d2788cef Revert "[LD][AARCH64]Add TLSIE relaxation support under large memory model." 
This reverts commit 3ebe65c0ff.

Reverted due to PR19188
 2015-11-12 15:16:40 +00:00
Ed Schouten
a75cf613fd Add support for AArch64 CloudABI binaries. 
ld	* Makefile.am (ALL_64_EMULATION_SOURCES): Add support for
	CloudABI on aarch64. For this target we have to make sure we use
	ELFOSABI_CLOUDABI instead of ELFOSABI_NONE.
	* configure.tgt (targ_emul): Likewise.
	* emulparams/aarch64cloudabi.sh: New file.
	* emulparams/aarch64cloudabib.sh: New file.
	* Makefile.in: Regenerate.

bfd	* config.bfd (targ_defvec): Add support for CloudABI on aarch64.
	For this target we have to make sure we use ELFOSABI_CLOUDABI
	instead of ELFOSABI_NONE.
	* configure.ac (tb): Likewise.
	* elfnn-aarch64.c: Likewise.
	* targets.c (_bfd_target_vector): Likewise.
	* configure: Regenerate.

gas	* config/tc-aarch64.c (elf64_aarch64_target_format): Select the
	cloudabi format if the TARGET_OS is cloudabi.
 2015-10-29 13:49:03 +00:00
Renlin Li
3ebe65c0ff [LD][AARCH64]Add TLSIE relaxation support under large memory model. 
bfd/
2015-10-02  Renlin Li <renlin.li@arm.com>

	* elfnn-aarch64.c (IS_AARCH64_TLS_RELAX_RELOC): Add
	TLSIE_MOVW_GOTTPREL_G1.
	(aarch64_tls_transition_without_check): Add
	TLSIE_MOVW_GOTTPREL_G1 to TLSLE_MOVW_TPREL_G2
	transition for local symbol.
	(elfNN_aarch64_tls_relax): Add a argument to pass tp offset.
	Add TLSIE_MOVW_GOTTPREL_G1 relaxation.
	(elfNN_aarch64_relocate_section): Call elfNN_aarch64_tls_relax
	with new argument.

ld/testsuite/
2015-10-02  Renlin Li <renlin.li@arm.com>

	* ld-aarch64/aarch64-elf.exp (tls-relax-large-le-ie): Run new test.
	* ld-aarch64/tls-relax-large-ie-le.d: New.
	* ld-aarch64/tls-relax-large-ie-le.s: New.
 2015-10-02 17:56:09 +01:00
Renlin Li
0484b4549e [LD][AARCH64]Add TLSDESC support for large memory model. 
bfd/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* elfnn-aarch64.c (aarch64_tls_transition_without_check):  Add
	relax transitions for TLSDESC_ADD, TLSDESC_LDR, TLSDESC_OFF_G0_NC,
	TLSDESC_OFF_G1.
	(aarch64_tls_transition_without_check): Add relaxation support.
	(aarch64_reloc_got_type): Add support.
	(elfNN_aarch64_final_link_relocate): Likewise.
	(elfNN_aarch64_tls_relax): Likewise.
	(elfNN_aarch64_relocate_section): Likewise.
	(elfNN_aarch64_gc_sweep_hook): Likewise.
	(elfNN_aarch64_check_relocs): Likewise.
	* elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise.
	(_bfd_aarch64_elf_resolve_relocation): Likewise.

ld/testsuite/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* ld-aarch64/aarch64-elf.exp: Run new test.
	* ld-aarch64/tls-large-desc.d: New.
	* ld-aarch64/tls-large-desc.s: New.
	* ld-aarch64/tls-relax-large-desc-ie.d: New.
	* ld-aarch64/tls-relax-large-desc-ie.s: New.
	* ld-aarch64/tls-relax-large-desc-le.d: New.
	* ld-aarch64/tls-relax-large-desc-le.s: New.
 2015-10-02 17:56:09 +01:00
Renlin Li
43a357f99f [GAS][AARCH64]Add TLSDESC large memory model support. 
bfd/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* elfnn-aarch64.c (elfNN_aarch64_howto_table): Check overflow for
	BFD_RELOC_AARCH64_TLSDESC_OFF_G1.

gas/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* config/tc-aarch64.c (s_tlsdescadd): New.
	(s_tlsdescldr): New.
	(md_pseudo_table): Handle tlsdescadd and tlsdescldr pseudo ops.
	(reloc_table): Add entries for BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC and
	BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC.
	(process_movw_reloc_info): Support AARCH64_TLSDESC_OFF_G1 and
	    AARCH64_TLSDESC_OFF_G0_NC.
	(md_apply_fix): Likewise.
	(aarch64_force_relocation): Likewise.

gas/testsuite/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* gas/aarch64/reloc-tlsdesc_off_g0_nc.d: New.
	* gas/aarch64/reloc-tlsdesc_off_g0_nc.s: New.
	* gas/aarch64/reloc-tlsdesc_off_g1.d: New.
	* gas/aarch64/reloc-tlsdesc_off_g1.s: New.
	* gas/aarch64/tls-desc.d: New.
	* gas/aarch64/tls-desc.s: New.
 2015-10-02 17:56:09 +01:00
Renlin Li
ac73473248 [BFD][AARCH64]Add TLSGD relaxation support under large memory model. 
bfd/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* elfnn-aarch64.c(IS_AARCH64_TLS_RELAX_RELOC):
	Add relaxation support for TLSGD_MOVW_G0_NC and TLSGD_MOVW_G1.
	(aarch64_tls_transition_without_check): Likewise
	(elfNN_aarch64_tls_relax): Likwise.

ld/testsuite/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* ld-aarch64/aarch64-elf.exp: run new test
	* ld-aarch64/tls-relax-large-gd-ie.d: New.
	* ld-aarch64/tls-relax-large-gd-ie.s: New.
	* ld-aarch64/tls-relax-large-gd-le.d: New.
	* ld-aarch64/tls-relax-large-gd-le.s: New.
 2015-10-02 17:56:09 +01:00
Renlin Li
b7a944fea3 [BFD][AARCH64]Create GOT section for TLSLE_MOVW_TPREL_G(1, 1_NC, 2). 
bfd/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* elfnn-aarch64.c (elfNN_aarch64_check_relocs): Create GOT section
	for TLSLE_MOVW_TPREL_G(1, 1_NC, 2) relocation.
 2015-10-02 17:56:09 +01:00
Renlin Li
3b957e5b07 [Binutils][AARCH64]Add TLS IE large memory support. 
bfd/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* reloc.c: Make AARCH64_TLSIE_MOVW_GOTTPREL_G1 and
	AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC defined in alphabetical order.
	* libbfd.h: Regenerate.
	* bfd-in2.h: Likewise.
	* elfnn-aarch64.c (elfNN_aarch64_howto_table): Make
	TLSIE_MOVW_GOTTPREL_G1 check overflow.
	(aarch64_reloc_got_type): Add support for TLSIE_MOVW_GOTTPREL_G1
	and TLSIE_MOVW_GOTTPREL_G0_NC.
	(elfNN_aarch64_final_link_relocate): Likewise.
	(elfNN_aarch64_relocate_section): Likewise.
	(elfNN_aarch64_gc_sweep_hook): Likewise.
	(elfNN_aarch64_check_relocs): Likewise.
	* elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise.
	(_bfd_aarch64_elf_resolve_relocation): Likewise.

gas/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* config/tc-aarch64.c (reloc_table): Add two entries for
	gottprel_g0_nc and gottprel_g1.
	(process_movw_reloc_info): Add support.
	(md_apply_fix): Likewise.
	(aarch64_force_relocation): Likewise.

gas/testsuite/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* gas/aarch64/reloc-gottprel_g0_nc.d: New.
	* gas/aarch64/reloc-gottprel_g0_nc.s: New.
	* gas/aarch64/reloc-gottprel_g1.d: New.
	* gas/aarch64/reloc-gottprel_g1.s: New.

ld/testsuite/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* ld-aarch64/tls-large-ie.d: New.
	* ld-aarch64/tls-large-ie.s: New.
	* ld-aarch64/aarch64-elf.exp: Run new test.
 2015-10-02 17:56:08 +01:00
Renlin Li
7ba7cfe431 [LD][AARCH64]Add BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC support. 
bfd/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* elfnn-aarch64.c (aarch64_reloc_got_type): Add
	BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC support.
	(elfNN_aarch64_final_link_relocate): Likewise.
	(elfNN_aarch64_relocate_section): Likewise.
	(elfNN_aarch64_gc_sweep_hook): Likewise.
	(elfNN_aarch64_check_relocs): Likewise.
	* elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise.
	(_bfd_aarch64_elf_resolve_relocation): Likewise.

ld/testsuite/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* ld-aarch64/emit-relocs-516.d: New.
	* ld-aarch64/emit-relocs-516.s: New.
	* ld-aarch64/aarch64-elf.exp: Run new test.
 2015-10-02 17:56:08 +01:00
Renlin Li
3e8286c0d2 [GAS][AARCH64]Add BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC support. 
bfd/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* reloc.c (BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC): New entry.
	* elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for
	BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC.
	* libbfd.h: Regenerate.
	* bfd-in2.h: Likewise

gas/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* config/tc-aarch64.c (reloc_table): New relocation modifier tlsgd_g0_nc.
	(process_movw_reloc_info): Support BFD_RELOC_AARCH64_TLSGD_MOVW_G1.
	(md_apply_fix): Likewise.
	(aarch64_force_relocation): Likewise.

gas/testsuite/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* gas/aarch64/reloc-tlsgd_g0_nc.d: New.
	* gas/aarch64/reloc-tlsgd_g0_nc.s: New.
 2015-10-02 17:56:08 +01:00
Renlin Li
94facae337 [LD][AARCH64]Add BFD_RELOC_AARCH64_TLSGD_MOVW_G1 support. 
bfd/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* elfnn-aarch64.c (aarch64_reloc_got_type): Add
	BFD_RELOC_AARCH64_TLSGD_MOVW_G1 support.
	(elfNN_aarch64_final_link_relocate): Likewise.
	(elfNN_aarch64_relocate_section): Likewise.
	(elfNN_aarch64_gc_sweep_hook): Likewise.
	(elfNN_aarch64_check_relocs): Likewise.
	* elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise.
	(_bfd_aarch64_elf_resolve_relocation): Likewise.

ld/testsuite

2015-10-02  Renlin Li <renlin.li@arm.com>

	* ld-aarch64/emit-relocs-515.d: New.
	* ld-aarch64/emit-relocs-515.s: New.
	* ld-aarch64/aarch64-elf.exp: Run new test.
 2015-10-02 17:56:08 +01:00
Renlin Li
1aa66fb152 [GAS][AARCH64]Add BFD_RELOC_AARCH64_TLSGD_MOVW_G1 support. 
bfd/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* reloc.c (BFD_RELOC_AARCH64_TLSGD_MOVW_G1): New entry.
	* elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for
	BFD_RELOC_AARCH64_TLSGD_MOVW_G1.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Likewise.

gas/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* config/tc-aarch64.c (reloc_table): New relocation modifier tlsgd_g1.
	(process_movw_reloc_info): Support BFD_RELOC_AARCH64_TLSGD_MOVW_G1.
	(md_apply_fix): Likewise.
	(aarch64_force_relocation): Likewise.

gas/testsuite/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* gas/aarch64/reloc-tlsgd_g1.s: New.
	* gas/aarch64/reloc-tlsgd_g1.s: New.
 2015-10-02 17:56:08 +01:00
Renlin Li
dc8008f508 [LD][AARCH64]Add BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC Support. 
bfd/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* elfnn-aarch64.c (aarch64_reloc_got_type): Add
	BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC support.
	(elfNN_aarch64_final_link_relocate): Likewise.
	(elfNN_aarch64_gc_sweep_hook): Likewise.
	(elfNN_aarch64_check_relocs): Likewise.
	* elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise.
	(_bfd_aarch64_elf_resolve_relocation): Likewise.

ld/testsuite/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* ld-aarch64/aarch64-elf.exp: Run new test.
	* ld-aarch64/emit-relocs-301.d: New.
	* ld-aarch64/emit-relocs-301.s: New.
 2015-10-02 17:56:07 +01:00
Renlin Li
ca632371ce [GAS][AARCH64]Add BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC Support. 
bfd/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* reloc.c (BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC): New.
	* elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry
	MOVW_GOTOFF_G0_NC.
	* libbfd.h: Regnerate.
	* bfd-in2.h: Regenerate.

gas/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* config/tc-aarch64.c (reloc_table): New relocation modifier
	gotoff_g0_nc.
	(process_movw_reloc_info): Support gotoff_g0_nc.
	(md_apply_fix): Likewise.

gas/testsuite/

2015-10-02  Renlin Li <renlin.li@arm.com>

	* gas/aarch64/reloc-gotoff_g0_nc.s: New.
	* gas/aarch64/reloc-gotoff_g0_nc.d: New.
 2015-10-02 17:56:07 +01:00
Renlin Li
74a1bfe1d6 [LD][AARCH64]Add BFD_RELOC_AARCH64_MOVW_GOTOFF_G1 Support. 
bfd/

2015-10-02  Renlin Li  <renlin.li@arm.com>

	* elfnn-aarch64.c (aarch64_reloc_got_type): Add support
	for BFD_RELOC_AARCH64_MOVW_GOTOFF_G1.
	(elfNN_aarch64_gc_sweep_hook): Likewise.
	(elfNN_aarch64_check_relocs): Likewise
	* elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise.
	(_bfd_aarch64_elf_resolve_relocation): Likewise
	(elfNN_aarch64_final_link_relocate): Calculate offset within GOT.

ld/testsuite/

2015-10-02  Renlin Li  <renlin.li@arm.com>

	* ld-aarch64/emit-relocs-302.d: New.
	* ld-aarch64/emit-relocs-302.s: New.
	* ld-aarch64/aarch64-elf.exp: Run the new test.
 2015-10-02 17:56:07 +01:00
Renlin Li
654248e7f7 [GAS][AARCH64]Add BFD_RELOC_AARCH64_MOVW_GOTOFF_G1 Support. 
bfd/

2015-10-02  Renlin Li  <renlin.li@arm.com>

	* reloc.c (BFD_RELOC_AARCH64_MOVW_GOTOFF_G1): New.
	* elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for
	MOVW_GOTOFF_G1.
	* libbfd.h: Regenerate.
	* bfd-in2.h: Regenerate.

gas/

2015-10-02  Renlin Li  <renlin.li@arm.com>

	* config/tc-aarch64.c (reloc_table): New relocation modifier
	gotoff_g1.
	(process_movw_reloc_info): Support newly added modifier.
	(md_apply_fix): Likewise.

gas/testsuite/

2015-10-02  Renlin Li  <renlin.li@arm.com>

	* gas/aarch64/reloc-gotoff_g1.s: New.
	* gas/aarch64/reloc-gotoff_g1.d: New.
 2015-10-02 17:56:07 +01:00
Renlin Li
a2e1db00c7 [LD][AARCH64]Add BFD_RELOC_AARCH64_LD64_GOTOFF_LO15 Support. 
bfd/

2015-10-02  Renlin Li  <renlin.li@arm.com>

	* elfnn-aarch64.c (aarch64_reloc_got_type): Add
	BFD_RELOC_AARCH64_LD_64_GOTOFF_LO15 support.
	(elfNN_aarch64_gc_sweep_hook): Likewise.
	(elfNN_aarch64_check_relocs): Likewise
	* elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise.
	(_bfd_aarch64_elf_resolve_relocation): Likewise
	(elfNN_aarch64_final_link_relocate): Calculate offset within GOT.

ld/testsuite/

2015-10-02  Renlin Li  <renlin.li@arm.com>

	* ld-aarch64/emit-relocs-310.d: New.
	* ld-aarch64/emit-relocs-310.s: New.
	* ld-aarch64/aarch64-elf.exp: Run the test.
 2015-10-02 17:56:07 +01:00
Renlin Li
a0becb8948 [BFD][AARCH64]Refactor to facilitate further large memory model support patches. 
bfd/

2015-10-02  Renlin Li  <renlin.li@arm.com>

	* elfnn-aarch64.c (elfNN_aarch64_final_link_relocate): Change if to
	switch statement.
 2015-10-02 17:56:07 +01:00
Renlin Li
73524045d3 [BFD][AARCH64]Emit single AARCH64_MAP_INSN symbol for the whole plt. 
bfd/

2015-10-01  Renlin Li  <renlin.li@arm.com>

	* elfnn-aarch64.c (elfNN_aarch64_output_plt_map): Remove.
	(elfNN_aarch64_output_arch_local_syms): Emit AARCH64_MAP_INSN once.

ld/testsuite/

2015-10-01  Renlin Li  <renlin.li@arm.com>

	* ld-aarch64/plt_mapping_symbol.d: New.
	* ld-aarch64/plt_mapping_symbol.s: New.
	* ld-aarch64/aarch64-elf.exp: Run the new test.
 2015-10-01 14:27:56 +01:00
Rich Felker
9b8b325a1f Add --no-dynamic-linker option to ld, for static PIE use 
Inhibits output of .interp section in ELF executables.

include/
	* bfdlink.h (struct bfd_link_info): Add "nointerp" field.
bfd/
	* elflink.c (_bfd_elf_link_create_dynamic_sections): Don't create
	.interp when info->nointerp.
	(bfd_elf_size_dynamic_sections): Adjust assert.
	* elf32-arm.c (elf32_arm_size_dynamic_sections): Don't size .interp
	when info->nointerp.
	* elf32-bfin.c (elf32_bfinfdpic_size_dynamic_sections): Likewise.
	* elf32-cr16.c (_bfd_cr16_elf_size_dynamic_sections): Likewise.
	* elf32-cris.c (elf_cris_size_dynamic_sections): Likewise.
	* elf32-frv.c (elf32_frvfdpic_size_dynamic_sections): Likewise.
	* elf32-hppa.c (elf32_hppa_size_dynamic_sections): Likewise.
	* elf32-i370.c (i370_elf_size_dynamic_sections): Likewise.
	* elf32-i386.c (elf_i386_size_dynamic_sections): Likewise.
	* elf32-lm32.c (lm32_elf_size_dynamic_sections): Likewise.
	* elf32-m32r.c (m32r_elf_size_dynamic_sections): Likewise.
	* elf32-m68k.c (elf_m68k_size_dynamic_sections): Likewise.
	* elf32-metag.c (elf_metag_size_dynamic_sections): Likewise.
	* elf32-nds32.c (nds32_elf_size_dynamic_sections): Likewise.
	* elf32-nios2.c (nios2_elf32_size_dynamic_sections): Likewise.
	* elf32-or1k.c (or1k_elf_size_dynamic_sections): Likewise.
	* elf32-ppc.c (ppc_elf_size_dynamic_sections): Likewise.
	* elf32-s390.c (elf_s390_size_dynamic_sections): Likewise.
	* elf32-score.c (s3_bfd_score_elf_size_dynamic_sections): Likewise.
	* elf32-score7.c (s7_bfd_score_elf_size_dynamic_sections): Likewise.
	* elf32-sh.c (sh_elf_size_dynamic_sections): Likewise.
	* elf32-tic6x.c (elf32_tic6x_size_dynamic_sections): Likewise.
	* elf32-tilepro.c (tilepro_elf_size_dynamic_sections): Likewise.
	* elf32-vax.c (elf_vax_size_dynamic_sections): Likewise.
	* elf32-xtensa.c (elf_xtensa_size_dynamic_sections): Likewise.
	* elf64-alpha.c (elf64_alpha_size_dynamic_sections): Likewise.
	* elf64-hppa.c (elf64_hppa_size_dynamic_sections): Likewise.
	* elf64-ppc.c (ppc64_elf_size_dynamic_sections): Likewise.
	* elf64-s390.c (elf_s390_size_dynamic_sections): Likewise.
	* elf64-sh64.c (sh64_elf64_size_dynamic_sections): Likewise.
	* elf64-x86-64.c (elf_x86_64_size_dynamic_sections): Likewise.
	* elfnn-aarch64.c (elfNN_aarch64_size_dynamic_sections): Likewise.
	* elfnn-ia64.c (elfNN_ia64_size_dynamic_sections): Likewise.
	* elfxx-mips.c (_bfd_mips_elf_size_dynamic_sections): Likewise.
	* elfxx-sparc.c (_bfd_sparc_elf_size_dynamic_sections): Likewise.
	* elfxx-tilegx.c (tilegx_elf_size_dynamic_sections): Likewise.
ld/
	* ld.texinfo (--no-dynamic-linker): Document.
	* ldlex.h (enum option_values): Add OPTION_NO_DYNAMIC_LINKER.
	* lexsup.c (ld_options, parse_args): Handle --no-dynamic-linker.
 2015-09-20 15:52:27 +09:30
Jiong Wang
4af68b9c78 [AArch64] Sort IS_AARCH64_TLS_RELAX_RELOC in alphabetic order 
This can also speedup the check as TLSDESC is the default model for
global/local dynamic that the big "||" check can finish more quickly
than putting them at the bottom.

2015-09-09  Jiong. Wang  <jiong.wang@arm.com>

bfd/
  * elfnn-aarch64.c (IS_AARCH64_TLS_RELAX_RELOC): Sort alphabetically.
 2015-09-09 14:25:33 +01:00
Jiong Wang
259364adb8 [AArch64] Relax TLS local dynamic traditional into local executable 
The linker relaxation logic will be:

Code sequence I (tiny):

    0x00 adr  x0, :tlsldm:x
    0x04 bl   __tls_get_addr
         |
         V
    0x00 mrs  x0, tpidr_el0
    0x04 add  x0, x0, TCB_SIZE

Code sequence II (small):

    0x00 adrp a0, :tlsldm:x
    0x04 add  a0, #:tlsldm_lo12:x
    0x08 bl   __tls_get_addr
         |
         V
    0x00 mrs  x0, tpidr_el0
    0x04 add  x0, x0, TCB_SIZE
    0x08 nop

2015-09-09  Jiong Wang  <jiong.wang@arm.com>

bfd/
  * elfnn-aarch64.c (aarch64_tls_transition_without_check): Support
  three TLS local dynamic traditional relocations types.
  (elfNN_aarch64_tls_relax): Support TLS local dynamic traditional to
  local executable relaxation.

ld/testsuite/
  * ld-aarch64/tls-relax-ld-le-tiny.s: New testcase.
  * ld-aarch64/tls-relax-ld-le-small.s: Likewise.
  * ld-aarch64/tls-relax-ld-le-tiny.d: New expectation file.
  * ld-aarch64/tls-relax-ld-le-small.d: Likewise.
  * ld-aarch64/aarch64-elf.exp: Run new testcases.
 2015-09-09 14:19:28 +01:00
Alan Modra
7292b3ac74 Make asection->id and asection->index unsigned 
These int vars are really unsigned, so make them so.

	* section.c (struct bfd_section): Make "id" and "index" unsigned.
	* coff-rs6000.c (_bfd_xcoff_sizeof_headers): Adjust local var to suit.
	* elf.c (elf_map_symbols): Likewise.
	* elf64-ppc.c (sym_exists_at): Make "id" param unsigned.
	(struct ppc_link_hash_table): Make "top_id" and "top_index" unsigned.
	(ppc64_elf_setup_section_lists): Ditto for local vars.
	* elf32-arm.c: Similarly to elf64-ppc.c.
	* elf32-avr.c: Likewise.
	* elf32-hppa.c: Likewise.
	* elf32-m68hc1x.c: Likewise.
	* elf32-metag.c: Likewise.
	* elf32-nios2.c: Likewise.
	* elfnn-aarch64.c: Likewise.
	* simple.c (struct saved_offsets): Make "section_count" unsigned.
	* bfd-in2.h: Regenerate.
 2015-08-31 12:37:36 +09:30
Jiong Wang
07c9aa07cd [AArch64][6/6] LD support TLSLD load/store relocation types 
2015-08-19  Jiong Wang  <jiong.wang@arm.com>

bfd/
  * elfnn-aarch64.c (IS_AARCH64_TLS_RELOC): Recognize new relocation
  types, including BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12,
  BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC,
  BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12,
  BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC,
  BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12,
  BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC,
  BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12,
  BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC.
  (elfNN_aarch64_final_link_relocate): Likewise.
  * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise.
  (_bfd_aarch64_elf_resolve_relocation): Likewise.

ld/testsuite/
  * ld-aarch64/emit-relocs-531.s: New testcase.
  * ld-aarch64/emit-relocs-531-overflow.s: Likewise.
  * ld-aarch64/emit-relocs-532.s: Likewise.
  * ld-aarch64/emit-relocs-533.s: Likewise.
  * ld-aarch64/emit-relocs-533-overflow.s: Likewise.
  * ld-aarch64/emit-relocs-534.s: Likewise.
  * ld-aarch64/emit-relocs-535.s: Likewise.
  * ld-aarch64/emit-relocs-535-overflow.s: Likewise.
  * ld-aarch64/emit-relocs-536.s: Likewise.
  * ld-aarch64/emit-relocs-537.s: Likewise.
  * ld-aarch64/emit-relocs-537-overflow.s: Likewise.
  * ld-aarch64/emit-relocs-538.s: Likewise.
  * ld-aarch64/emit-relocs-531.d: New expectation file.
  * ld-aarch64/emit-relocs-531-overflow.d: Likewise.
  * ld-aarch64/emit-relocs-532.d: Likewise.
  * ld-aarch64/emit-relocs-533.d: Likewise.
  * ld-aarch64/emit-relocs-533-overflow.d: Likewise.
  * ld-aarch64/emit-relocs-534.d: Likewise.
  * ld-aarch64/emit-relocs-535.d: Likewise.
  * ld-aarch64/emit-relocs-535-overflow.d: Likewise.
  * ld-aarch64/emit-relocs-536.d: Likewise.
  * ld-aarch64/emit-relocs-537.d: Likewise.
  * ld-aarch64/emit-relocs-537-overflow.d: Likewise.
  * ld-aarch64/emit-relocs-538.d: Likewise.
  * ld-aarch64/aarch64-elf.exp: Run new testcases.
 2015-08-19 16:57:38 +01:00
Jiong Wang
4c5625238c [AArch64][5/6] GAS support TLSLD load/store relocation types 
2015-08-19  Jiong Wang  <jiong.wang@arm.com>

bfd/
  * reloc.c: New entries, including
  BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12,
  BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC,
  BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12,
  BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC,
  BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12,
  BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC.
  BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12,
  BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC.
  * elfnn-aarch64.c (elfNN_aarch64_howto_table): Likewise.
  * bfd-in2.h: Regenerate.
  * libbfd.h: Regenerate.

gas/
  * config/tc-aarch64.c (reloc_table): New relocation types support for
  dtprel_lo12.
  (ldst_lo12_determine_real_reloc_type): Support
  BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12,
  BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC,
  BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12,
  BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC,
  BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12,
  BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC,
  BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12,
  BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC.
  (parse_operands): Likewise.
  (md_apply_fix): Likewise
  (aarch64_force_relocation): Likewise.
  (process_movw_reloc_info): Likewise.

gas/testsuite/
  * gas/aarch64/reloc-dtprel_lo12-ldst8.s: New testcase.
  * gas/aarch64/reloc-dtprel_lo12_nc-ldstc.s: Likewise.
  * gas/aarch64/reloc-dtprel_lo12-ldst16.s: Likewise.
  * gas/aarch64/reloc-dtprel_lo12_nc-ldst16.s: Likewise.
  * gas/aarch64/reloc-dtprel_lo12-ldst32.s: Likewise.
  * gas/aarch64/reloc-dtprel_lo12_nc-ldst32.s: Likewise.
  * gas/aarch64/reloc-dtprel_lo12-ldst64.s: Likewise.
  * gas/aarch64/reloc-dtprel_lo12_nc-ldst64.s: Likewise.
  * gas/aarch64/reloc-dtprel_lo12-ldst8.d: New expectation file.
  * gas/aarch64/reloc-dtprel_lo12_nc-ldst8.d: Likewise.
  * gas/aarch64/reloc-dtprel_lo12-ldst16.d: Likewise.
  * gas/aarch64/reloc-dtprel_lo12_nc-ldst16.d: Likewise.
  * gas/aarch64/reloc-dtprel_lo12-ldst32.d: Likewise.
  * gas/aarch64/reloc-dtprel_lo12_nc-ldst32.d: Likewise.
  * gas/aarch64/reloc-dtprel-lo12-ldst64.d: Likewise.
  * gas/aarch64/reloc-dtprel_lo12_nc-ldst64.d: Likewise.
 2015-08-19 16:54:39 +01:00
Jiong Wang
6ffe9a1ba3 [AArch64][4/6] LD support TLSLD move/add relocation types 
2015-08-19  Jiong Wang  <jiong.wang@arm.com>

bfd/
  PR ld/18276
  * elfnn-aarch64.c (IS_AARCH64_TLS_RELOC): Recognize new relocation
  types, including BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_HI12,
  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0,
  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC,
  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1,
  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC,
  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2.
  (elfNN_aarch64_final_link_relocate): Likewise.
  * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise.
  (_bfd_aarch64_elf_resolve_relocation): Likewise.

ld/testsuite/
  * ld-aarch64/emit-relocs-87.s: New testcase.
  * ld-aarch64/emit-relocs-88.s: Likewise.
  * ld-aarch64/emit-relocs-88-overflow.s: Likewise.
  * ld-aarch64/emit-relocs-89.s: Likewise.
  * ld-aarch64/emit-relocs-90.s: Likewise.
  * ld-aarch64/emit-relocs-90-overflow.s: Likewise.
  * ld-aarch64/emit-relocs-523.s: Likewise.
  * ld-aarch64/emit-relocs-524.s: Likewise.
  * ld-aarch64/emit-relocs-525.s: Likewise.
  * ld-aarch64/emit-relocs-527.s: Likewise.
  * ld-aarch64/emit-relocs-526.s: Likewise.
  * ld-aarch64/emit-relocs-528.s: Likewise.
  * ld-aarch64/emit-relocs-528-overflow.s: Likewise.
  * ld-aarch64/emit-relocs-87.d: New expectation file.
  * ld-aarch64/emit-relocs-88.d: Likewise.
  * ld-aarch64/emit-relocs-88-overflow.d: Likewise.
  * ld-aarch64/emit-relocs-89.d: Likewise.
  * ld-aarch64/emit-relocs-90.d: Likewise.
  * ld-aarch64/emit-relocs-90-overflow.d: Likewise.
  * ld-aarch64/emit-relocs-91.d: Likewise.
  * ld-aarch64/emit-relocs-523.d: Likewise.
  * ld-aarch64/emit-relocs-524.d: Likewise.
  * ld-aarch64/emit-relocs-525.d: Likewise.
  * ld-aarch64/emit-relocs-526.d: Likewise.
  * ld-aarch64/emit-relocs-527.d: Likewise.
  * ld-aarch64/emit-relocs-528.d: Likewise.
  * ld-aarch64/emit-relocs-528-overflow.d: Likewise.
  * ld-aarch64/aarch64-elf.exp: Run new testcases.
 2015-08-19 16:40:18 +01:00
Jiong Wang
49df5539f9 [AArch64][3/6] GAS support TLSLD move/add relocation types 
2015-08-19  Jiong Wang  <jiong.wang@arm.com>

bfd/
  * reloc.c (BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_HI12,
  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0,
  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC,
  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1,
  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC,
  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2): New entries.
  * elfnn-aarch64.c (elfNN_aarch64_howto_table): Likewise.
  * bfd-in2.h: Regenerate.
  * libbfd.h: Regenerate.

gas/
  * config/tc-aarch64.c (reloc_table): New relocation modifiers,
  "dtprel_hi12", "dtprel_g0", "dtprel_g0_nc", "dtprel_g1",
  "dtprel_g1_nc", "dtprel_g2".
  (md_apply_fix): Support new relocation types.
  (aarch64_force_relocation): Likewise.
  (process_movw_reloc_info): Likewise.

gas/testsuite/
  * gas/aarch64/reloc-dtprel_g0.s: New testcase.
  * gas/aarch64/reloc-dtprel_g0-ilp32.s: Likewise.
  * gas/aarch64/reloc-dtprel_g0_nc.s: Likewise.
  * gas/aarch64/reloc-dtprel_g0_nc-ilp32.s: Likewise.
  * gas/aarch64/reloc-dtprel_g1.s: Likewise.
  * gas/aarch64/reloc-dtprel_g1-ilp32.s: Likewise.
  * gas/aarch64/reloc-dtprel_g1_nc.s: Likewise.
  * gas/aarch64/reloc-dtprel_g2.s: Likewise.
  * gas/aarch64/reloc-dtprel_hi12.s: Likewise.
  * gas/aarch64/reloc-dtprel_hi12-ilp32.s: Likewise.
  * gas/aarch64/reloc-dtprel_g0.d: New expectation file.
  * gas/aarch64/reloc-dtprel_g0-ilp32.d: Likewise.
  * gas/aarch64/reloc-dtprel_g0_nc.d: Likewise.
  * gas/aarch64/reloc-dtprel_g0_nc-ilp32.d: Likewise.
  * gas/aarch64/reloc-dtprel_g1.d: Likewise.
  * gas/aarch64/reloc-dtprel_g1-ilp32.d: Likewise.
  * gas/aarch64/reloc-dtprel_g1_nc.d: Likewise.
  * gas/aarch64/reloc-dtprel_g2.d: Likewise.
  * gas/aarch64/reloc-dtprel_hi12.d: Likewise.
  * gas/aarch64/reloc-dtprel_hi12-ilp32.d: Likewise.
 2015-08-19 16:36:22 +01:00
Jiong Wang
753999c1ec [AArch64][2/6] LD support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC 
2015-08-19  Jiong Wang  <jiong.wang@arm.com>

bfd/
  * elfnn-aarch64.c (IS_AARCH64_TLS_RELOC): Recognize
  BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC.
  (aarch64_reloc_got_type): Likewise.
  (elfNN_aarch64_final_link_relocate): Likewise.
  (elfNN_aarch64_relocate_section): Likewise.
  * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise.
  (_bfd_aarch64_elf_resolve_relocation): Likewise.

ld/testsuite/
  * ld-aarch64/emit-relocs-530.s: New testcase.
  * ld-aarch64/emit-relocs-92.s: Likewise.
  * ld-aarch64/emit-relocs-530.d: New expectation file.
  * ld-aarch64/emit-relocs-92.d: Likewise.
  * ld-aarch64/aarch64-elf.exp: Run new testcases.
 2015-08-19 16:30:47 +01:00
Jiong Wang
13289c10e2 [AArch64][1/6] GAS support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC 
2015-08-19  Jiong Wang  <jiong.wang@arm.com>

bfd/
  * reloc.c (BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC): New entry.
  * bfd-in2.h: Regenerate.
  * libbfd.h: Regenerate.
  * elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for
  BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC.

gas/
  * config/tc-aarch64.c (reloc_table): New relocation modifiers.
  (md_apply_fix): Support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC.
  (aarch64_force_relocation): Likewise.

gas/testsuite/
  * gas/aarch64/reloc-dtprel_lo12_nc.s: New testcase.
  * gas/aarch64/reloc-dtprel_lo12_nc-ilp32.s: Likewise.
  * gas/aarch64/reloc-dtprel_lo12_nc.d: New expectation file.
  * gas/aarch64/reloc-dtprel_lo12_nc-ilp32.d: Likewise.
 2015-08-19 16:28:08 +01:00
Jiong Wang
44b4145b72 [AArch64] Cleanup TLS relocation types which don't go through GOT table 
This patch done two types of cleanup:

  * in aarch64_reloc_got_type and elfNN_aarch64_relocate_section

    We don't need those redundant "case" check, as they can be merged
    with the "default" which just "break".

  * in elfNN_aarch64_gc_sweep_hook and elfNN_aarch64_check_relocs

    All TLS local executable relocations and some local dynamic
    relocations (those calculate module offset) actually don't need GOT
    entry, so remove them from GOT entry counting.

2015-08-18  Jiong Wang  <jiong.wang@arm.com>

bfd/
  * elfnn-aarch64.c (aarch64_reloc_got_type): Delete useless check.
  (elfNN_aarch64_relocate_section): Likewise.
  (elfNN_aarch64_gc_sweep_hook): Likewise.
  (elfNN_aarch64_check_relocs): Likewise.
 2015-08-18 16:50:56 +01:00