mirror/binutils-gdb
2
0
Fork 0
mirror of https://sourceware.org/git/binutils-gdb.git synced 2024-12-21 04:42:53 +08:00
Code Issues Packages Projects Releases Wiki Activity
21,479 Commits 385 Branches 134 Tags 565 MiB
d3c6610c00
Commit Graph

78 Commits

Author SHA1 Message Date
Nick Clifton
caa71f099d More instruction tests. 1998-02-20 19:55:27 +00:00
Nick Clifton
f83a90c419 Last of the instruction tests. 1998-02-20 19:01:58 +00:00
Nick Clifton
e843e28b1a More instruction tests. 1998-02-20 02:04:46 +00:00
Nick Clifton
c4448eec8c Yet more tests of m32r instructions 1998-02-20 00:30:14 +00:00
Nick Clifton
67dfe6e82c Even more instruction tests 1998-02-19 23:56:39 +00:00
Nick Clifton
dfe9df588d Test even more instructions. 1998-02-19 23:18:45 +00:00
Nick Clifton
0a2f6d9304 test 32 bit BCL instruction. 1998-02-19 21:52:27 +00:00
Nick Clifton
4630c94949 Add more tests. 1998-02-19 19:43:18 +00:00
Nick Clifton
d03da19e36 Added a couple of tests. 1998-02-19 19:16:54 +00:00
Doug Evans
b1c9871889 Delete rac-d,rac-ds,rach-d,rach-ds, they're aliases. 1998-02-18 20:39:02 +00:00
Doug Evans
cf6145bc28 .Sanitize for devo/sim/testsuite/sim/m32r. 1998-02-18 20:37:27 +00:00
Doug Evans
761784f055 keep config, lib, sim. 1998-02-17 22:05:11 +00:00
Doug Evans
fdad7ba5a2 * config/default.exp: New file. 
* lib/sim-defs.exp: New file.
	* sim/m32r/*: m32r dejagnu simulator testsuite.
 1998-02-17 21:58:11 +00:00
Doug Evans
6b47885968 keep m32r 1998-02-17 21:54:07 +00:00
Doug Evans
6b35d9dd89 m32r simulator testsuite 1998-02-17 21:52:53 +00:00
Doug Evans
ed063d525f * Makefile.in (build_alias): Define. 
(arch): Define.
	(RUNTEST_FOR_TARGET): Delete.
	(RUNTEST): Fix.
	(SCHEME,SCHEMEFLAGS,CGENDIR,CGENFLAGS,CGENFILES): Define.
	(check): Depend on site.exp.
	(site.exp): New target.
	(cgen): New target.
	* configure.in: Call AC_CHECK_PROG(SCHEME) if using cgen.
	(arch): Define from target_cpu.
	* configure: Regenerate.
 1998-02-17 20:54:50 +00:00
Andrew Cagney
b104806fd3 Test the RDT and DBT instructions. 1998-02-15 23:21:19 +00:00
Andrew Cagney
93c6a010dc Test switching between SPI/SPU. 1998-02-13 05:19:02 +00:00
Doug Evans
d04b9852c0 Beginnings of m32r simulator testsuite. 1998-02-13 03:16:48 +00:00
Doug Evans
6dc224fb87 Keep m32r-elf. 1998-02-13 03:01:10 +00:00
Andrew Cagney
86b46474fd Update tests to match recently modified ABI 1998-02-11 07:12:48 +00:00
Andrew Cagney
fcb12def35 New test - verify sdl insn. 1998-02-02 06:16:07 +00:00
Nick Clifton
61c550e0bd Renamed v850eq -> v850ea 1997-12-12 19:12:11 +00:00
Nick Clifton
e317cee2ba Parent directory renamed. 1997-12-12 02:01:21 +00:00
Felix Lee
06434f5f16 sanitization fixes. (files not mentioned, fences misspelled) 1997-12-11 04:18:47 +00:00
Andrew Cagney
c10ae9ad33 Test/fix d10v RTE instruction. 1997-12-09 05:46:48 +00:00
Andrew Cagney
38d0ccc27a Fix typo, REP_S was refering to REP_E register. 
Add test.
 1997-12-08 23:44:11 +00:00
Andrew Cagney
bc6df23d14 For "trap", IBT and RIE exceptions, mask all PSW.SM. NB: Stepping 
through an exception may not work correctly.
For GDB reads/writes to the control registers, ensure the cpu state is
updated correctly.
 1997-12-08 03:22:58 +00:00
Andrew Cagney
7f48c9fe1d Add DM (bit 4) to PSW. See 7-1 for more info. 
Test.
 1997-12-04 07:01:30 +00:00
Andrew Cagney
aa49c64f3e * d10v_sim.h (SEXT56): Define. 
* simops.c (OP_4201): For "rac", sign extend 56 bit value before
it is shifted.
* d10v_sim.h (MAX32, MIN32, MASK32, MASK40): Re-define using
SIGNED64 macro.
 1997-12-03 08:03:33 +00:00
Andrew Cagney
9d9972a38a For "sub", compute carry by comparing inputs. 
Test.
 1997-12-02 07:59:52 +00:00
Andrew Cagney
d294a657d5 For "msbu", subtract unsigned product from ACC, 
Test.
 1997-12-02 07:18:53 +00:00
Andrew Cagney
9420287ed2 For "mulxu", store unsigned product in ACC. 
Test.
 1997-12-02 06:37:09 +00:00
Andrew Cagney
e8b925f1fd Test mv[tf]ac instructions. 1997-12-02 05:31:33 +00:00
Andrew Cagney
ae55807561 For MACU add unsigned multiply to accumulator. 
Test.
 1997-12-02 05:18:27 +00:00
Andrew Cagney
51b057f27b For sub2w, compute carry according to negated addition rules. 
Test.
 1997-12-02 00:27:27 +00:00
Andrew Cagney
bd4ba9023a Add file alu-n-tst.h 1997-11-25 21:59:39 +00:00
Andrew Cagney
9dcdd9ad73 Sanitization 1997-11-24 13:34:52 +00:00
Andrew Cagney
891703e5e8 Test SUBI omsn 1997-11-17 22:36:19 +00:00
Andrew Cagney
51624b4bf6 Test rachi instruction. 1997-11-10 08:27:15 +00:00
Andrew Cagney
afb1dbe851 Preliminary tests for sim-alu module. 1997-10-17 03:57:53 +00:00
Andrew Cagney
81b3b32cda Sanitize additional files. 1997-10-15 00:05:28 +00:00
Andrew Cagney
5a9bddea84 Enable d10v simulator testsuite - two tests: Hello World and exit47. 1997-10-15 00:00:41 +00:00
Andrew Cagney
b3c77578dc Rewrite simulator floating point module. Do not rely on host FP 
implementation.  Add preliminary support for different IEEE-754
rounding modes.  Implement SQRT in software.
Update TiC80 simulator.
Add sim-fpu -> TestFloat interface for testing.
 1997-10-03 00:03:35 +00:00
Andrew Cagney
63fe2cc799 Fix typo, WITH_TARGET_WORD_BITSIZE not WITH_TARGET_BITSIZE. 1997-10-02 23:37:30 +00:00
Andrew Cagney
e9b53280ba Do not sanitize out sim/testsuite/common directory. 1997-09-29 00:24:08 +00:00
Jeff Law
bfebf1a52a r5900 sanitization fixes. 1997-09-24 07:27:43 +00:00
Jeff Law
c118539e6b mips64vr5900el-elf -> mips64r5900-elf. 1997-09-23 21:45:43 +00:00
Andrew Cagney
1398204eb0 Check v850eq popm[hl] instructions. 
Check v850 NMI/RETI.
 1997-09-23 08:40:55 +00:00
Andrew Cagney
f4822f1e6e More tests. 
Have sld check verify that the processor is a v850eq.
 1997-09-19 06:40:11 +00:00