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6108 Commits

Author SHA1 Message Date
James Lemke
b9c361e0ad Add support for PowerPC VLE. 
2012-05-14  Catherine Moore  <clm@codesourcery.com>

	* NEWS:  Mention PowerPC VLE port.

2012-05-14  James Lemke <jwlemke@codesourcery.com>
	    Catherine Moore  <clm@codesourcery.com>

	bfd/
	* bfd.c (bfd_lookup_section_flags): Add section parm.
	* ecoff.c (bfd_debug_section): Remove flag_info initializer.
	* elf-bfd.h (bfd_elf_section_data): Move in section_flag_info.
	(bfd_elf_lookup_section_flags): Add section parm.
	* elf32-ppc.c (is_ppc_vle): New function.
	(ppc_elf_modify_segment_map): New function.
	(elf_backend_modify_segment_map): Define.
	(has_vle_insns): New define.
	* elf32-ppc.h (ppc_elf_modify_segment_map): Declare.
	* elflink.c (bfd_elf_lookup_section_flags): Add return value & parm.
	Move in logic to omit / include a section.
	* libbfd-in.h (bfd_link_info): Add section parm.
	(bfd_generic_lookup_section_flags): Likewise.
	* reloc.c (bfd_generic_lookup_section_flags): Likewise.
	* section.c (bfd_section): Move out section_flag_info.
	(BFD_FAKE_SECTION): Remove flag_info initializer.
	* targets.c (_bfd_lookup_section_flags): Add section parm.

2012-05-14  Catherine Moore  <clm@codesourcery.com>

	bfd/
	* archures.c (bfd_mach_ppc_vle): New.
	* bfd-in2.h: Regenerated.
	* cpu-powerpc.c (bfd_powerpc_archs): New entry for vle.
	* elf32-ppc.c (split16_format_type): New enumeration.
	(ppc_elf_vle_split16): New function.
	(HOWTO): Add entries for R_PPC_VLE relocations.
	(ppc_elf_reloc_type_lookup): Handle PPC_VLE relocations.
	(ppc_elf_section_flags): New function.
	(ppc_elf_lookup_section_flags): New function.
	(ppc_elf_section_processing): New function.
	(ppc_elf_check_relocs): Handle PPC_VLE relocations.
	(ppc_elf_relocation_section): Likewise.
	(elf_backend_lookup_section_flags_hook): Define.
	(elf_backend_section_flags): Define.
	(elf_backend_section_processing): Define.
	* elf32-ppc.h (ppc_elf_section_processing): Declare.
	* libbfd.h: Regenerated.
	* reloc.c (BFD_RELOC_PPC_VLE_REL8, BFD_RELOC_PPC_VLE_REL15,
	BFD_RELOC_PPC_VLE_REL24, BFD_RELOC_PPC_VLE_LO16A,
	BFD_RELOC_PPC_VLE_LO16D, BFD_RELOC_PPC_VLE_HI16A,
	BFD_RELOC_PPC_VLE_HI16D, BFD_RELOC_PPC_VLE_HA16A,
	BFD_RELOC_PPC_VLE_HA16D, BFD_RELOC_PPC_VLE_SDA21,
	BFD_RELOC_PPC_VLE_SDA21_LO, BFD_RELOC_PPC_VLE_SDAREL_LO16A,
	BFD_RELOC_PPC_VLE_SDAREL_LO16D, BFD_RELOC_PPC_VLE_SDAREL_HI16A,
	BFD_RELOC_PPC_VLE_SDAREL_HI16D, BFD_RELOC_PPC_VLE_SDAREL_HA16A,
	BFD_RELOC_PPC_VLE_SDAREL_HA16D): New bfd relocations.

2012-05-14  James Lemke  <jwlemke@codesourcery.com>

	gas/
	* config/tc-ppc.c (insn_validate): New func of existing code to call..
	(ppc_setup_opcodes): ..from 2 places here.
	Revise for second (VLE) opcode table.
	Add #ifdef'd code to print opcode tables.

2012-05-14  James Lemke  <jwlemke@codesourcery.com>

	gas/
	* config/tc-ppc.c (ppc_setup_opcodes): Allow out-of-order
	for the VLE conditional branches.

2012-05-14  Catherine Moore  <clm@codesourcery.com>
            Maciej W. Rozycki  <macro@codesourcery.com>
	    Rhonda Wittels  <rhonda@codesourcery.com>

	gas/
	* config/tc-ppc.c (PPC_VLE_SPLIT16A): New macro.
	(PPC_VLE_SPLIT16D): New macro.
	(PPC_VLE_LO16A): New macro.
	(PPC_VLE_LO16D): New macro.
	(PPC_VLE_HI16A): New macro.
	(PPC_VLE_HI16D): New macro.
	(PPC_VLE_HA16A): New macro.
	(PPC_VLE_HA16D): New macro.
	(PPC_APUINFO_VLE): New definition.
	(md_chars_to_number): New function.
	(md_parse_option): Check for combinations of little
	endian and -mvle.
	(md_show_usage): Document -mvle.
	(ppc_arch): Recognize VLE.
	(ppc_mach): Recognize bfd_mach_ppc_vle.
	(ppc_setup_opcodes): Print the opcode table if
	* config/tc-ppc.h (ppc_frag_check): Declare.
	* doc/c-ppc.texi: Document -mvle.
	* NEWS:  Mention PowerPC VLE port.

2012-05-14  Catherine Moore  <clm@codesourcery.com>

	gas/
	* config/tc-ppc.h (ppc_dw2_line_min_insn_length): Declare.
	(DWARF2_LINE_MIN_INSN_LENGTH): Redefine.
	* config/tc-ppc.c (ppc_dw2_line_min_insn_length): New.
	* dwarf2dbg.c (scale_addr_delta): Handle values of 1
	for DWARF2_LINE_MIN_INSN_LENGTH.

2012-05-14  Catherine Moore  <clm@codesourcery.com>
            Maciej W. Rozycki  <macro@codesourcery.com>
	    Rhonda Wittels  <rhonda@codesourcery.com>

	gas/testsuite/
	* gas/ppc/ppc.exp: Run new tests.
	* gas/ppc/vle-reloc.d: New test.
	* gas/ppc/vle-reloc.s: New test.
	* gas/ppc/vle-simple-1.d: New test.
	* gas/ppc/vle-simple-1.s: New test.
	* gas/ppc/vle-simple-2.d: New test.
	* gas/ppc/vle-simple-2.s: New test.
	* gas/ppc/vle-simple-3.d: New test.
	* gas/ppc/vle-simple-3.s: New test.
	* gas/ppc/vle-simple-4.d: New test.
	* gas/ppc/vle-simple-4.s: New test.
	* gas/ppc/vle-simple-5.d: New test.
	* gas/ppc/vle-simple-5.s: New test.
	* gas/ppc/vle-simple-6.d: New test.
	* gas/ppc/vle-simple-6.s: New test.
	* gas/ppc/vle.d: New test.
	* gas/ppc/vle.s: New test.

2012-05-14  James Lemke  <jwlemke@codesourcery.com>
	include/elf/
	* ppc.h (SEC_PPC_VLE): Remove.

2012-05-14  Catherine Moore  <clm@codesourcery.com>
	    James Lemke  <jwlemke@codesourcery.com>

	include/elf/
	* ppc.h (R_PPC_VLE_REL8): New reloction.
	(R_PPC_VLE_REL15): Likewise.
	(R_PPC_VLE_REL24): Likewise.
	(R_PPC_VLE_LO16A): Likewise.
	(R_PPC_VLE_LO16D): Likewise.
	(R_PPC_VLE_HI16A): Likewise.
	(R_PPC_VLE_HI16D): Likewise.
	(R_PPC_VLE_HA16A): Likewise.
	(R_PPC_VLE_HA16D): Likewise.
	(R_PPC_VLE_SDA21): Likewise.
	(R_PPC_VLE_SDA21_LO): Likewise.
	(R_PPC_VLE_SDAREL_LO16A): Likewise.
	(R_PPC_VLE_SDAREL_LO16D): Likewise.
	(R_PPC_VLE_SDAREL_HI16A): Likewise.
	(R_PPC_VLE_SDAREL_HI16D): Likewise.
	(R_PPC_VLE_SDAREL_HA16A): Likewise.
	(R_PPC_VLE_SDAREL_HA16D): Likewise.
	(SEC_PPC_VLE): Remove.
	(PF_PPC_VLE): New program header flag.
	(SHF_PPC_VLE): New section header flag.
	(vle_opcodes, vle_num_opcodes): New.
	(VLE_OP): New macro.
	(VLE_OP_TO_SEG): New macro.

2012-05-14  Catherine Moore  <clm@codesourcery.com>
            Maciej W. Rozycki  <macro@codesourcery.com>
	    Rhonda Wittels  <rhonda@codesourcery.com>

	include/opcode/
	* ppc.h (PPC_OPCODE_VLE): New definition.
	(PPC_OP_SA): New macro.
	(PPC_OP_SE_VLE): New macro.
	(PPC_OP): Use a variable shift amount.
	(powerpc_operand): Update comments.
	(PPC_OPSHIFT_INV): New macro.
	(PPC_OPERAND_CR): Replace with...
	(PPC_OPERAND_CR_BIT): ...this and
	(PPC_OPERAND_CR_REG): ...this.

2012-05-14  James Lemke  <jwlemke@codesourcery.com>

	ld/
	* ldlang.c (walk_wild_consider_section): Don't copy section_flag_list.
	Pass it to callback.
	(walk_wild_section_general): Pass section_flag_list to callback.
	(lang_add_section): Add sflag_list parm.
	Move out logic to keep / omit a section & call bfd_lookup_section_flags.
	(output_section_callback_fast): Add sflag_list parm.
	Add new parm to lang_add_section calls.
	(output_section_callback): Likewise.
	(check_section_callback): Add sflag_list parm.
	(lang_place_orphans): Add new parm to lang_add_section calls.
	(gc_section_callback): Add sflag_list parm.
	(find_relro_section_callback): Likewise.
	* ldlang.h (callback_t): Add flag_info parm.
	(lang_add_section): Add sflag_list parm.
	* emultempl/armelf.em (elf32_arm_add_stub_section):
	Add lang_add_section parm.
	* emultempl/beos.em (gld*_place_orphan): Likewise.
	* emultempl/elf32.em (gld*_place_orphan): Likewise.
	* emultempl/hppaelf.em (hppaelf_add_stub_section): Likewise.
	* emultempl/m68hc1xelf.em (m68hc11elf_add_stub_section): Likewise.
	* emultempl/mipself.em (mips_add_stub_section): Likewise.
	* emultempl/mmo.em (mmo_place_orphan): Likewise.
	* emultempl/pe.em (gld_*_place_orphan): Likewise.
	* emultempl/pep.em (gld_*_place_orphan): Likewise.
	* emultempl/ppc64elf.em (ppc_add_stub_section): Likewise.
	* emultempl/spuelf.em (spu_place_special_section): Likewise.
	* emultempl/vms.em (vms_place_orphan): Likewise.

2012-05-14  James Lemke  <jwlemke@codesourcery.com>

	ld/testsuite/
	* ld-powerpc/powerpc.exp: Create ppceabitests.
	* ld-powerpc/vle-multiseg.s: New.
	* ld-powerpc/vle-multiseg-1.d: New.
	* ld-powerpc/vle-multiseg-1.ld: New.
	* ld-powerpc/vle-multiseg-2.d: New.
	* ld-powerpc/vle-multiseg-2.ld: New.
	* ld-powerpc/vle-multiseg-3.d: New.
	* ld-powerpc/vle-multiseg-3.ld: New.
	* ld-powerpc/vle-multiseg-4.d: New.
	* ld-powerpc/vle-multiseg-4.ld: New.
	* ld-powerpc/vle-multiseg-5.d: New.
	* ld-powerpc/vle-multiseg-5.ld: New.
	* ld-powerpc/vle-multiseg-6.d: New.
	* ld-powerpc/vle-multiseg-6.ld: New.
	* ld-powerpc/vle-multiseg-6a.s: New.
	* ld-powerpc/vle-multiseg-6b.s: New.
	* ld-powerpc/vle-multiseg-6c.s: New.
	* ld-powerpc/vle-multiseg-6d.s: New.
	* ld-powerpc/powerpc.exp: Run new tests.

2012-05-14  Catherine Moore  <clm@codesourcery.com>

	ld/
	* NEWS:  Mention PowerPC VLE port.

2012-05-14  Catherine Moore  <clm@codesourcery.com>

	ld/testsuite/
	* ld-powerpc/apuinfo.rd: Update for VLE.
	* ld-powerpc/vle-reloc-1.d: New.
	* ld-powerpc/vle-reloc-1.s: New.
	* ld-powerpc/vle-reloc-2.d: New.
	* ld-powerpc/vle-reloc-2.s: New.
	* ld-powerpc/vle-reloc-3.d: New.
	* ld-powerpc/vle-reloc-3.s: New.
	* ld-powerpc/vle-reloc-def-1.s: New.
	* ld-powerpc/vle-reloc-def-2.s: New.
	* ld-powerpc/vle-reloc-def-3.s: New.

2012-05-14  James Lemke  <jwlemke@codesourcery.com>

	opcodes/
	* ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle.
	(PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines.
	(vle_opcd_indices): New array.
	(lookup_vle): New function.
	(disassemble_init_powerpc): Revise for second (VLE) opcode table.
	(print_insn_powerpc): Likewise.
	* ppc-opc.c: Likewise.

2012-05-14  Catherine Moore  <clm@codesourcery.com>
            Maciej W. Rozycki  <macro@codesourcery.com>
	    Rhonda Wittels  <rhonda@codesourcery.com>
	    Nathan Froyd <froydnj@codesourcery.com>

	opcodes/
	* ppc-opc.c (insert_arx, extract_arx): New functions.
	(insert_ary, extract_ary): New functions.
	(insert_li20, extract_li20): New functions.
	(insert_rx, extract_rx): New functions.
	(insert_ry, extract_ry): New functions.
	(insert_sci8, extract_sci8): New functions.
	(insert_sci8n, extract_sci8n): New functions.
	(insert_sd4h, extract_sd4h): New functions.
	(insert_sd4w, extract_sd4w): New functions.
	(insert_vlesi, extract_vlesi): New functions.
	(insert_vlensi, extract_vlensi): New functions.
	(insert_vleui, extract_vleui): New functions.
	(insert_vleil, extract_vleil): New functions.
 	(BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT.
 	(BI16, BI32, BO32, B8): New.
	(B15, B24, CRD32, CRS): New.
 	(CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG.
	(DB, IMM20, RD, Rx, ARX, RY, RZ): New.
	(ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New.
	(SH6_MASK): Use PPC_OPSHIFT_INV.
	(SI8, UI5, OIMM5, UI7, BO16): New.
	(VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New.
	(XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV.
	(ALLOW8_SPRG): New.
	(insert_sprg, extract_sprg): Check ALLOW8_SPRG.
	(OPVUP, OPVUP_MASK OPVUP): New
	(BD8, BD8_MASK, BD8IO, BD8IO_MASK): New.
	(EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New.
	(BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New.
	(BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New.
 	(IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New.
	(IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New.
	(SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New.
	(SE_IM5, SE_IM5_MASK): New.
	(SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New.
	(EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New.
	(BO32DNZ, BO32DZ): New.
	(NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE.
	(PPCVLE): New.
	(powerpc_opcodes): Add new VLE instructions.  Update existing
	instruction to include PPCVLE if supported.
	* ppc-dis.c (ppc_opts): Add vle entry.
	(get_powerpc_dialect): New function.
	(powerpc_init_dialect): VLE support.
	(print_insn_big_powerpc): Call get_powerpc_dialect.
	(print_insn_little_powerpc): Likewise.
	(operand_value_powerpc): Handle negative shift counts.
	(print_insn_powerpc): Handle 2-byte instruction lengths.
 2012-05-14 19:45:30 +00:00
H.J. Lu
27d799802a Expect addend as signed 
* gas/cris/rd-pic-1.d: Expect addend as signed.
	* gas/cris/rd-tls-1.d: Likewise.
	* gas/cris/rd-tls-2.d: Likewise.
 2012-05-14 12:23:14 +00:00
H.J. Lu
343dbc36ff Print addend as signed in objdump 
binutils/

	* objdump.c (disassemble_bytes): Print addend as signed.
	(dump_reloc_set): Likewise.

gas/testsuite/

	* gas/all/fwdexp.d: Expect addend as signed.
	* gas/alpha/elf-reloc-1.d: Likewise.
	* gas/i386/mixed-mode-reloc64.d: Likewise.
	* gas/i386/reloc64.d: Likewise.
	* gas/i386/ilp32/mixed-mode-reloc64.d: Expect addend as signed.
	* gas/i386/ilp32/reloc64.d: Likewise.
	* gas/ia64/pcrel.d: Likewise.
	* gas/mips/branch-misc-2-64.d: Likewise.
	* gas/mips/branch-misc-2pic-64.d: Likewise.
	* gas/mips/branch-misc-4-64.d: Likewise.
	* gas/mips/ldstla-n64-sym32.d: Likewise.
	* gas/mips/micromips@branch-misc-2-64.d: Likewise.
	* gas/mips/micromips@branch-misc-2pic-64.d: Likewise.
	* gas/mips/micromips@branch-misc-4-64.d: Likewise.
	* gas/mips/mips16-hilo-n32.d: Likewise.
	* gas/ppc/astest.d: Likewise.
	* gas/ppc/astest2.d: Likewise.
	* gas/ppc/astest2_64.d: Likewise.
	* gas/ppc/astest64.d: Likewise.
	* gas/ppc/test1elf32.d: Likewise.
	* gas/ppc/test1elf64.d: Likewise.
	* gas/sparc/reloc64.d: Likewise.
 2012-05-14 02:40:00 +00:00
H.J. Lu
9920b1ee65 Adjust testcases for readelf addend change 
gas/testsuite/

	* gas/mips/elf-rel10.d: Updated.
	* gas/mips/elf-rel22.d: Likewise.
	* gas/mmix/comment-1.d: Likewise.

ld/testsuite/

	* ld-alpha/tlspic.rd: Updated.
	* ld-powerpc/tlsso.r: Likewise.
	* ld-powerpc/tlsso32.r: Likewise.
	* ld-powerpc/vxworks1-lib.rd: Likewise.
	* ld-s390/tlspic.rd: Likewise.
	* ld-s390/tlspic_64.rd: Likewise.
	* ld-sh/shared-1.d: Likewise.
	* ld-sh/tlspic-2.d: Likewise.
	* ld-sparc/tlssunnopic32.rd: Likewise.
	* ld-sparc/tlssunnopic64.rd: Likewise.
	* ld-sparc/tlssunpic32.rd: Likewise.
	* ld-sparc/tlssunpic64.rd: Likewise.
 2012-05-12 13:46:26 +00:00
H.J. Lu
56e63005cd Remove x32 addend overflow for BFD_RELOC_64 
gas/

	* config/tc-i386.c (tc_gen_reloc): Remove x32 addend overflow
	for BFD_RELOC_64.

gas/testsuite/

	* gas/i386/ilp32/ilp32.exp: Don't run reloc64-inval.

	* gas/i386/ilp32/reloc64.s: Add test for -4294967295 addend.
	* gas/i386/ilp32/reloc64.d: Updated.

	* gas/i386/ilp32/reloc64-inval.l: Removed.
	* gas/i386/ilp32/reloc64-inval.s: Likewise.
 2012-05-12 12:34:37 +00:00
Nick Clifton
208a4923ed PR binutils/14028 
* configure.in: Invoke ACX_HEADER_STRING.
	* configure: Regenerate.
	* config.in: Regenerate.
	* sysdep.h: If STRINGS_WITH_STRING is defined then include both
	string.h and strings.h.
 2012-05-11 14:25:30 +00:00
Nick Clifton
99700d6feb PR 13503 
* reloc.c: Add new ENUM for BFD_RELOC_AVR_8_LO,
	BFD_RELOC_AVR_8_HI, BFD_RELOC_AVR_8_HHI.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Regenrate.
	* elf32-avr.c (elf_avr_howto_table): Add entries for
	R_AVR_8_LO8, R_AVR_8_HI8, R_AVR_8_HHI8.
	(avr_reloc_map): Add RELOC mappings for R_AVR_8_LO8, R_AVR_8_HI8,
	R_AVR_8_HHI8.

	* config/tc-avr.c (exp_mod_pm): Remove variable.
	(exp_mod_data_t): New typedef.
	(pexp_mod_data, exp_mod_data): New variables.
	(avr_parse_cons_expression): Scan through exp_mod_data[] to find
	data expression modifiers "pm", "gs", "lo8", hi8", "hhi8", "hh8"
	and set pexp_mod_data accordingly to be used in avr_cons_fix_new.
	(avr_cons_fix_new): Handle new data expression modifiers shipped
	in pexp_mod_data.
	(md_apply_fix): Handle BFD_RELOC_AVR_8_LO, BFD_RELOC_AVR_8_HI,
	BFD_RELOC_AVR_8_HHI.

	* elf/avr.h (RELOC_NUMBERS): Add values for R_AVR_8_LO8,
	R_AVR_8_HI8, R_AVR_8_HHI8.
 2012-05-11 12:59:23 +00:00
H.J. Lu
268a8d3ac4 Use int and bfd_signed_vma in x32 addend overflow check 
bfd/

	* elf64-x86-64.c (elf_x86_64_relocate_section): Use int in x32
	addend overflow check.

gas/

	* config/tc-i386.c (tc_gen_reloc): Use bfd_signed_vma in x32
	addend overflow check.
 2012-05-11 00:50:43 +00:00
H.J. Lu
6f2c9068ed Display signed hex number in x32 addend overflow check 
bfd/

	* elf64-x86-64.c (elf_x86_64_relocate_section): Display signed
	hex number in x32 addend overflow check.

gas/

	* config/tc-i386.c (tc_gen_reloc): Display signed hex number in
	x32 addend overflow check.

ld/testsuite/

	* ld-x86-64/ilp32-11.d: Updated.
 2012-05-10 20:46:34 +00:00
H.J. Lu
83acd3e879 Use fits_in_signed_long to check x32 addend overflow 
* config/tc-i386.c (tc_gen_reloc): Use fits_in_signed_long.
 2012-05-10 03:48:33 +00:00
H.J. Lu
8cf0d2dd21 Check 64-bit relocation addend overflow for x32 
bfd/

	* elf64-x86-64.c (elf_x86_64_relocate_section): Check addend
	overflow for R_X86_64_RELATIVE64.

gas/

	* config/tc-i386.c (tc_gen_reloc): Check x32 addend overflow
	for BFD_RELOC_64.

gas/testsuite/

	* gas/i386/ilp32/ilp32.exp: Run reloc64-inval.

	* gas/i386/ilp32/reloc64.s: Add tests for ".quad".
	* gas/i386/ilp32/reloc64.d: Updated.

	* gas/i386/ilp32/reloc64-inval.l: New file.
	* gas/i386/ilp32/reloc64-inval.s: Likewise.

ld/testsuite/

	* ld-x86-64/ilp32-11.d: New file.
	* ld-x86-64/ilp32-11.s: Likewise.

	* ld-x86-64/x86-64.exp: Run ilp32-11.
 2012-05-10 03:25:17 +00:00
Alan Modra
4aee77982d * lib/gas-defs.exp (run_dump_test): Don't set LC_ALL here. 2012-05-08 12:15:06 +00:00
Alan Modra
e5b62927f4 * Makefile.am (check_DEJAGNU): Export LC_ALL=C in place of other 
LC and LANG environment vars.
	* Makefile.in: Regenerate.
 2012-05-08 12:14:15 +00:00
Alan Modra
cce3d66c34 * Makefile.am (check-DEJAGNU): Clear LC_COLLATE, LC_ALL and LANG. 
* Makefile.in: Regenerate.
 2012-05-07 09:21:48 +00:00
Arnold Metselaar
35c011e316 2012-05-06 Arnold Metselaar <arnold_m@operamail.com> 
* gas/z80/jr-forwf.s: New file, adapted from z8k version.
	* gas/z80/jr-backf.s: Likewise.
	* gas/z80/djnz-backf.s: Likewise.
	* gas/z80/ill_op: New file, with illegal operand.
	* gas/z80/z80.exp: Run new tests.
 2012-05-06 10:56:25 +00:00
Arnold Metselaar
25045f7922 2012-05-06 Arnold Metselaar <arnold_m@operamail.com> 
* config/tc-z80.h(md_register_arithmetic): Define as 0.
	* config/tc-z80.c(md_begin): Store register names in symbol table, prevents usage as ordinary symbol.
	* config/tc-z80.c(contains_register): New function.
	* config/tc-z80.c(parse_exp2): Removed.
	* config/tc-z80.c(parse_exp_not_indexed): New function.
	* config/tc-z80.c(parse_exp): Add code to recogize indexed addressing after parsing.
	* config/tc-z80.c(emit_byte, emit_word): Use contains_register.
	* config/tc-z80.c(emit_jp): Use parse_exp_not_indexed, simplify condition for jump to register.
	* config/tc-z80.c(emit_call, emit_jr, emit_ex, emit_rst): Use parse_exp_not_indexed.
 2012-05-06 09:49:21 +00:00
Alan Modra
45dfa85a1e Replace all uses of bfd_abs_section, bfd_com_section, bfd_und_section 
and bfd_ind_section with their _ptr variants, or use corresponding
bfd_is_* macros.
 2012-05-05 03:05:32 +00:00
H.J. Lu
3c99554527 Support x86_64-*-linux-gnux32 
gas/

	* configure.tgt: Support x86_64-*-linux-gnux32.

ld/

	* configure.tgt: Support x86_64-*-linux-gnux32.

ld/testsuite/

	* ld-elf/eh1.d: Skip x86_64-*-linux-gnux32.
	* ld-elf/eh2.d: Likewise.
	* ld-elf/eh3.d: Likewise.
	* ld-elf/eh4.d: Likewise.

	* ld-elfvsb/elfvsb.exp: Xfail x86_64-*-linux-gnux32.
	* ld-shared/shared.exp: Likewise.

	* ld-ifunc/ifunc-3a-x86.d: Support x86_64-*-linux-gnux32.
 2012-05-04 20:01:03 +00:00
H.J. Lu
35262a230c Add `instruction' to unsupported error message 
* config/tc-i386.c (match_template): Add `instruction' to
	unsupported error message.
 2012-05-04 19:18:02 +00:00
H.J. Lu
89e71f5c88 Reformat output_insn 
* config/tc-i386.c (output_insn): Reformat.
 2012-05-04 19:11:04 +00:00
H.J. Lu
ae5c1c7b1d Remove the extra VEX check 
* config/tc-i386.c (output_insn): Remove the extra VEX check.
 2012-05-04 18:06:38 +00:00
H.J. Lu
10efe3f6ab Improve unsupported error message 
* config/tc-i386.c (match_template): Improve unsupported error
	message.
 2012-05-04 17:55:38 +00:00
Nick Clifton
f6c1a2d592 Add support for Motorola XGATE embedded CPU 2012-05-03 13:12:08 +00:00
DJ Delorie
cad335c901 * config/rx-parse.y (rx_intop): Add parameter for operation size. 
Check for large positive constants really being small negative
ones.
(BRA, BSR): Update calls to rx_intop.
(immediate): Likewise.
 2012-04-30 22:09:09 +00:00
Mark Wielaard
88ebb0a156 gas: Make dwarf2dbg.c versions specific and add DW_AT_high_pc case for DWARF 4+. 
* dwarf2dbg.c (DWARF2_ARANGES_VERSION): New define to 2.
    (DWARF2_LINE_VERSION): Likewise.
    (out_debug_line): Use DWARF2_LINE_VERSION not DWARF2_VERSION.
    (out_debug_aranges): Use DWARF2_ARANGES_VERSION not DWARF2_VERSION.
    (out_debug_abbrev): Use DW_FORM_data for DW_AT_high_pc when
    DWARF2_VERSION >= 4.
    (out_debug_info): Use difference between start and end as data
    value for DW_AT_high_pc when DWARF2_VERSION >= 4.
    * config/tc-ia64.h (DWARF2_LINE_VERSION): Override it.
 2012-04-30 14:32:28 +00:00
David S. Miller
2755f698e1 Document sparc's %l34 and %h34 
gas/

	* doc/c-sparc.text: Document %l34 and %h34.
 2012-04-27 20:45:23 +00:00
David S. Miller
2e52845baf Add support for sparc %cfr ASR register. 
opcodes/

	* sparc-dis.c (v9a_asr_reg_names): Add 'cfr'.
	* sparc-opc.c (sparc_opcodes): Add rd/wr cases for %cfr.

gas/

	* config/tc-sparc.c (v9a_asr_table): Add 'cfr'.

gas/testsuite/

	* gas/sparc/sparc.exp: Run cfr test.
	* gas/sparc/cfr.s: New testcase.
	* gas/sparc/cfr.d: Likewise.
 2012-04-27 20:43:35 +00:00
David S. Miller
58004e23c9 Add support for sparc pause instruction. 
opcodes/

	* sparc-opc.c (sparc_opcodes): Add 'wr X, %pause' and 'pause'.
	* sparc-dis.c (v9a_asr_reg_names): Add 'pause'.

gas/

	* config/tc-sparc.c (sparc_arch_table): Add HWCAP_PAUSE to sparc4,
	v8pluse, v8plusv, v9e, and v9v.
	(v9a_asr_table): Add 'pause'.

gas/testsuite/

	* gas/sparc/sparc.exp: Run pause test.
	* gas/sparc/pause.s: New testcase.
	* gas/sparc/pause.d: Likewise.
 2012-04-27 18:04:00 +00:00
David S. Miller
698544e152 Add support for sparc compare-and-branch instructions. 
opcodes/

	* sparc-opc.c (CBCOND): New define.
	(CBCOND_XCC): Likewise.
	(cbcond): New helper macro.
	(sparc_opcodes): Add compare-and-branch instructions.

gas/

	* config/tc-sparc.c (sparc_arch_table): Add HWCAP_CBCOND to
	sparc4, v8pluse, v8plusv, v9e, and v9v.
	(sparc_ip): Handle R_SPARC_5 of immediate constants inline in
	order to accomodate cbcond which otherwise would require two
	relocations to be handled in a single instruction..

gas/testsuite/

	* gas/sparc/cbcond.s: New file.
	* gas/sparc/cbcond.d: New file.
	* gas/sparc/sparc.exp: Run cbcond test.
 2012-04-27 18:03:13 +00:00
David S. Miller
6cda13266f Add support for SPARC T4 crypto instructions. 
include/opcode/

	* sparc.h: Document new arg code' )' for crypto RS3
	immediates.

opcodes/

	* sparc-dis.c (print_insn_sparc): Handle ')'.
	* sparc-opc.c (sparc_opcodes): Add crypto instructions.

gas/

	* config/tc-sparc.c (sparc_ip): Likewise.  Accept instruction
	names containing "_".
	(sparc_arch_table): Add sparc4, v8pluse, and v9e.  Add crypto
	hwcap masks to v8plusv and v9v.

gas/testsuite/

	* gas/sparc/crypto.s: New file.
	* gas/sparc/crypto.d: New file.
	* gas/sparc/sparc.exp: Run crypto test.
 2012-04-27 18:02:35 +00:00
David S. Miller
ec668d69b9 Move sparc opcode hwcaps out of sparc_opcode flags field. 
include/opcode/

	* sparc.h (struct sparc_opcode): New field 'hwcaps'.
	F_MUL32, F_DIV32, F_FDMULD, F_V8PLUS, F_POPC, F_VIS, F_VIS2,
	F_ASI_BLK_INIT, F_FMAF, F_VIS3, F_HPC, F_RANDOM, F_TRANS,
	F_FJFMAU, F_IMA, F_ASI_CACHE_SPARING, F_HWCAP_MASK): Delete.
	(HWCAP_MUL32, HWCAP_DIV32, HWCAP_FSMULD, HWCAP_V8PLUS, HWCAP_POPC,
	HWCAP_VIS, HWCAP_VIS2, HWCAP_ASI_BLK_INIT, HWCAP_FMAF,
	HWCAP_VIS3, HWCAP_HPC, HWCAP_RANDOM, HWCAP_TRANS, HWCAP_FJFMAU,
	HWCAP_IMA, HWCAP_ASI_CACHE_SPARING, HWCAP_AES, HWCAP_DES,
	HWCAP_KASUMI, HWCAP_CAMELLIA, HWCAP_MD5, HWCAP_SHA1,
	HWCAP_SHA256, HWCAP_SHA512, HWCAP_MPMUL, HWCAP_MONT, HWCAP_PAUSE,
	HWCAP_CBCOND, HWCAP_CRC32): New defines.

opcodes/

	* sparc-opc.c (sparc_opcodes): Rework table to put HWCAP values
	into new struct sparc_opcode 'hwcaps' field instead of 'flags'.

gas/

	* config/tc-sparc.c (sparc_arch_table): Rework to use HWCAP_*
	masks.
	(sparc_md_end): No longer need to translate hwcap_seen values into
	ELF hwcap bits, they now match exactly.
	(get_hwcap_name): Use HWCAP_* and handle new values.
	(sparc_ip): Fetch hwcaps from insn->hwcaps instead of insn->flags.
 2012-04-27 18:01:35 +00:00
Tristan Gingold
2b0bc50148 2012-04-20 Tristan Gingold <gingold@adacore.com> 
* config/tc-ia64.c (obj_elf_vms_common): New function.
	(md_pseudo_table): Add .vms_common pseudo.
	* config/obj-elf.h (obj_elf_section_name): Add a prototype.
	* config/obj-elf.c (obj_elf_section_name): Make it public.
 2012-04-20 10:21:33 +00:00
Richard Sandiford
0b649256e3 gas/ 
* config/tc-avr.c (md_apply_fix): Fix handling of BFD_RELOC32.
 2012-04-17 13:59:41 +00:00
David S. Miller
2615994e91 Support R_SPARC_WDISP10 and R_SPARC_H34. 
include/

	* elf/sparc.h (R_SPARC_WDISP10): New reloc.
	* opcode/sparc.h: Define '=' as generating R_SPARC_WDISP10.

opcodes/

	* sparc-dis.c (X_DISP10): Define.
	(print_insn_sparc): Handle '='.

bfd/

	* reloc.c (BFD_RELOC_SPARC_H34, BFD_RELOC_SPARC_SIZE32,
	BFD_RELOC_SPARC_SIZE64, BFD_RELOC_SPARC_WDISP10): New relocs.
	* libbfd.h: Regenerate.
	* bfd-in2.h: Likewise.
	* elfxx-sparc.c (sparc_elf_wdisp10_reloc): New function.
	(_bfd_sparc_elf_howto_table): Add entries for R_SPARC_H34,
	R_SPARC_SIZE32, R_SPARC_64, and R_SPARC_WDISP10.
	(_bfd_sparc_elf_reloc_type_lookup): Handle new relocs.
	(_bfd_sparc_elf_check_relocs): Likewise.
	(_bfd_sparc_elf_gc_sweep_hook): Likewise.
	(_bfd_sparc_elf_relocate_section): Likewise.

gas/

	* config/tc-sparc.c (sparc_ip): Handle '=', "%h34", "%l34", and
	BFD_RELOC_SPARC_H34.
	(md_apply_fix): Handle BFD_RELOC_SPARC_WDISP10 and BFD_RELOC_SPARC_H34.
	(tc_gen_reloc): Likewise.

gas/testsuite/

	* gas/sparc/reloc64.s: Add abs34 code model tests.
	* gas/sparc/reloc64.d: Update.

elfcpp/

	* sparc.h (R_SPARC_WDISP10): New relocation.

gold/

	* sparc.cc (Reloc::wdisp10): New relocation method.
	(Reloc::h34): Likewise.
	(Target_sparc::Scan::check_non_pic): Handle R_SPARC_H34.
	(Target_sparc::Scan::get_reference_flags): Handle R_SPARC_H34 and
	R_SPARC_WDISP10.
	(Target_sparc::Scan::local): Likewise.
	(Target_sparc::Scan::global): Likewise.
	(Target_sparc::Relocate::relocate): Likewise.
 2012-04-12 16:26:06 +00:00
Nick Clifton
b38cadfb70 * elf32-arm.c (elf32_arm_nacl_plt0_entry, elf32_arm_nacl_plt_entry): 
New variables.
	(struct elf32_arm_link_hash_table): New member `nacl_p'.
	(elf32_arm_link_hash_table_create): Initialize it.
	(elf32_arm_nacl_link_hash_table_create): New function.
	(arm_movw_immediate, arm_movt_immediate): New functions.
	(elf32_arm_populate_plt_entry): Test HTAB->nacl_p.
	(elf32_arm_finish_dynamic_sections): Likewise.
	(elf32_arm_output_plt_map_1): Likewise.
	(bfd_elf32_littlearm_nacl_vec, bfd_elf32_bigarm_nacl_vec):
	New backend vector stanza.
	(elf32_arm_nacl_modify_segment_map): New function.
	* config.bfd: Handle arm-*-nacl*, armeb-*-nacl*.
	* targets.c: Support bfd_elf32_{big,little}_nacl_vec.
	* configure.in: Likewise.
	(bfd_elf32_bigarm_nacl_vec): Add elf-nacl.lo here.
	(bfd_elf32_littlearm_nacl_vec): Likewise.
	(bfd_elf32_bigarm_vec, bfd_elf32_littlearm_vec): Likewise.
	(bfd_elf32_bigarm_symbian_vec): Likewise.
	(bfd_elf32_littlearm_symbian_vec): Likewise.
	(bfd_elf32_bigarm_vxworks_vec): Likewise.
	(bfd_elf32_littlearm_vxworks_vec): Likewise.
	* configure: Regenerated.

	* configure.tgt (arm-*-nacl*): Match it.
	* config/te-nacl.h (FPU_DEFAULT, EABI_DEFAULT): Define.
	(LOCAL_LABELS_DOLLAR): Define.
	* config/tc-arm.c (elf32_arm_target_format) [TE_NACL]:
	Use nacl format variants.

	* gas/elf/elf.exp (run_elf_list_test): Treat arm-*-nacl* targets
	as -armeabi.

	* gas/arm/any-idiv.d: Match *-*-nacl* targets too.
	* gas/arm/arch4t.d: Likewise.
	* gas/arm/arch4t-eabi.d: Likewise.
	* gas/arm/attr-any-armv4t.d: Likewise.
	* gas/arm/attr-any-thumbv6.d: Likewise.
	* gas/arm/attr-cpu-directive.d: Likewise.
	* gas/arm/attr-default.d: Likewise.
	* gas/arm/attr-march-all.d: Likewise.
	* gas/arm/attr-march-armv1.d: Likewise.
	* gas/arm/attr-march-armv2a.d: Likewise.
	* gas/arm/attr-march-armv2.d: Likewise.
	* gas/arm/attr-march-armv2s.d: Likewise.
	* gas/arm/attr-march-armv3.d: Likewise.
	* gas/arm/attr-march-armv3m.d: Likewise.
	* gas/arm/attr-march-armv4.d: Likewise.
	* gas/arm/attr-march-armv4t.d: Likewise.
	* gas/arm/attr-march-armv4txm.d: Likewise.
	* gas/arm/attr-march-armv4xm.d: Likewise.
	* gas/arm/attr-march-armv5.d: Likewise.
	* gas/arm/attr-march-armv5t.d: Likewise.
	* gas/arm/attr-march-armv5te.d: Likewise.
	* gas/arm/attr-march-armv5tej.d: Likewise.
	* gas/arm/attr-march-armv5texp.d: Likewise.
	* gas/arm/attr-march-armv5txm.d: Likewise.
	* gas/arm/attr-march-armv6.d: Likewise.
	* gas/arm/attr-march-armv6j.d: Likewise.
	* gas/arm/attr-march-armv6k.d: Likewise.
	* gas/arm/attr-march-armv6k+sec.d: Likewise.
	* gas/arm/attr-march-armv6kt2.d: Likewise.
	* gas/arm/attr-march-armv6-m.d: Likewise.
	* gas/arm/attr-march-armv6-m+os.d: Likewise.
	* gas/arm/attr-march-armv6s-m.d: Likewise.
	* gas/arm/attr-march-armv6t2.d: Likewise.
	* gas/arm/attr-march-armv6z.d: Likewise.
	* gas/arm/attr-march-armv6zk.d: Likewise.
	* gas/arm/attr-march-armv6zkt2.d: Likewise.
	* gas/arm/attr-march-armv6zt2.d: Likewise.
	* gas/arm/attr-march-armv7-a.d: Likewise.
	* gas/arm/attr-march-armv7a.d: Likewise.
	* gas/arm/attr-march-armv7-a+idiv.d: Likewise.
	* gas/arm/attr-march-armv7-a+mp.d: Likewise.
	* gas/arm/attr-march-armv7-a+sec.d: Likewise.
	* gas/arm/attr-march-armv7-a+sec+virt.d: Likewise.
	* gas/arm/attr-march-armv7-a+virt.d: Likewise.
	* gas/arm/attr-march-armv7.d: Likewise.
	* gas/arm/attr-march-armv7em.d: Likewise.
	* gas/arm/attr-march-armv7-m.d: Likewise.
	* gas/arm/attr-march-armv7m.d: Likewise.
	* gas/arm/attr-march-armv7-r.d: Likewise.
	* gas/arm/attr-march-armv7r.d: Likewise.
	* gas/arm/attr-march-armv7-r+mp.d: Likewise.
	* gas/arm/attr-march-iwmmxt2.d: Likewise.
	* gas/arm/attr-march-iwmmxt.d: Likewise.
	* gas/arm/attr-march-xscale.d: Likewise.
	* gas/arm/attr-mcpu.d: Likewise.
	* gas/arm/attr-mfpu-arm1020e.d: Likewise.
	* gas/arm/attr-mfpu-arm1020t.d: Likewise.
	* gas/arm/attr-mfpu-arm1136jf-s.d: Likewise.
	* gas/arm/attr-mfpu-arm1136jfs.d: Likewise.
	* gas/arm/attr-mfpu-arm7500fe.d: Likewise.
	* gas/arm/attr-mfpu-fpa10.d: Likewise.
	* gas/arm/attr-mfpu-fpa11.d: Likewise.
	* gas/arm/attr-mfpu-fpa.d: Likewise.
	* gas/arm/attr-mfpu-fpe2.d: Likewise.
	* gas/arm/attr-mfpu-fpe3.d: Likewise.
	* gas/arm/attr-mfpu-fpe.d: Likewise.
	* gas/arm/attr-mfpu-maverick.d: Likewise.
	* gas/arm/attr-mfpu-neon.d: Likewise.
	* gas/arm/attr-mfpu-neon-fp16.d: Likewise.
	* gas/arm/attr-mfpu-softfpa.d: Likewise.
	* gas/arm/attr-mfpu-softvfp.d: Likewise.
	* gas/arm/attr-mfpu-softvfp+vfp.d: Likewise.
	* gas/arm/attr-mfpu-vfp10.d: Likewise.
	* gas/arm/attr-mfpu-vfp10-r0.d: Likewise.
	* gas/arm/attr-mfpu-vfp3.d: Likewise.
	* gas/arm/attr-mfpu-vfp9.d: Likewise.
	* gas/arm/attr-mfpu-vfp.d: Likewise.
	* gas/arm/attr-mfpu-vfpv2.d: Likewise.
	* gas/arm/attr-mfpu-vfpv3-d16.d: Likewise.
	* gas/arm/attr-mfpu-vfpv3.d: Likewise.
	* gas/arm/attr-mfpu-vfpv4-d16.d: Likewise.
	* gas/arm/attr-mfpu-vfpv4.d: Likewise.
	* gas/arm/attr-mfpu-vfpxd.d: Likewise.
	* gas/arm/attr-names.d: Likewise.
	* gas/arm/attr-order.d: Likewise.
	* gas/arm/attr-override-cpu-directive.d: Likewise.
	* gas/arm/attr-override-mcpu.d: Likewise.
	* gas/arm/got_prel.d: Likewise.
	* gas/arm/mapdir.d: Likewise.
	* gas/arm/mapmisc.d: Likewise.
	* gas/arm/mapsecs.d: Likewise.
	* gas/arm/mapshort-eabi.d: Likewise.
	* gas/arm/mapshort-elf.d: Likewise.
	* gas/arm/mov-highregs-any.d: Likewise.
	* gas/arm/mov-lowregs-any.d: Likewise.
	* gas/arm/pr12198-1.d: Likewise.
	* gas/arm/pr12198-2.d: Likewise.
	* gas/arm/thumb.d: Likewise.
	* gas/arm/thumb-eabi.d: Likewise.
	* gas/arm/thumbrel.d: Likewise.

	* configure.tgt (arm*-*-nacl*, arm*b-*-nacl*): Handle them.
	* emulparams/armelf_nacl.sh: New file.
	* emulparams/armelfb_nacl.sh: New file.
	* Makefile.am (ALL_EMULATION_SOURCES): Add earmelf_nacl.c
	and earmelfb_nacl.c here.
	(earmelf_nacl.c, earmelfb_nacl.c): New targets.
	* Makefile.in: Regenerated.

	* ld-arm/arm-elf.exp (armelftests): Split out into ...
	(armelftests_common, armelftests_nonacl): ... these two.
	(armeabitests): Split out into ...
	(armeabitests_common, armeabitests_nonacl): ... these two.
	Omit _nonacl sets for arm*-*-nacl* targets.

	* ld-arm/farcall-mix.d: Don't match exact addresses, only symbolic ones.
	* ld-arm/farcall-mix2.d: Likewise.
	* ld-arm/farcall-group.d: Likewise.

	* ld-arm/tls-gdesc-got.d: Match variant file formats too.
	Accept some variation in exact addresses.

	* ld-arm/thumb2-b-interwork.d: Match variant file formats too.
	Fix regexps not to care about exact addresses where not relevant.

	* ld-arm/thumb2-bl-undefweak.d: Match any hex strings, not any
	strings of particular exact lengths.
	* ld-arm/thumb2-bl-undefweak1.d: Likewise.

	* ld-arm/arm-app.r: Match variant file formats too.
	* ld-arm/arm-app-abs32.r: Likewise.
	* ld-arm/arm-lib.d: Likewise.
	* ld-arm/arm-lib.r: Likewise.
	* ld-arm/arm-static-app.r: Likewise.
	* ld-arm/armv4-bx.d: Likewise.
	* ld-arm/data-only-map.d: Likewise.
	* ld-arm/group-relocs.d: Likewise.
	* ld-arm/jump19.d: Likewise.
	* ld-arm/reloc-boundaries.d: Likewise.
	* ld-arm/thumb1-bl.d: Likewise.
	* ld-arm/thumb2-bl.d: Likewise.
	* ld-arm/tls-app.d: Likewise.
	* ld-arm/tls-app.r: Likewise.
	* ld-arm/tls-gdierelax.d: Likewise.
	* ld-arm/tls-gdierelax2.d: Likewise.
	* ld-arm/tls-gdlerelax.d: Likewise.
	* ld-arm/tls-lib.d: Likewise.
	* ld-arm/tls-lib.r: Likewise.
	* ld-arm/tls-mixed.r: Likewise.
	* ld-arm/vfp11-fix-none.d: Likewise.
	* ld-arm/vfp11-fix-scalar.d: Likewise.
	* ld-arm/vfp11-fix-vector.d: Likewise.
	* ld-arm/arm-static-app.d: Likewise.
	Fix regexps not to care about exact number of leading spaces.
	* ld-arm/arm-app-abs32.d: Likewise.
	* ld-arm/fix-arm1176-off.d: Likewise.
	* ld-arm/fix-arm1176-on.d: Likewise.

	* ld-arm/arm-elf.exp: Treat nacl targets like eabi targets.
 2012-04-12 13:01:15 +00:00
Nick Clifton
465cb9fba7 oops - omitted from previous delta 2012-04-12 07:47:36 +00:00
Nick Clifton
6530b175a1 * config/tc-arm.c (only_one_reg_in_list): New function. 
(encode_ldmstm): Ditto.
	(do_ldmstm): Use a different encoding when pushing or poping
	a single register.
	(A_COND_MASK): New macro.
	(A_PUSH_POP_OP_MASK): Ditto.
	(A1_OPCODE_PUSH): Ditto.
	(A2_OPCODE_PUSH): Ditto.
	(A2_OPCODE_POP): Ditto.

	* gas/arm/push-pop.d: New testcase.
	* gas/arm/push-pop.s: Ditto.
	* gas/arm/stm-ldm.d: Ditto.
	* gas/arm/stm-ldm.s: Ditto.
 2012-04-12 07:46:54 +00:00
David S. Miller
be16f58925 gas/testsuite/ 
* gas/all/gas.exp: Sparc can handle BFD_RELOC_8 for constants.

ld/testsuite/

	* ld-sparc/tlssunbin32.rd: Fix regexp.
	* ld-sparc/tlssunbin64.rd: Likewise.
 2012-04-07 14:16:35 +00:00
Maciej W. Rozycki
45e279f5d4 * doc/c-mips.texi (MIPS Opts): Correct -no-mfix-24k to 
-mno-fix-24k.
 2012-04-06 22:02:43 +00:00
Roland McGrath
5879767462 binutils/ 
2012-04-06  Roland McGrath  <mcgrathr@google.com>

	* configure.in (AC_CHECK_HEADERS): Add locale.h.
	* config.in: Regenerate.
	* configure: Regenerate.

gas/
2012-04-06  Roland McGrath  <mcgrathr@google.com>

	* configure.in (AC_CHECK_HEADERS): Add locale.h.
	* config.in: Regenerate.
	* configure: Regenerate.

gold/
2012-04-06  Roland McGrath  <mcgrathr@google.com>

	* configure.in (AC_CHECK_HEADERS): Add locale.h.
	* config.in: Regenerate.
	* configure: Regenerate.

ld/
2012-04-06  Roland McGrath  <mcgrathr@google.com>

	* configure.in (AC_CHECK_HEADERS): Add locale.h.
	* config.in: Regenerate.
	* configure: Regenerate.
 2012-04-06 16:49:02 +00:00
Nick Clifton
443507505d * configure.in (AC_CHECK_FUNCS): Add setlocale. 
(AM_LC_MESSAGES): Add.
	* aclocal.m4: Regenerate.
	* config.in: Regenerate.
	* configure: Regenerate.
 2012-04-05 08:43:41 +00:00
DJ Delorie
e91a22cece * config/rx-parse.y: Make the .L optional for ADC and SBB. 2012-04-03 19:06:40 +00:00
Roland McGrath
5a68afcf73 bfd/ 
2012-04-03  Roland McGrath  <mcgrathr@google.com>

	* elf-nacl.c: New file.
	* elf-nacl.h: New file.
	* elf32-i386.c (elf_backend_modify_segment_map): Define for
	bfd_elf32_i386_nacl_vec.
	(elf_backend_modify_program_headers): Likewise.
	* elf64-x86-64.c (elf_backend_modify_segment_map): Define for
	bfd_elf64_x86_64_nacl_vec and bfd_elf32_x86_64_nacl_vec.
	(elf_backend_modify_program_headers): Likewise.
	* Makefile.am (BFD32_BACKENDS, BFD64_BACKENDS): Add elf-nacl.lo here.
	(BFD32_BACKENDS_CFILES, BFD64_BACKENDS_CFILES): Add elf-nacl.c here.
	* Makefile.in: Regenerated.
	* configure.in (bfd_elf64_x86_64_nacl_vec): Add elf-nacl.o to tb here.
	(bfd_elf32_x86_64_nacl_vec): Likewise.
	(bfd_elf64_x86_64_vec, bfd_elf32_x86_64_vec): Likewise.
	(bfd_elf64_x86_64_freebsd_vec, bfd_elf64_x86_64_sol2_vec): Likewise.
	(bfd_elf64_l1om_vec, bfd_elf64_l1om_freebsd_vec): Likewise.
	(bfd_elf64_k1om_vec, bfd_elf64_k1om_freebsd_vec): Likewise.
	(bfd_elf32_i386_nacl_vec): Likewise.
	(bfd_elf32_i386_sol2_vec, bfd_elf32_i386_freebsd_vec): Likewise.
	(bfd_elf32_i386_vxworks_vec, bfd_elf32_i386_vec): Likewise.
	* configure: Regenerated.

binutils/testsuite/
2012-04-03  Roland McGrath  <mcgrathr@google.com>

	* lib/binutils-common.exp (is_elf_format): Consider *-*-nacl* to
	be ELF too.

	* binutils-all/elfedit-4.d: Add "#as: --64" option.

	* binutils-all/i386/i386.exp: Accept nacl targets too.
	* binutils-all/x86-64/x86-64.exp: Likewise.

gas/testsuite/
2012-04-03  Roland McGrath  <mcgrathr@google.com>

	* gas/i386/k1om.d: Add not-target match for *-*-nacl*.
	* gas/i386/l1om.d: Likewise.

ld/
2012-04-03  Roland McGrath  <mcgrathr@google.com>

	* configure.tgt (i[3-7]86-*-nacl*, x86_64-*-nacl*): Handle them.
	* emulparams/elf_nacl.sh: New file.
	* emulparams/elf_i386_nacl.sh: New file.
	* emulparams/elf32_x86_64_nacl.sh: New file.
	* emulparams/elf_x86_64_nacl.sh: New file.
	* Makefile.am (ALL_EMULATION_SOURCES): Add eelf_i386_nacl.c here.
	(ALL_64_EMULATION_SOURCES): Add eelf32_x86_64_nacl.c and
	eelf_x86_64_nacl.c here.
	(eelf_i386_nacl.c, eelf32_x86_64_nacl.c, eelf_x86_64_nacl.c):
	New targets.
	* Makefile.in: Regenerated.

	* scripttempl/elf.sc: Handle SEPARATE_CODE cases.

ld/testsuite/
2012-04-03  Roland McGrath  <mcgrathr@google.com>

	* ld-x86-64/ilp32-4-nacl.d: New file.
	* ld-x86-64/x86-64.exp: Run it.

	* ld-discard/discard.exp: Accept nacl targets too.
	* ld-elf/binutils.exp: Likewise.
	* ld-elf/comm-data.exp: Likewise.
	* ld-elf/elf.exp: Likewise.
	* ld-elf/tls_common.exp: Likewise.
	* ld-elfvers/vers.exp: Likewise.
	* ld-elfvsb/elfvsb.exp: Likewise.
	* ld-elfweak/elfweak.exp: Likewise.
	* ld-gc/gc.exp: Likewise.
	* ld-ifunc/binutils.exp: Likewise.
	* ld-ifunc/ifunc.exp: Likewise.
	* ld-linkonce/linkonce.exp:Likewise.
	* ld-pie/pie.exp: Likewise.
	* ld-shared/shared.exp: Likewise.
	* ld-undefined/weak-undef.exp: Likewise.
	* ld-unique/unique.exp: Likewise.
	* ld-x86-64/dwarfreloc.exp: Likewise.
	* ld-x86-64/line.exp: Likewise.

	* lib/ld-lib.exp (slurp_options): Support global array
	options_regsub to apply substitutions to the contents
	of options lines read from the file.
	* ld-i386/emit-relocs.d: Renamed to ...
	* ld-i386/emit-relocs.rd: ... this.
	* ld-i386/i386.exp: Accept nacl targets too.
	For them, use options_regsub to replace elf_i386 with
	elf_i386_nacl in run_dump_test cases; apply the same
	substitution in $i386tests; replace foo.rd expectations
	files with foo-nacl.rd in $i386tests.
	(i386tests): Change emit-relocs.d to emit-relocs.rd here.
	* ld-i386/emit-relocs-nacl.rd: New file.
	* ld-i386/plt-nacl.pd: New file.
	* ld-i386/plt-pic-nacl.pd: New file.
	* ld-i386/tlsbin-nacl.rd: New file.
	* ld-i386/tlsbindesc-nacl.rd: New file.
	* ld-i386/tlsdesc-nacl.rd: New file.
	* ld-i386/tlsgdesc-nacl.rd: New file.
	* ld-i386/tlsnopic-nacl.rd: New file.
	* ld-i386/tlspic-nacl.rd: New file.
	* ld-x86-64/x86-64.exp: Accept nacl targets too.
	For them, use options_regsub to replace elf_x86_64 with
	elf_x86_64_nacl in run_dump_test cases; apply the same
	substitution in $x86_64tests; replace foo.rd expectations
	files with foo-nacl.rd in $x86_64tests.
	Add explicit -melf_x86_64 to ld options in tests that need it,
	in case the default emulation is x32 (as it is for x86_64-nacl).
	* ld/testsuite/ld-x86-64/plt-nacl.pd: New file.
	* ld/testsuite/ld-x86-64/split-by-file-nacl.rd: New file.
	* ld/testsuite/ld-x86-64/tlsbin-nacl.rd: New file.
	* ld/testsuite/ld-x86-64/tlsbindesc-nacl.rd: New file.
	* ld/testsuite/ld-x86-64/tlsdesc-nacl.pd: New file.
	* ld/testsuite/ld-x86-64/tlsdesc-nacl.rd: New file.
	* ld/testsuite/ld-x86-64/tlsgdesc-nacl.rd: New file.
	* ld/testsuite/ld-x86-64/tlspic-nacl.rd: New file.

	* ld-i386/hidden2.d: Loosen regexps to match any file format variant,
	and not to depend on exact addresses, displacements, etc. where
	they are irrelevant.
	* ld-i386/pcrel16.d: Likewise.
	* ld-i386/pcrel16abs.d: Likewise.
	* ld-i386/pr12718.d: Likewise.
	* ld-i386/pr12921.d: Likewise.
	* ld-i386/reloc.d: Likewise.
	* ld-i386/tlsbin.dd: Likewise.
	* ld-i386/tlsbin.sd: Likewise.
	* ld-i386/tlsbin.td: Likewise.
	* ld-i386/tlsbindesc.dd: Likewise.
	* ld-i386/tlsbindesc.sd: Likewise.
	* ld-i386/tlsbindesc.td: Likewise.
	* ld-i386/tlsdesc.dd: Likewise.
	* ld-i386/tlsdesc.sd: Likewise.
	* ld-i386/tlsdesc.td: Likewise.
	* ld-i386/tlsg.sd: Likewise.
	* ld-i386/tlsgdesc.dd: Likewise.
	* ld-i386/tlsindntpoff.dd: Likewise.
	* ld-i386/tlsnopic.dd: Likewise.
	* ld-i386/tlsnopic.sd: Likewise.
	* ld-i386/tlspic.dd: Likewise.
	* ld-i386/tlspic.sd: Likewise.
	* ld-i386/tlspic.td: Likewise.
	* ld-i386/tlspie2.d: Likewise.
	* ld-x86-64/hidden2.d: Likewise.
	* ld-x86-64/pcrel16.d: Likewise.
	* ld-x86-64/pr12718.d: Likewise.
	* ld-x86-64/pr12921.d: Likewise.
	* ld-x86-64/protected3.d: Likewise.
	* ld-x86-64/tlsbin.dd: Likewise.
	* ld-x86-64/tlsbin.sd: Likewise.
	* ld-x86-64/tlsbin.td: Likewise.
	* ld-x86-64/tlsbindesc.dd: Likewise.
	* ld-x86-64/tlsbindesc.sd: Likewise.
	* ld-x86-64/tlsbindesc.td: Likewise.
	* ld-x86-64/tlsdesc.dd: Likewise.
	* ld-x86-64/tlsdesc.sd: Likewise.
	* ld-x86-64/tlsdesc.td: Likewise.
	* ld-x86-64/tlsg.sd: Likewise.
	* ld-x86-64/tlsgd5.dd: Likewise.
	* ld-x86-64/tlsgd6.dd: Likewise.
	* ld-x86-64/tlsgdesc.dd: Likewise.
	* ld-x86-64/tlspic.dd: Likewise.
	* ld-x86-64/tlspic.sd: Likewise.
	* ld-x86-64/tlspic.td: Likewise.

	* ld-x86-64/ilp32-8.d: Match any file format variant.
	Use a -Ttext and adjust expected results, to handle variant layouts.
	* ld-x86-64/ilp32-9.d: Likewise.

	* ld-i386/alloc.t: Remove superfluous OUTPUT_FORMAT statement.
	* ld-i386/pr12627.t: Likewise.

	* ld-x86-64/abs-l1om.d: Add target: constraint.
	* ld-x86-64/protected2-l1om.d: Likewise.
	* ld-x86-64/protected3-l1om.d: Likewise.
	* ld-x86-64/ilp32-4.d: Likewise.

	* ld-x86-64/plt.s: New file.
	* ld-x86-64/pltlib.s: New file.
	* ld-x86-64/plt.pd: New file.
	* ld-x86-64/x86-64.exp (x86_64tests): Add them.

	* ld-i386/plt.s: New file.
	* ld-i386/pltlib.s: New file.
	* ld-i386/plt.pd: New file.
	* ld-i386/plt-pic.s: New file.
	* ld-i386/plt-pic.pd: New file.
	* ld-i386/i386.exp (i386tests): Add them.
 2012-04-03 16:01:38 +00:00
DJ Delorie
b1c0804b2e * config/rx-parse.y: IMM->IMM_, take an extra parameter for the 
transfer size.
(IMM): New, call IMM_ with the default 32.
(IMMW,IMMB): Likewise, for 16 and 8.
(NIMM, MBIMM): Add size parameter.
(immediate): Likewise.  Allow 32768..65535 for 16-bit transfers.
(MOV.W): Use IMMW instead of IMM.

* config/rx-parse.y (ADC,SBB): ADC and SBB only allow .L.
(op_dp20_rm_l): New.
(op_dp20_rim_l): New.

* config/rx-parse.y (op_dp20_rms): Rename to op_dp20_rr, don't allow mem.
(ABS, NEG, NOT): These only take REG or REG,REG (rr, not rms).


* gas/rx/mov.d: Update patterns for fixed MOV.W encoding.
 2012-04-03 03:01:57 +00:00
Matthew Gretton-Dann
ce32bd10df 2012-03-29 Terry Guo <terry.guo@arm.com> 
* gas/config/tc-arm.c (arm_cpus): Add cortex-m0plus.
	* gas/doc/c-arm.texi (ARM Options): Document -mcpu=cortex-m0plus.
 2012-03-29 10:28:40 +00:00
Maxim Kuvyrkov
55a36193d8 gas/ 
* config/tc-mips.c (mips_cpu_info_table): Add entry for Broadcom XLP.
	* doc/c-mips.texi: Mention XLP.

	opcodes/
	* mips-dis.c (mips_arch_choices): Add entry for Broadcom XLP.
 2012-03-24 01:09:28 +00:00
Thomas Schwinge
32b9ff0d14 gas/ 
[SH] Support the .uaquad and .8byte directives also for non-sh64
	configurations.

	* config/tc-sh.c (sh_cons_fix_new, md_apply_fix) [!HAVE_SH64]: Handle
	BFD_RELOC_64.
	* doc/c-sh64.texi (SH64 Machine Directives): Move .uaquad
	description...
	* doc/c-sh.texi (SH Machine Directives): ... here.
 2012-03-21 08:58:40 +00:00
Nick Clifton
7465e07a57 * config/tc-arm.c (do_vmrs): Accept priviledged mode VFP system 
registers.
	(do_vmsr): Likewise.
	(arm_opcode_insns): Do not default to using the FPSCR register in
	the VMRS and VMSR registers.

	* gas/arm/vfp1xD.s: Add tests of the VMSR ad VMRS instructions in
	priviledged modes.
	* gas/arm/vfp1xD.d: Update expected output.
 2012-03-20 11:55:07 +00:00
Roland McGrath
8059fb196e bfd/ 
2012-03-16  Roland McGrath  <mcgrathr@google.com>

	* config.bfd: Handle x86_64-*-nacl*.
	* elf64-x86-64.c (bfd_elf64_x86_64_nacl_vec): New backend vector stanza.
	(bfd_elf32_x86_64_nacl_vec): Likewise.
	* targets.c: Support them.
	* configure.in: Likewise.
	* configure: Regenerated.

gas/
2012-03-16  Roland McGrath  <mcgrathr@google.com>

	* config/tc-i386.h [TE_NACL] (ELF_TARGET_FORMAT32, ELF_TARGET_FORMAT64):
	Define for this case.
	* configure.tgt (i386-*-nacl*): If ${cpu} is x86_64*, default to x32.
 2012-03-16 23:19:47 +00:00
Matthew Gretton-Dann
692392805b * gas/config/tc-arm.c (aeabi_set_public_attributes): Correct 
handling of Tag_DIV_use.
	* gas/testsuite/gas/testsuite/gas/arm/any-idiv.d: New testcase.
	* gas/testsuite/gas/testsuite/gas/arm/any-idiv.s: Likewise.
	* gas/testsuite/gas/arm/attr-any-armv4t.d: Update expected output.
	* gas/testsuite/gas/arm/attr-any-thumbv6.d: Likewise.
	* gas/testsuite/gas/arm/attr-cpu-directive.d: Likewise.
	* gas/testsuite/gas/arm/attr-default.d: Likewise.
	* gas/testsuite/gas/arm/attr-march-armv1.d: Likewise.
	* gas/testsuite/gas/arm/attr-march-armv2.d: Likewise.
	* gas/testsuite/gas/arm/attr-march-armv2a.d: Likewise.
	* gas/testsuite/gas/arm/attr-march-armv2s.d: Likewise.
	* gas/testsuite/gas/arm/attr-march-armv3.d: Likewise.
	* gas/testsuite/gas/arm/attr-march-armv3m.d: Likewise.
	* gas/testsuite/gas/arm/attr-march-armv4.d: Likewise.
	* gas/testsuite/gas/arm/attr-march-armv4t.d: Likewise.
	* gas/testsuite/gas/arm/attr-march-armv4txm.d: Likewise.
	* gas/testsuite/gas/arm/attr-march-armv4xm.d: Likewise.
	* gas/testsuite/gas/arm/attr-march-armv5.d: Likewise.
	* gas/testsuite/gas/arm/attr-march-armv5t.d: Likewise.
	* gas/testsuite/gas/arm/attr-march-armv5te.d: Likewise.
	* gas/testsuite/gas/arm/attr-march-armv5tej.d: Likewise.
	* gas/testsuite/gas/arm/attr-march-armv5texp.d: Likewise.
	* gas/testsuite/gas/arm/attr-march-armv5txm.d: Likewise.
	* gas/testsuite/gas/arm/attr-march-armv6-m+os.d: Likewise.
	* gas/testsuite/gas/arm/attr-march-armv6-m.d: Likewise.
	* gas/testsuite/gas/arm/attr-march-armv6.d: Likewise.
	* gas/testsuite/gas/arm/attr-march-armv6j.d: Likewise.
	* gas/testsuite/gas/arm/attr-march-armv6k+sec.d: Likewise.
	* gas/testsuite/gas/arm/attr-march-armv6k.d: Likewise.
	* gas/testsuite/gas/arm/attr-march-armv6kt2.d: Likewise.
	* gas/testsuite/gas/arm/attr-march-armv6s-m.d: Likewise.
	* gas/testsuite/gas/arm/attr-march-armv6t2.d: Likewise.
	* gas/testsuite/gas/arm/attr-march-armv6z.d: Likewise.
	* gas/testsuite/gas/arm/attr-march-armv6zk.d: Likewise.
	* gas/testsuite/gas/arm/attr-march-armv6zkt2.d: Likewise.
	* gas/testsuite/gas/arm/attr-march-armv6zt2.d: Likewise.
	* gas/testsuite/gas/arm/attr-march-armv7-a+mp.d: Likewise.
	* gas/testsuite/gas/arm/attr-march-armv7-a+sec.d: Likewise.
	* gas/testsuite/gas/arm/attr-march-armv7-a.d: Likewise.
	* gas/testsuite/gas/arm/attr-march-armv7.d: Likewise.
	* gas/testsuite/gas/arm/attr-march-armv7a.d: Likewise.
	* gas/testsuite/gas/arm/attr-march-iwmmxt.d: Likewise.
	* gas/testsuite/gas/arm/attr-march-iwmmxt2.d: Likewise.
	* gas/testsuite/gas/arm/attr-march-xscale.d: Likewise.
	* gas/testsuite/gas/arm/attr-mcpu.d: Likewise.
	* gas/testsuite/gas/arm/attr-mfpu-arm1020e.d: Likewise.
	* gas/testsuite/gas/arm/attr-mfpu-arm1020t.d: Likewise.
	* gas/testsuite/gas/arm/attr-mfpu-arm1136jf-s.d: Likewise.
	* gas/testsuite/gas/arm/attr-mfpu-arm1136jfs.d: Likewise.
	* gas/testsuite/gas/arm/attr-mfpu-arm7500fe.d: Likewise.
	* gas/testsuite/gas/arm/attr-mfpu-fpa.d: Likewise.
	* gas/testsuite/gas/arm/attr-mfpu-fpa10.d: Likewise.
	* gas/testsuite/gas/arm/attr-mfpu-fpa11.d: Likewise.
	* gas/testsuite/gas/arm/attr-mfpu-fpe.d: Likewise.
	* gas/testsuite/gas/arm/attr-mfpu-fpe2.d: Likewise.
	* gas/testsuite/gas/arm/attr-mfpu-fpe3.d: Likewise.
	* gas/testsuite/gas/arm/attr-mfpu-maverick.d: Likewise.
	* gas/testsuite/gas/arm/attr-mfpu-neon-fp16.d: Likewise.
	* gas/testsuite/gas/arm/attr-mfpu-neon.d: Likewise.
	* gas/testsuite/gas/arm/attr-mfpu-softfpa.d: Likewise.
	* gas/testsuite/gas/arm/attr-mfpu-softvfp+vfp.d: Likewise.
	* gas/testsuite/gas/arm/attr-mfpu-softvfp.d: Likewise.
	* gas/testsuite/gas/arm/attr-mfpu-vfp.d: Likewise.
	* gas/testsuite/gas/arm/attr-mfpu-vfp10-r0.d: Likewise.
	* gas/testsuite/gas/arm/attr-mfpu-vfp10.d: Likewise.
	* gas/testsuite/gas/arm/attr-mfpu-vfp3.d: Likewise.
	* gas/testsuite/gas/arm/attr-mfpu-vfp9.d: Likewise.
	* gas/testsuite/gas/arm/attr-mfpu-vfpv2.d: Likewise.
	* gas/testsuite/gas/arm/attr-mfpu-vfpv3-d16.d: Likewise.
	* gas/testsuite/gas/arm/attr-mfpu-vfpv3.d: Likewise.
	* gas/testsuite/gas/arm/attr-mfpu-vfpv4-d16.d: Likewise.
	* gas/testsuite/gas/arm/attr-mfpu-vfpv4.d: Likewise.
	* gas/testsuite/gas/arm/attr-mfpu-vfpxd.d: Likewise.
	* gas/testsuite/gas/arm/attr-order.d: Likewise.
	* gas/testsuite/gas/arm/attr-override-cpu-directive.d: Likewise.
	* gas/testsuite/gas/arm/attr-override-mcpu.d: Likewise.
	* gas/testsuite/gas/arm/eabi_attr_1.d: Likewise.
	* gas/testsuite/gas/arm/mov-highregs-any.d: Likewise.
	* gas/testsuite/gas/arm/mov-lowregs-any.d: Likewise.
	* gas/testsuite/gas/arm/pr12198-1.d: Likewise.
	* gas/testsuite/gas/arm/pr12198-2.d: Likewise.
	* ld/testsuite/ld-arm/arm-elf.exp: Add new testcases.
	* ld/testsuite/ld-arm/attr-merge-2.attr: Update ouput.
	* ld/testsuite/ld-arm/attr-merge-2a.s: Remove Tag_DIV_use test.
	* ld/testsuite/ld-arm/attr-merge-2b.s: Likewise.
	* ld/testsuite/ld-arm/attr-merge-3.attr: Updated expected output.
	* ld/testsuite/ld-arm/attr-merge-4.attr: Likewise.
	* ld/testsuite/ld-arm/attr-merge-5.attr: Likewise.
	* ld/testsuite/ld-arm/attr-merge-6.attr: Likewise.
	* ld/testsuite/ld-arm/attr-merge-7.attr: Likewise.
	* ld/testsuite/ld-arm/attr-merge-arch-1.attr: Likewise.
	* ld/testsuite/ld-arm/attr-merge-arch-2.attr: Likewise.
	* ld/testsuite/ld-arm/attr-merge-unknown-2.d: Likewise.
	* ld/testsuite/ld-arm/attr-merge-unknown-2r.d: Likewise.
	* ld/testsuite/ld-arm/attr-merge-unknown-3.d: Likewise.
	* ld/testsuite/ld-arm/attr-merge-vfp-1.d: Likewise.
	* ld/testsuite/ld-arm/attr-merge-vfp-1r.d: Likewise.
	* ld/testsuite/ld-arm/attr-merge-vfp-2.d: Likewise.
	* ld/testsuite/ld-arm/attr-merge-vfp-2r.d: Likewise.
	* ld/testsuite/ld-arm/attr-merge-vfp-3.d: Likewise.
	* ld/testsuite/ld-arm/attr-merge-vfp-3r.d: Likewise.
	* ld/testsuite/ld-arm/attr-merge-vfp-4.d: Likewise.
	* ld/testsuite/ld-arm/attr-merge-vfp-4r.d: Likewise.
	* ld/testsuite/ld-arm/attr-merge-vfp-5.d: Likewise.
	* ld/testsuite/ld-arm/attr-merge-vfp-5r.d: Likewise.
	* ld/testsuite/ld-arm/attr-merge-vfp-6.d: Likewise.
	* ld/testsuite/ld-arm/attr-merge-vfp-6r.d: Likewise.
	* ld/testsuite/ld-arm/attr-merge-wchar-00-nowarn.d: Likewise.
	* ld/testsuite/ld-arm/attr-merge-wchar-00.d: Likewise.
	* ld/testsuite/ld-arm/attr-merge-wchar-02-nowarn.d: Likewise.
	* ld/testsuite/ld-arm/attr-merge-wchar-02.d: Likewise.
	* ld/testsuite/ld-arm/attr-merge-wchar-04-nowarn.d: Likewise.
	* ld/testsuite/ld-arm/attr-merge-wchar-04.d: Likewise.
	* ld/testsuite/ld-arm/attr-merge-wchar-20-nowarn.d: Likewise.
	* ld/testsuite/ld-arm/attr-merge-wchar-20.d: Likewise.
	* ld/testsuite/ld-arm/attr-merge-wchar-22-nowarn.d: Likewise.
	* ld/testsuite/ld-arm/attr-merge-wchar-22.d: Likewise.
	* ld/testsuite/ld-arm/attr-merge-wchar-24-nowarn.d: Likewise.
	* ld/testsuite/ld-arm/attr-merge-wchar-40-nowarn.d: Likewise.
	* ld/testsuite/ld-arm/attr-merge-wchar-40.d: Likewise.
	* ld/testsuite/ld-arm/attr-merge-wchar-42-nowarn.d: Likewise.
	* ld/testsuite/ld-arm/attr-merge-wchar-44-nowarn.d: Likewise.
	* ld/testsuite/ld-arm/attr-merge-wchar-44.d: Likewise.
	* ld/testsuite/ld-arm/attr-merge.attr: Likewise.
	* ld/testsuite/ld-arm/attr-merge-div-0.s: New testcase.
	* ld/testsuite/ld-arm/attr-merge-div-00.d: Likewise.
	* ld/testsuite/ld-arm/attr-merge-div-01-m3.d: Likewise.
	* ld/testsuite/ld-arm/attr-merge-div-01.d: Likewise.
	* ld/testsuite/ld-arm/attr-merge-div-02.d: Likewise.
	* ld/testsuite/ld-arm/attr-merge-div-1.s: Likewise.
	* ld/testsuite/ld-arm/attr-merge-div-10-m3.d: Likewise.
	* ld/testsuite/ld-arm/attr-merge-div-10.d: Likewise.
	* ld/testsuite/ld-arm/attr-merge-div-11.d: Likewise.
	* ld/testsuite/ld-arm/attr-merge-div-12.d: Likewise.
	* ld/testsuite/ld-arm/attr-merge-div-120.d: Likewise.
	* ld/testsuite/ld-arm/attr-merge-div-2.s: Likewise.
	* ld/testsuite/ld-arm/attr-merge-div-20.d: Likewise.
	* ld/testsuite/ld-arm/attr-merge-div-21.d: Likewise.
	* ld/testsuite/ld-arm/attr-merge-div-22.d: Likewise.
 2012-03-16 14:02:33 +00:00