Correct the handling of `.option pic0' and `.option pic2' GAS pseudo-ops
in relaxation and use the setting of `mips_pic' (which these directives
control) as at the time a relaxed frag has been created rather than the
final `mips_pic' setting at the end of the source file processed.
To do so record whether `mips_pic' is NO_PIC or not in the frag itself
and use this information throughout relaxation instead of `mips_pic' to
decide which of NO_PIC or SVR4_PIC to produce machine code for, fixing
code generation and removing a possible fatal failure reproducible with:
$ as -32 --relax-branch -o option-pic-relax-3.o option-pic-relax-3.s
option-pic-relax-3.s: Assembler messages:
option-pic-relax-3.s:7: Warning: relaxed out-of-range branch into a jump
option-pic-relax-3.s: Internal error in cvt_frag_to_fill at .../gas/write.c:490.
Please report this bug.
$
using the test source included, due to a buffer overrun in filling the
variable part of a frag.
Likewise use the `fx_tcbit2' flag of a BFD_RELOC_16_PCREL_S2 fixup to
handle the simple case of substituting an out of range unconditional
branch with an equivalent absolute jump in NO_PIC code.
Retain the current way of VXWORKS_PIC use, which commit 41a1578ed1
("MIPS/GAS: Sanitize `.option picX' pseudo-op") has forbidden the use of
`.option picX' with.
gas/
* config/tc-mips.c (RELAX_ENCODE): Add `PIC' flag.
(RELAX_PIC): New macro.
(RELAX_USE_SECOND, RELAX_SECOND_LONGER, RELAX_NOMACRO)
(RELAX_DELAY_SLOT, RELAX_DELAY_SLOT_16BIT)
(RELAX_DELAY_SLOT_SIZE_FIRST, RELAX_DELAY_SLOT_SIZE_SECOND):
Shift bits.
(RELAX_BRANCH_ENCODE): Add `pic' flag.
(RELAX_BRANCH_UNCOND, RELAX_BRANCH_LIKELY, RELAX_BRANCH_LINK)
(RELAX_BRANCH_TOOFAR): Shift bits.
(RELAX_BRANCH_PIC): New macro.
(RELAX_MICROMIPS_ENCODE): Add `pic' flag.
(RELAX_MICROMIPS_PIC): New macro.
(RELAX_MICROMIPS_UNCOND, RELAX_MICROMIPS_COMPACT)
(RELAX_MICROMIPS_LINK, RELAX_MICROMIPS_NODS)
(RELAX_MICROMIPS_RELAX32): Shift bits.
(relax_close_frag): Pass `mips_pic' setting to RELAX_ENCODE.
(append_insn): Pass `mips_pic' setting to RELAX_BRANCH_ENCODE
and RELAX_MICROMIPS_ENCODE, and record it in `fx_tcbit2' of the
first fixup created.
(md_apply_fix) <BFD_RELOC_16_PCREL_S2>: Use `fx_tcbit2' of the
fixup processed rather than `mips_pic' in choosing to relax an
out of range branch to a jump.
(relaxed_branch_length): Use the `pic' flag of the relaxed frag
rather than `mips_pic'.
(relaxed_micromips_32bit_branch_length): Likewise.
(md_estimate_size_before_relax): Likewise.
(md_convert_frag): Likewise.
* testsuite/gas/mips/option-pic-relax-0.d: New test.
* testsuite/gas/mips/option-pic-relax-1.d: New test.
* testsuite/gas/mips/option-pic-relax-2.d: New test.
* testsuite/gas/mips/option-pic-relax-3.d: New test.
* testsuite/gas/mips/option-pic-relax-3a.d: New test.
* testsuite/gas/mips/option-pic-relax-4.d: New test.
* testsuite/gas/mips/option-pic-relax-5.d: New test.
* testsuite/gas/mips/option-pic-relax-2.l: New stderr output.
* testsuite/gas/mips/option-pic-relax-3.l: New stderr output.
* testsuite/gas/mips/option-pic-relax-4.l: New stderr output.
* testsuite/gas/mips/option-pic-relax-5.l: New stderr output.
* testsuite/gas/mips/option-pic-relax-0.s: New test source.
* testsuite/gas/mips/option-pic-relax-1.s: New test source.
* testsuite/gas/mips/option-pic-relax-2.s: New test source.
* testsuite/gas/mips/option-pic-relax-3.s: New test source.
* testsuite/gas/mips/option-pic-relax-4.s: New test source.
* testsuite/gas/mips/option-pic-relax-5.s: New test source.
* testsuite/gas/mips/mips.exp: Run the new tests.
x86, PLT relocation may contain R_386_TLS_DESC or R_X86_64_TLSDESC
even though there is no real PLT. We need to add DT_PLTRELSZ, DT_PLTREL
and DT_JMPREL if there is a .rel.plt/.rela.plt section.
bfd/
* elf32-i386.c (elf_i386_size_dynamic_sections): Alwasys add
DT_PLTRELSZ, DT_PLTREL and DT_JMPREL for .rel.plt section.
* elf64-x86-64.c (elf_x86_64_size_dynamic_sections): Alwasys
add DT_PLTRELSZ, DT_PLTREL and DT_JMPREL for .rela.plt section.
ld/
* testsuite/ld-i386/tlsdesc2.d: New test.
* testsuite/ld-x86-64/tlsdesc2.d: Likewise.
PR binutils/21407
* bucomm.c (get_file_size): Return -1 if file_name is NULL.
* ar.c (main): Fail with usage() invocation if no file names are
provided.
* readelf.c (process_section_headers): Warn about overlarge
sections.
(print_gnu_build_attribute_name): Print the number of unrecognised
note types. Fix formatting in the presence of errors.
(testsuite/binutils-all/note-2-32.s): Fix encoding of numeric notes.
(testsuite/binutils-all/note-2-64.s): Likewise.
Recently a feature called "return address signing" has been added to GCC to
prevent stack smash stack on AArch64. For details please refer:
https://gcc.gnu.org/ml/gcc-patches/2017-01/msg00376.html
GDB needs to be aware of this feature so it can restore the original return
address which is critical for unwinding.
On compiler side, whenever return address, i.e. LR register, is mangled or
restored by hardware instruction, compiler is expected to generate a
DW_CFA_AARCH64_negate_ra_state to toggle return address signing status.
DW_CFA_AARCH64_negate_ra_state is using the same CFI number and
therefore need to be multiplexed with DW_CFA_GNU_window_save which was designed
for SPARC.
A new gdbarch method "execute_dwarf_cfa_vendor_op" is introduced by this patch.
It's parameters has been restricted to those only needed by SPARC and AArch64
for multiplexing DW_CFA_GNU_window_save which is a CFI operation takes none
operand. Should any further DWARF CFI operation want to be multiplexed in the
future, the parameter list can be extended. Below is the current function
prototype.
typedef int (gdbarch_execute_dwarf_cfa_vendor_op_ftype)
(struct gdbarch *gdbarch, gdb_byte op, struct dwarf2_frame_state *fs);
DW_CFA_GNU_window_save support for SPARC is migrated to this new gdbarch
method by this patch.
gdb/
* gdbarch.sh: New gdbarch method execute_dwarf_cfa_vendor_op.
* gdbarch.c: Regenerated.
* gdbarch.h: Regenerated.
* dwarf2-frame.c (dwarf2_frame_state_alloc_regs): Made the
visibility external.
(execute_cfa_program): Call execute_dwarf_cfa_vendor_op for CFI
between DW_CFA_lo_user and DW_CFA_high_user inclusive.
(enum cfa_how_kind): Move to ...
(struct dwarf2_frame_state_reg_info): Likewise.
(struct dwarf2_frame_state): Likewise.
* dwarf2-frame.h: ... here.
(dwarf2_frame_state_alloc_regs): New declaration.
* sparc-tdep.c (sparc_execute_dwarf_cfa_vendor_op): New function.
(sparc32_gdbarch_init): Register execute_dwarf_cfa_vendor_op hook.
Complement commit e17b0c351f ("MIPS/BFD: Respect the ELF gABI dynamic
symbol table sort requirement") and correct an inconsistency in dynamic
symbol accounting data causing an assertion failure in the MIPS backend:
ld: BFD (GNU Binutils) 2.28.51.20170330 assertion fail
../../binutils-gdb/bfd/elfxx-mips.c:3860
in the course of making a GOT entry in a static binary to satisfy a GOT
relocation present in input, due to the local dynamic symbol count not
having been established.
To do so let backends request `_bfd_elf_link_renumber_dynsyms' to be
always called, rather than where a dynamic binary is linked only, and
then make this request in the MIPS backend.
bfd/
PR ld/21334
* elf-bfd.h (elf_backend_data): Add `always_renumber_dynsyms'
member.
* elfxx-target.h [!elf_backend_always_renumber_dynsyms]
(elf_backend_always_renumber_dynsyms): Define.
(elfNN_bed): Initialize `always_renumber_dynsyms' member.
* elfxx-mips.h (elf_backend_always_renumber_dynsyms): Define.
* elflink.c (bfd_elf_size_dynamic_sections): Also call
`_bfd_elf_link_renumber_dynsyms' if the backend has requested
it.
(bfd_elf_size_dynsym_hash_dynstr): Likewise.
ld/
PR ld/21334
* testsuite/ld-mips-elf/pr21334.dd: New test.
* testsuite/ld-mips-elf/pr21334.gd: New test.
* testsuite/ld-mips-elf/pr21334.ld: New test linker script.
* testsuite/ld-mips-elf/pr21334.s: New test source.
* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
Consistently call `_bfd_elf_link_renumber_dynsyms' only if linking a
dynamic binary, complementing code in `bfd_elf_size_dynsym_hash_dynstr'
and commit ccabcbe51e ("New attempt at fixing MIPS --gc-sections et
al."), <https://sourceware.org/ml/binutils/2005-08/msg00258.html>.
bfd/
* elflink.c (bfd_elf_size_dynamic_sections): Only call
`_bfd_elf_link_renumber_dynsyms' after section GC if dynamic
sections have been created.
A static, non-relocated global offset table will be embedded in static
binaries produced from objects containing any kind of GOT relocations,
generally PIC code. All symbols will have been resolved in static link
in such binaries making all GOT entries local and their values final as
there is no run-time load processing further performed.
Dump such GOT with `readelf -A' like already done with regular GOT, to
make it easier to examine static code that uses accesses via the GOT
pointer. There will be no dynamic segment or section in a static binary
to get the GOT pointer (DT_PLTGOT) from, so use section headers to find
a `.got' section instead.
binutils/
* readelf.c (process_mips_specific): Add static GOT support.
This patch changes readonly_p type to bool.
gdb:
2017-04-25 Yao Qi <yao.qi@linaro.org>
* regcache.c (struct regcache) <readonly_p>: Change its type
to bool.
(regcache_xmalloc_1): Update parameter type and callers update.
Unavailable data is handled gracefully in MIPS GOT processing done by
`print_mips_got_entry', so all that is needed in special GOT[1] handling
is to verify whether data can be retrieved for the purpose of the GNU
marker check done with `byte_get'. Remove the extra error reporting
code then, introduced with commit 75ec1fdbb7 ("Fix runtime seg-fault
in readelf when parsing a corrupt MIPS binary.") in the course of
addressing PR binutils/21344, and defer the error case to regular local
GOT entry processing.
binutils/
* readelf.c (process_mips_specific): Remove error reporting from
GOT[1] processing.
Null data is handled gracefully throughout in MIPS GOT processing, with
addresses printed normally and unavailable data shown as `<unknown>' by
`print_mips_got_entry', and special processing code for GOT[1] doing an
explicit check. Remove an unwanted null GOT data check then, introduced
with commit 592458412f in the course of addressing PR binutils/12855.
binutils/
* readelf.c (process_mips_specific): Remove null GOT data check.
enter/leave mnemonics are enhanced to not only accept register ranges
but also single register (i.e., r13) or even no GPR register at all.
gas/
2017-04-25 Claudiu Zissulescu <claziss@synopsys.com>
* testsuite/gas/arc/leave_enter.d: Update test.
* testsuite/gas/arc/leave_enter.s: Likewise.
opcodes/
2017-04-25 Claudiu Zissulescu <claziss@synopsys.com>
* arc-dis.c (print_insn_arc): Smartly print enter/leave mnemonics.
* arc-opc.c (insert_r13el): New function.
(R13_EL): Define.
* arc-tbl.h: Add new enter/leave variants.
NOP and MOV 0,0 are having the same encoding. As MOV mnemonic is
located before NOP in the instruction table, the disassembler prints
MOV 0,0 for NOP. Reorder the instructions such that NOP is first.
gas/
2017-04-25 Claudiu Zissulescu <claziss@synopsys.com>
* testsuite/gas/arc/b.d: Update test.
* testsuite/gas/arc/noargs_hs.d: Likewise.
opcode/
2017-04-25 Claudiu Zissulescu <claziss@synopsys.com>
* arc-tbl.h: Reorder NOP entry to be before MOV instructions.
The size of wchar_t on AArch64 and ARM is 4-byte, so we can use the
default value (4*TARGET_CHAR_BIT).
This patch fixes some fails in gdb.cp/wide_char_types.exp on
aarch64-linux.
gdb:
2017-04-25 Yao Qi <yao.qi@linaro.org>
* aarch64-tdep.c (aarch64_gdbarch_init): Don't call
set_gdbarch_wchar_bit.
* arm-tdep.c (arm_gdbarch_init): Likewise.
Complement commit 986e18a5a9 ("Add a second 'pinfo' member to
mips_opcode to extend number of available bits"),
<https://sourceware.org/ml/binutils/2005-01/msg00261.html>, and add a
help text for the `-M no-aliases' disassembler option.
opcodes/
* mips-dis.c (print_mips_disassembler_options): Add
`no-aliases'.
Complement commit 986e18a5a9 ("Add a second 'pinfo' member to
mips_opcode to extend number of available bits"),
<https://sourceware.org/ml/binutils/2005-01/msg00261.html>, and annotate
MIPS16 NOP, LA, DLA and the synthetic forms of LD and LW instructions as
aliases. These correspond to MOVE, and the PC-relative ADDIU, DADDIU,
LD and LW hardware instructions respectively.
binutils/
* testsuite/binutils-all/mips/mips16-alias.d: New test.
* testsuite/binutils-all/mips/mips16-noalias.d: New test.
* testsuite/binutils-all/mips/mips16-alias.s: New test source.
* testsuite/binutils-all/mips/mips.exp: Run the new tests.
opcodes/
* mips16-opc.c (AL): New macro.
(mips16_opcodes): Mark "nop", "la", "dla", and synthetic forms
of "ld" and "lw" as aliases.
Correct the size of a BFD_RELOC_MIPS16_16_PCREL_S1 fixup made in
`md_convert_frag', fixing a bug introduced with commit c9775dde32
("MIPS16: Add R_MIPS16_PC16_S1 branch relocation support)". Add test
cases to verify that the overflow of this fixup's in-place addend is
still correctly detected.
gas/
* config/tc-mips.c (md_convert_frag): Correct
BFD_RELOC_MIPS16_16_PCREL_S1 fixup size.
* testsuite/gas/mips/mips16-branch-addend-4.d: New test.
* testsuite/gas/mips/mips16-branch-addend-5.d: New test.
* testsuite/gas/mips/mips16-branch-addend-5.l: New stderr
output.
* testsuite/gas/mips/mips16-branch-addend-4.s: New test source.
* testsuite/gas/mips/mips16-branch-addend-5.s: New test source.
* testsuite/gas/mips/mips.exp: Run the new tests.
This patch avoids CALL instructions to be optimized into branches if
the symbols referred to in the CALL instruction are not fully resolved
at the time the assembler writes its output.
Tested in sparc64-linux-gnu and sparc-sun-sunos4.1.3 targets.
No regressions.
gas/ChangeLog:
2017-04-25 Jose E. Marchesi <jose.marchesi@oracle.com>
PR gas/21407
* config/tc-sparc.c (md_apply_fix): Do not transform `call'
instructions into branch instructions in fixups generating
additional relocations.
* testsuite/gas/sparc/call-relax.s: New file.
* testsuite/gas/sparc/call-relax.d: Likewise.
* testsuite/gas/sparc/call-relax-aout.d: Likewise.
* testsuite/gas/sparc/sparc.exp: Test call-relax and call-relax-aout.
This patch catches invalid initialization of non-POD types with
memset, at compile time.
This is what I used to catch the problems fixed by the previous
patches in the series:
$ make -k 2>&1 | grep "deleted function"
src/gdb/breakpoint.c:951:53: error: use of deleted function ‘void* memset(T*, int, size_t) [with T = bp_location; <template-parameter-1-2> = void; size_t = long unsigned int]’
src/gdb/breakpoint.c:7325:32: error: use of deleted function ‘void* memset(T*, int, size_t) [with T = bp_location; <template-parameter-1-2> = void; size_t = long unsigned int]’
src/gdb/btrace.c:1153:42: error: use of deleted function ‘void* memset(T*, int, size_t) [with T = btrace_insn; <template-parameter-1-2> = void; size_t = long unsigned int]’
...
gdb/ChangeLog:
2017-04-25 Pedro Alves <palves@redhat.com>
* common/common-defs.h: Include "common/poison.h".
* common/function-view.h: (Not, Or, Requires): Move to traits.h
and adjust.
* common/poison.h: New file.
* common/traits.h: Include <type_traits>.
(Not, Or, Requires): New, moved from common/function-view.h.
Eh, struct breakpoint was made non-POD just today, with commit
d28cd78ad8 ("Change breakpoint event locations to
event_location_up"). :-)
src/gdb/breakpoint.c: In function ‘void init_raw_breakpoint_without_location(breakpoint*, gdbarch*, bptype, const breakpoint_ops*)’:
src/gdb/breakpoint.c:7447:28: error: use of deleted function ‘void* memset(T*, int, size_t) [with T = breakpoint; <template-parameter-1-2> = void; size_t = long unsigned int]’
memset (b, 0, sizeof (*b));
^
In file included from src/gdb/common/common-defs.h:85:0,
from src/gdb/defs.h:28,
from src/gdb/breakpoint.c:20:
src/gdb/common/poison.h:56:7: note: declared here
void *memset (T *s, int c, size_t n) = delete;
^
gdb/ChangeLog:
2017-04-25 Pedro Alves <palves@redhat.com>
* breakpoint.h (struct breakpoint): In-class initialize all
fields. Make boolean fields "bool".
* breakpoint.c (init_raw_breakpoint_without_location): Remove
memset call and initializations no longer necessary.
struct btrace_insn is not a POD [1] so we shouldn't be using memset to
initialize it [2].
Use list-initialization instead, wrapped in a "pt insn to btrace insn"
function, which looks like just begging to be added next to the
existing pt_reclassify_insn/pt_btrace_insn_flags functions.
[1] - because its field "flags" is not POD, because enum_flags has a
non-trivial default ctor.
gdb/ChangeLog:
2017-04-25 Pedro Alves <palves@redhat.com>
* btrace.c (pt_btrace_insn_flags): Change parameter type to
reference.
(pt_btrace_insn): New function.
(ftrace_add_pt): Remove memset call and use pt_btrace_insn.
struct bp_location is not a POD, so we shouldn't be using memset to
initialize it.
Caught like this:
src/gdb/breakpoint.c: In function ‘bp_location** get_first_locp_gte_addr(CORE_ADDR)’:
src/gdb/breakpoint.c:950:53: error: use of deleted function ‘void* memset(T*, int, size_t) [with T = bp_location; <template-parameter-1-2> = void; size_t = long unsigned int]’
memset (&dummy_loc, 0, sizeof (struct bp_location));
^
In file included from src/gdb/defs.h:28:0,
from src/gdb/breakpoint.c:20:
src/gdb/common/common-defs.h:126:7: note: declared here
void *memset (T *s, int c, size_t n) = delete;
^
gdb/ChangeLog:
2017-04-25 Pedro Alves <palves@redhat.com>
* ada-lang.c (ada_catchpoint_location): Now a "class". Remove
"base" field and inherit from "bp_location" instead. Add
non-default ctor.
(allocate_location_exception): Use new non-default ctor.
* breakpoint.c (get_first_locp_gte_addr): Remove memset call.
(init_bp_location): Convert to ...
(bp_location::bp_location): ... this new ctor, and remove memset
call.
(base_breakpoint_allocate_location): Use the new non-default ctor.
* breakpoint.h (bp_location): Now a class. Declare default and
non-default ctors. In-class initialize all members.
(init_bp_location): Remove declaration.
The delete-memcpy-with-non-trivial-types patch exposed many instances
of this problem:
src/gdb/btrace.h: In function ‘btrace_insn_s* VEC_btrace_insn_s_quick_insert(VEC_btrace_insn_s*, unsigned int, const btrace_insn_s*, const char*, unsigned int)’:
src/gdb/common/vec.h:948:62: error: use of deleted function ‘void* memmove(T*, const U*, size_t) [with T = btrace_insn; U = btrace_insn; <template-parameter-1-3> = void; size_t = long unsigned int]’
memmove (slot_ + 1, slot_, (vec_->num++ - ix_) * sizeof (T)); \
^
src/gdb/common/vec.h:436:1: note: in expansion of macro ‘DEF_VEC_FUNC_O’
DEF_VEC_FUNC_O(T) \
^
src/gdb/btrace.h:84:1: note: in expansion of macro ‘DEF_VEC_O’
DEF_VEC_O (btrace_insn_s);
^
[...]
src/gdb/common/vec.h:1060:31: error: use of deleted function ‘void* memcpy(T*, const U*, size_t) [with T = btrace_insn; U = btrace_insn; <template-parameter-1-3> = void; size_t = long unsigned int]’
sizeof (T) * vec2_->num); \
^
src/gdb/common/vec.h:437:1: note: in expansion of macro ‘DEF_VEC_ALLOC_FUNC_O’
DEF_VEC_ALLOC_FUNC_O(T) \
^
src/gdb/btrace.h:84:1: note: in expansion of macro ‘DEF_VEC_O’
DEF_VEC_O (btrace_insn_s);
^
So, VECs (given it's C roots) rely on memcpy/memcpy of VEC elements to
be well defined, in order to grow/reallocate its internal elements
array. This means that we can only put trivially copyable types in
VECs. E.g., if a type requires using a custom copy/move ctor to
relocate, then we can't put it in a VEC (so we use std::vector
instead). But, as shown above, we're violating that requirement.
btrace_insn is currently not trivially copyable, because it contains
an enum_flags field, and that is itself not trivially copyable. This
patch corrects that, by simply removing the user-provided copy
constructor and assignment operator. The compiler-generated versions
work just fine.
Note that std::vector relies on std::is_trivially_copyable too to know
whether it can reallocate its elements with memcpy/memmove instead of
having to call copy/move ctors and dtors, so if we have types in
std::vectors that weren't trivially copyable because of enum_flags,
this will make such vectors more efficient.
gdb/ChangeLog:
2017-04-25 Pedro Alves <palves@redhat.com>
* common/enum-flags.h (enum_flags): Don't implement copy ctor and
assignment operator.
Force symbol dynamic if it isn't undefined weak. Generate relative
relocation for GOT reference against non-dynamic symbol in PIC to
avoid unnecessary dynamic symbols.
bfd/
* elf64-x86-64.c (elf_x86_64_link_hash_entry): Add
no_finish_dynamic_symbol.
(elf_x86_64_link_hash_newfunc): Set no_finish_dynamic_symbol to
0.
(elf_x86_64_allocate_dynrelocs): If a symbol isn't undefined
weak symbol, don't make it dynamic.
(elf_x86_64_relocate_section): If a symbol isn't dynamic in PIC,
set no_finish_dynamic_symbol and generate R_X86_64_RELATIVE
relocation for GOT reference.
(elf_x86_64_finish_dynamic_symbol): Abort if
no_finish_dynamic_symbol isn't 0.
ld/
* testsuite/ld-x86-64/no-plt.exp: Also check no-plt-1e.nd.
* testsuite/ld-x86-64/no-plt-1e.nd: New file.
Force symbol dynamic if it isn't undefined weak. Generate R_386_RELATIVE
relocation for R_386_GOT32 relocation against non-dynamic symbol in PIC.
PR ld/21402
* elf32-i386.c (elf_i386_allocate_dynrelocs): If a symbol isn't
undefined weak symbol, don't make it dynamic.
(elf_i386_relocate_section): If a symbol isn't dynamic in PIC,
set no_finish_dynamic_symbol and generate R_386_RELATIVE
relocation for R_386_GOT32.
The code can be replaced by floatformat_totalsize_bytes.
gdb:
2017-04-24 Yao Qi <yao.qi@linaro.org>
* doublest.c (convert_doublest_to_floatformat): Call
floatformat_totalsize_bytes.
commit f129e49f4d
Author: H.J. Lu <hjl.tools@gmail.com>
Date: Tue Jan 10 11:30:25 2017 -0800
Don't use elf_i386_eh_frame_plt directly
fixed i386 PLT eh_frame generation. Skip pr12570 tests since they are
for non-nacl targets.
* testsuite/ld-i386/pr12570a.d: Skip for nacl targets.
* testsuite/ld-i386/pr12570b.d: Likewise.
commit a27e437177
Author: Roland McGrath <roland@gnu.org>
Date: Thu Jul 28 22:35:15 2011 +0000
BFD vector for elf32-i386-nacl:
changed ELF_MAXPAGESIZE to 0x10000 for VxWorks. This patch fixes it
and updated testsuite/ld-i386/vxworks2.sd to add space for program
headers.
bfd/
PR ld/21425
* elf32-i386.c (ELF_MAXPAGESIZE): Set to 0x1000 for VxWorks.
ld/
PR ld/20815
* testsuite/ld-i386/vxworks2.sd: Add space for program headers.
The LDR rX, =cst pseudo-instruction suffers from two issues for loading
integer constants in Thumb mode:
- movs is used if the constant and register can be encoded using that
instruction which leads to unexpected behavior due to its flag-setting
behavior
- mov.w, movw and mvn are used for r13 (sp) and r15 (pc) but these
encoding are marked as UNPREDICTABLE
This patch fixes those issues and update testing accordingly.
2017-04-24 Thomas Preud'homme <thomas.preudhomme@arm.com>
gas/
* config/tc-arm.c (move_or_literal_pool): Remove code generating MOVS.
Forbid MOV.W and MOVW if destination is SP or PC.
* testsuite/gas/arm/thumb2_ldr_immediate_highregs_armv6t2.s: Explain
expectation of LDR not generating a MOVS for low registers and small
constants. Add tests of MOVW generation.
* testsuite/gas/arm/thumb2_ldr_immediate_highregs_armv6t2.d: Update
expected disassembly.
A few tests in the ld testsuite were expecting the disassembler to
emit `rett' instructions in V9. This patch updates the tests to
expect `return' instead.
ld/ChangeLog:
2017-04-24 Jose E. Marchesi <jose.marchesi@oracle.com>
* testsuite/ld-sparc/tlssunbin64.dd: Expect `return' instructions
instead of `rett' in V9.
* testsuite/ld-sparc/tlssunnopic64.dd: Likewise.
* testsuite/ld-sparc/tlssunpic64.dd: Likewise.
This patch fixes an assumption made by code that runs for objcopy and
strip, that SHT_REL/SHR_RELA sections are always named starting with a
.rel/.rela prefix. I'm also modifying the interface for
elf_backend_get_reloc_section, so any backend function just needs to
handle name mapping.
PR 21412
* elf-bfd.h (struct elf_backend_data <get_reloc_section>): Change
parameters and comment.
(_bfd_elf_get_reloc_section): Delete.
(_bfd_elf_plt_get_reloc_section): Declare.
* elf.c (_bfd_elf_plt_get_reloc_section, elf_get_reloc_section):
New functions. Don't blindly skip over assumed .rel/.rela prefix.
Extracted from..
(_bfd_elf_get_reloc_section): ..here. Delete.
(assign_section_numbers): Call elf_get_reloc_section.
* elf64-ppc.c (elf_backend_get_reloc_section): Define.
* elfxx-target.h (elf_backend_get_reloc_section): Update.
sim/aarch64/
* simulator.c (vec_load): Add M argument. Rewrite to iterate over
registers based on structure size.
(LD4, LD3, LD2, LD1_2, LD1_3, LD1_4): Pass new arg to vec_load.
(LD1_1): Replace with call to vec_load.
(vec_store): Add new M argument. Rewrite to iterate over registers
based on structure size.
(ST4, ST3, ST2, ST1_2, ST1_3, ST1_4): Pass new arg to vec_store.
(ST1_1): Replace with call to vec_store.
sim/testsuite/sim/aarch64/
* fcvtz.s, fstur.s, ldn_single.s, ldnr.s, mla.s, mls.s, uzp.s: Align
data.
* sumulh.s: Delete unnecessary data alignment.
* stn_single.s: Align data. Fix unaligned ldr insns. Adjust cmp
arguments to match change.
* ldn_multiple.s, stn_multiple.s: New.
This changes some spots to use ui_out_emit_list. This only touches
"easy" cases, where the cleanup was used in a block-structured way.
There's also one more use of ui_out_emit_tuple in here.
ChangeLog
2017-04-22 Tom Tromey <tom@tromey.com>
* mi/mi-cmd-file.c (mi_cmd_file_list_shared_libraries): Use
ui_out_emit_list.
* stack.c (print_frame): Use ui_out_emit_list.
* mi/mi-symbol-cmds.c (mi_cmd_symbol_list_lines): Use
ui_out_emit_list.
* mi/mi-main.c (print_one_inferior)
(mi_cmd_data_list_register_names)
(mi_cmd_data_list_register_values, mi_cmd_list_features)
(mi_cmd_list_target_features, mi_cmd_trace_frame_collected): Use
ui_out_emit_list.
* mi/mi-interp.c (mi_on_normal_stop_1): Use ui_out_emit_list.
(mi_output_solib_attribs): Use ui_out_emit_list,
ui_out_emit_tuple.
* mi/mi-cmd-var.c (varobj_update_one): Use ui_out_emit_list.
* mi/mi-cmd-stack.c (mi_cmd_stack_list_frames)
(mi_cmd_stack_list_args, list_args_or_locals): Use
ui_out_emit_list.
* disasm.c (do_assembly_only): Use ui_out_emit_list.
* breakpoint.c (print_solib_event, output_thread_groups): Use
ui_out_emit_list.
