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Author SHA1 Message Date
Richard Sandiford
a596001ece include/opcodes/ 
* m68k.h (mcf_mask): Define.

opcodes/
	* m68k-opc.c (m68k_opcodes): Fix the masks of the Coldfire fmovemd
	and fmovem entries.  Put register list entries before immediate
	mask entries.  Use "l" rather than "L" in the fmovem entries.
	* m68k-dis.c (match_insn_m68k): Remove the PRIV argument and work it
	out from INFO.
	(m68k_scan_mask): New function, split out from...
	(print_insn_m68k): ...here.  If no architecture has been set,
	first try printing an m680x0 instruction, then try a Coldfire one.

gas/testsuite/
	* gas/m68k/mcf-fpu.s: Add fmovemd and fmovem instructions.
	* gas/m68k/mcf-fpu.d: Adjust accordingly.
 2006-05-25 08:09:03 +00:00
Nick Clifton
4a4d496a37 Updated Vietnamese and Irish translations 2006-05-24 07:54:45 +00:00
Nick Clifton
a854efa328 * crx-dis.c (EXTRACT): Make macro work on 64-bit hosts. 2006-05-22 08:40:09 +00:00
Nick Clifton
0bd7906139 Updated Dutch translation 2006-05-22 08:33:35 +00:00
Nick Clifton
7ff7c29e1f Remove ChangeLog entries, since the template files were already up to date. 2006-05-22 08:30:57 +00:00
Nick Clifton
5002adadc5 Update translation templates 2006-05-22 08:25:15 +00:00
Alan Modra
00988f494c * avr-dis.c: Formatting fix. 2006-05-17 23:44:58 +00:00
Thiemo Seufer
9b3f89ee00 [ gas/ChangeLog ] 
* config/tc-mips.c (macro_build): Test for currently active
	mips16 option.
	(mips16_ip): Reject invalid opcodes.

	[ opcodes/ChangeLog ]
	* mips16-opc.c (I1, I32, I64): New shortcut defines.
	(mips16_opcodes): Change membership of instructions to their
	lowest baseline ISA.

	[ gas/testsuite/ChangeLog ]
	* gas/mips/mips.exp: Run new tests.
	* gas/mips/mips16e.s, gas/mips/mips16e.d, gas/mips/mips16e-64.s,
	gas/mips/mips16e-64.d, gas/mips/mips16e-64.l: New tests.
 2006-05-14 15:35:22 +00:00
H.J. Lu
cb6d34334f gas/testsuite/ 
2006-05-09  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/i386.exp: Run x86-64-gidt.

	* gas/i386/x86-64-gidt.d: New file.
	* gas/i386/x86-64-gidt.s: Likewise.

opcodes/

2006-05-09  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (grps): Update sgdt/sidt for 64bit.
 2006-05-09 16:05:40 +00:00
Julian Brown
1f3c39b9e6 * arm-dis.c (coprocessor_opcodes): Don't interpret fldmx/fstmx as 
vldm/vstm.
 2006-05-05 18:56:01 +00:00
Thiemo Seufer
d43b4baf07 [ gas/ChangeLog ] 
* config/tc-mips.c (macro_build): Add case 'k' to handle cache
	instruction.
	(macro): Add new case M_CACHE_AB.

	[ opcodes/ChangeLog ]
	* mips-opc.c: Add macro for cache instruction.

	[ include/opcode/ChangeLog ]
	* mips.h (enum): Add macro M_CACHE_AB.
 2006-05-05 15:41:23 +00:00
Thiemo Seufer
39a7806dae [ gas/testsuite/ChangeLog ] 
2006-05-04  Thiemo Seufer  <ths@mips.com>
            Nigel Stephens  <nigel@mips.com>

        * gas/mips/mips.exp: Run mips32-dsp tests only for mips32r2.
        * gas/mips/set-arch.d: Adjust according to opcode table changes.

[ include/opcode/ChangeLog ]
2006-05-04  Thiemo Seufer  <ths@mips.com>
            Nigel Stephens  <nigel@mips.com>
            David Ung  <davidu@mips.com>

        * mips.h: Add INSN_SMARTMIPS define.

[ opcodes/ChangeLog ]
2006-05-04  Thiemo Seufer  <ths@mips.com>
            Nigel Stephens  <nigel@mips.com>
            David Ung  <davidu@mips.com>

        * mips-dis.c (mips_arch_choices): Add smartmips instruction
        decoding to MIPS32 and MIPS32R2.  Limit DSP decoding to release
        2 ISAs.  Add MIPS3D decoding to MIPS32R2.  Add MT decoding to
        MIPS64R2.
        * mips-opc.c: fix random typos in comments.
        (INSN_SMARTMIPS): New defines.
        (mips_builtin_opcodes): Add paired single support for MIPS32R2.
        Move bc3f, bc3fl, bc3t, bc3tl downwards.  Move flushi, flushd,
        flushid, wb upwards.  Move cfc3, ctc3 downwards.  Rework the
        FP_S and FP_D flags to denote single and double register
        accesses separately.  Move dmfc3, dmtc3, mfc3, mtc3 downwards.
        Allow jr.hb and jalr.hb for release 1 ISAs.  Allow luxc1, suxc1
        for MIPS32R2.  Add SmartMIPS instructions.  Add two-argument
        variants of bc2f, bc2fl, bc2t, bc2tl.  Add mfhc2, mthc2 to
        release 2 ISAs.
        * mips16-opc.c (mips16_opcodes): Add sdbbp instruction.
 2006-05-04 10:47:05 +00:00
Thiemo Seufer
104b4fab38 2006-05-03 Thiemo Seufer <ths@mips.com> 
[ opcodes/ChangeLog ]
        * mips-opc.c (mips_builtin_opcodes): Fix mftr argument order.

        [ gas/testsuite/ChangeLog ]
        * gas/mips/mips32-mt.d: Fix mftr argument order.
 2006-05-03 20:59:20 +00:00
Thiemo Seufer
022fac6d2a * mips-dis.c (print_insn_args): Force mips16 to odd addresses. 
(print_mips16_insn_arg): Force mips16 to odd addresses.
 2006-05-02 11:12:41 +00:00
Thiemo Seufer
9bcd4f993c [ gas/ChangeLog ] 
2006-04-30  Thiemo Seufer  <ths@mips.com>
            David Ung  <davidu@mips.com>

        * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
        (mips_immed): New table that records various handling of udi
        instruction patterns.
        (mips_ip): Adds udi handling.

[ include/opcode/ChangeLog ]
2006-04-30  Thiemo Seufer  <ths@mips.com>
            David Ung  <davidu@mips.com>

        * mips.h: Defines udi bits and masks.  Add description of
        characters which may appear in the args field of udi
        instructions.

[ opcodes/ChangeLog ]
2006-04-30  Thiemo Seufer  <ths@mips.com>
            David Ung  <davidu@mips.com>

        * mips-opc.c (mips_builtin_opcodes): Add udi instructions
        "udi0" to "udi15".
        * mips-dis.c (print_insn_args): Adds udi argument handling.
 2006-04-30 18:34:39 +00:00
Jim Wilson
f095b97b59 Fix buglet noticed while looking at PR 1298. 
* m68k-dis.c (match_insn_m68k): Restore fprintf_func before printing
error message.
 2006-04-29 03:11:31 +00:00
Thiemo Seufer
bdb09db1cf Don't mis-spell your boss' name... 2006-04-28 13:38:49 +00:00
Thiemo Seufer
59c455b37c [ opcodes/ChangeLog ] 
2006-04-28  Thiemo Seufer  <ths@mips.com>
            David Ung  <davidu@mips.com>
            Nigel Stevens  <nigel@mips.com>

	* mips-dis.c (mips_cp0sel_names_mips3264r2): Add MT register
        names.

[ gas/testsuite/ChangeLog ]
2006-04-28  Thiemo Seufer  <ths@mips.com>
            David Ung  <davidu@mips.com>
            Nigel Stevens  <nigel@mips.com>

	* gas/mips/cp0sel-names-mips32r2.d,
	gas/mips/cp0sel-names-mips64r2.d: Update for MT register names.
 2006-04-28 13:17:00 +00:00
Thiemo Seufer
cc0ca239ed * mips-dis.c (print_insn_args): Add mips_opcode argument. 
(print_insn_mips):  Adjust print_insn_args call.
 2006-04-28 12:59:30 +00:00
Thiemo Seufer
0d09bfe6d3 * mips-dis.c (print_insn_args): Print $fcc only for FP 
instructions, use $cc elsewise.
 2006-04-28 12:19:31 +00:00
Thiemo Seufer
654c225a6d * opcodes/mips-dis.c (mips16_to_32_reg_map, mips16_reg_names): 
Map MIPS16 registers to O32 names.
	(print_mips16_insn_arg): Use mips16_reg_names.
 2006-04-28 11:42:28 +00:00
Julian Brown
0dbde4cf38 * arm-dis.c (print_insn_neon): Disassemble floating-point constant 
VMOV.
 2006-04-26 16:02:07 +00:00
Julian Brown
16980d0b05 * opcodes/arm-dis.c (coprocessor_opcodes): Add %A, %B, %k, convert 
%<code>[zy] into %[zy]<code>.  Expand meaning of %<bitfield>['`?].
	Add unified load/store instruction names.
	(neon_opcode_table): New.
	(arm_opcodes): Expand meaning of %<bitfield>['`?].
	(arm_decode_bitfield): New.
	(print_insn_coprocessor): Add pc argument. Add %A & %B specifiers.
	Use arm_decode_bitfield and adjust numeric specifiers. Adjust %z & %y.
	(print_insn_neon): New.
	(print_insn_arm): Adjust print_insn_coprocessor call. Call
	print_insn_neon. Use arm_decode_bitfield and adjust numeric specifiers.
	(print_insn_thumb32): Likewise.
 2006-04-26 15:40:55 +00:00
Alan Modra
ec3fcc5688 * Makefile.am: Run "make dep-am". 
* Makefile.in: Regenerate.
 2006-04-19 12:10:21 +00:00
Alan Modra
7c6646cd4b * avr-dis.c (avr_operand): Warning fix. 2006-04-19 02:15:05 +00:00
Alan Modra
241a6c40c8 bfd/ 
* warning.m4 (--enable-werror, -build-warnings): Format help messages.
	* configure: Regenerate.
binutils/
	* configure: Regenerate.
gas/
	* configure.in (--enable-targets): Indent help message.
	* configure: Regenerate.
gprof/
	* configure: Regenerate.
ld/
	* configure: Regenerate.
opcodes/
	* configure: Regenerate.
 2006-04-19 02:06:15 +00:00
Daniel Jacobowitz
e740356690 Update POTFILES.in. 2006-04-16 18:25:11 +00:00
Nick Clifton
52f16a0ef4 PR binutils/2454 
* avr-dis.c (avr_operand): Arrange for a comment to appear before the symolic
form of an address, so that the output of objdump -d can be reassembled.
 2006-04-12 13:09:10 +00:00
DJ Delorie
e78efa90d6 * m32c.opc (parse_unsigned_bitbase): Take a new parameter which 
decides if this function accepts symbolic constants or not.
(parse_signed_bitbase): Likewise.
(parse_unsigned_bitbase8): Pass the new parameter.
(parse_unsigned_bitbase11): Likewise.
(parse_unsigned_bitbase16): Likewise.
(parse_unsigned_bitbase19): Likewise.
(parse_unsigned_bitbase27): Likewise.
(parse_signed_bitbase8): Likewise.
(parse_signed_bitbase11): Likewise.
(parse_signed_bitbase19): Likewise.
* m32c-asm.c: Regenerate.
 2006-04-10 21:19:14 +00:00
Carlos O'Donell
108a6f8eb4 2006-04-06 Carlos O'Donell <carlos@codesourcery.com> 
* Makefile.tpl: Add install-html target.
	* Makefile.def: Add install-html target.
	* Makefile.in: Regenerate.
	* configure.in: Add --with-datarootdir, --with-docdir,
	and --with-htmldir options.
	* configure: Regenerate.

bfd/

2006-04-06  Carlos O'Donell  <carlos@codesourcery.com>

	* po/Make-in: Add install-html target.
	* Makefile.am: Rename docdir to bfddocdir. Add datarootdir, docdir
	htmldir. Add install-html and install-html-recursive targets.
	* Makefile.in: Regenerate.
	* configure.in: AC_SUBST for datarootdir, docdir and htmldir.
	* configure: Regenerate.

bfd/doc/

2006-04-06  Carlos O'Donell  <carlos@codesourcery.com>

	* Makefile.am: Add install-html and install-html-am targets.
	Define datarootdir, docdir and htmldir.
	* Makefile.in: Regenerate.

binutils/

2006-04-06  Carlos O'Donell  <carlos@codesourcery.com>

	* po/Make-in: Add install-html target.
	* Makefile.am: Add install-html and install-html-recursive targets.
	* Makefile.in: Regenerate.
	* configure.in: AC_SUBST datarootdir, docdir and htmldir.
	* configure: Regenerate.
	* doc/Makefile.am: Add install-html and install-html-am targets.
	* doc/Makefile.in: Regenerate.

etc/

2006-04-06  Carlos O'Donell  <carlos@codesourcery.com>

	* Makefile.in: Add install-html target. Add htmldir,
	docdir and datarootdir.
	* configure.texi: Document install-html target.
	* configure.in: AC_SUBST datarootdir, docdir, htmldir.
	* configure: Regenerate.

gas/

2006-04-06  Carlos O'Donell  <carlos@codesourcery.com>

	* po/Make-in: Add install-html target.
	* Makefile.am: Add install-html and install-html-recursive targets.
	* Makefile.in: Regenerate.
	* configure.in: AC_SUBST datarootdir, docdir, htmldir.
	* configure: Regenerate.
	* doc/Makefile.am: Add install-html and install-html-am targets.
	* doc/Makefile.in: Regenerate.

gprof/

2006-04-06  Carlos O'Donell  <carlos@codesourcery.com>

	* po/Make-in: Add install-html target.
	* Makefile.am: Add install-html, install-html-am and
	install-html-recursive targets.
	* Makefile.in: Regenerate.
	* configure.in: AC_SUBST datarootdir, docdir, htmldir.
	* configure: Regenerate.

intl/

2006-04-06  Carlos O'Donell  <carlos@codesourcery.com>

	* intl/Makefile.in: Add html info and dvi and install-html to .PHONY
	Add install-html target.

ld/

2006-04-06  Carlos O'Donell  <carlos@codesourcery.com>

	* Makefile.am: Add install-html, install-html-am, and
	install-html-recursive targets.
	* Makefile.in: Regenerate.
	* configure.in: AC_SUBST datarootdir, docdir, htmldir.
	* configure: Regenerate.
	* po/Make-in: Add install-html target.

opcodes/

2006-04-06  Carlos O'Donell  <carlos@codesourcery.com>

	* Makefile.am: Add install-html target.
	* Makefile.in: Regenerate.
 2006-04-06 21:49:35 +00:00
Nick Clifton
a135cb2ce1 Updated Vietnamese translation. 2006-04-06 10:09:41 +00:00
Alan Modra
47426b4127 * pdp11-opc.c (pdp11_opcodes): Fix opcode for SEC instruction. 2006-03-31 11:43:14 +00:00
Bernd Schmidt
331f1cbe1c * bfin-dis.c (decode_dsp32shiftimm_0): Simplify and correct the 
logic to identify halfword shifts.
 2006-03-16 19:09:48 +00:00
Paul Brook
c16d2bf065 2006-03-16 Paul Brook <paul@codesourcery.com> 
gas/
	* config/tc-arm.c (insns): Add "svc".
gas/testsuite/
	* gas/arm/svc.d: New test.
	* gas/arm/svc.s: New test.
	* gas/arm/inst.d: Accept svc mnemonic.
	* gas/arm/thumb.d: Ditto.
	* gas/arm/wince_inst.d: Ditto.
opcodes/
	* arm-dis.c (arm_opcodes): Rename swi to svc.
	(thumb_opcodes): Ditto.
 2006-03-16 15:08:48 +00:00
DJ Delorie
5398310abc * m32c-asm.c: Regenerate. 
* m32c-desc.c: Likewise.
* m32c-desc.h: Likewise.
* m32c-dis.c: Likewise.
* m32c-ibld.c: Likewise.
* m32c-opc.c: Likewise.
* m32c-opc.h: Likewise.
 2006-03-14 04:23:52 +00:00
DJ Delorie
5348b81e4c i* m32c-desc.c: Regenerate. 
* m32c-opc.c: Likewise.
* m32c-opc.h: Likewise.
 2006-03-14 00:30:59 +00:00
DJ Delorie
253d272cfc * m32c.cpu (mul.l): New. 
(mulu.l): New.
* m32c-desc.c: Regenerate with mul.l, mulu.l.
* m32c-opc.c: Likewise.
* m32c-opc.h: Likewise.
 2006-03-11 02:23:19 +00:00
Nick Clifton
f530741d16 Update Swedish translations 2006-03-09 17:28:11 +00:00
H.J. Lu
35c52694b9 gas/testsuite/ 
2006-03-07  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/2428
	* gas/i386/i386.exp: Add rep, rep-suffix, x86-64-rep and
	x86-64-rep-suffix.

	* gas/i386/naked.d: Replace repz with rep.
	* gas/i386/x86_64.d: Likewise.

	* gas/i386/rep-suffix.d: New file.
	* gas/i386/rep-suffix.s: Likewise.
	* gas/i386/rep.d: Likewise.
	* gas/i386/rep.s: Likewise.
	* gas/i386/x86-64-rep-suffix.d: Likewise.
	* gas/i386/x86-64-rep-suffix.s: Likewise.
	* gas/i386/x86-64-rep.d: Likewise.
	* gas/i386/x86-64-rep.s: Likewise.

opcodes/

2006-03-07  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/2428
	* i386-dis.c (REP_Fixup): New function.
	(AL): Remove duplicate.
	(Xbr): New.
	(Xvr): Likewise.
	(Ybr): Likewise.
	(Yvr): Likewise.
	(indirDXr): Likewise.
	(ALr): Likewise.
	(eAXr): Likewise.
	(dis386): Updated entries of ins, outs, movs, lods and stos.
 2006-03-07 20:18:06 +00:00
Nick Clifton
ed963e2de8 * cgen-ibld.in (insert_normal): Cope with attempts to insert a signed 32-bit 
value into an unsigned 32-bit field when the host is a 64-bit machine.
 2006-03-05 08:38:53 +00:00
Nick Clifton
c7d41dc5a0 Fix parseing functions to return an error message if the parse failed 2006-03-03 15:57:43 +00:00
Carlos O'Donell
f7d9e5c379 bfd/doc/ 
2006-10-14  Carlos O'Donell  <carlos@codesourcery.com>

       * Makefile.am: Add html target.
       * Makefile.in: Regenerate.

bfd/
2006-10-14  Carlos O'Donell  <carlos@codesourcery.com>

       * po/Make-in: Add html target.

binutils/
2006-10-14  Carlos O'Donell  <carlos@codesourcery.com>

       * po/Make-in: Add html target.

gas/
2006-10-14  Carlos O'Donell  <carlos@codesourcery.com>

       * doc/Makefile.am: Add html target.
       * doc/Makefile.in: Regenerate.
       * po/Make-in: Add html target.

gprof/
2006-10-14  Carlos O'Donell  <carlos@codesourcery.com>

       * po/Make-in: Add html target.

ld/
2006-10-14  Carlos O'Donell  <carlos@codesourcery.com>

       * Makefile.am: Add html target.
       * Makefile.in: Regenerate.
       * po/Make-in: Add html target.

opcodes/
2006-10-14  Carlos O'Donell  <carlos@codesourcery.com>

       * po/Make-in: Add html target.

etc/
2006-10-14  Carlos O'Donell  <carlos@codesourcery.com>

       * Makefile.in: TEXI2HTML uses makeinfo. Define
       HTMLFILES. Add html targets.
       * configure.texi: Use ifnottex. Add alternative
       image format specifier as jpg.
       * standards.texi: Use ifnottex.

intl/
2006-10-14  Carlos O'Donell  <carlos@codesourcery.com>

       * intl/Makefile.in: Add html target.
 2006-02-27 16:26:26 +00:00
H.J. Lu
331d2d0d9c gas/ 
2006-02-27  H.J. Lu <hongjiu.lu@intel.com>

	* gas/config/tc-i386.c (output_insn): Support Intel Merom New
	Instructions.

	* gas/config/tc-i386.h (CpuMNI): New.
	(CpuUnknownFlags): Add CpuMNI.

gas/testsuite/

2006-02-27  H.J. Lu <hongjiu.lu@intel.com>

	* gas/i386/i386.exp: Add merom and x86-64-merom.

	* gas/i386/merom.d: New file.
	* gas/i386/merom.s: Likewise.
	* gas/i386/x86-64-merom.d: Likewise.
	* gas/i386/x86-64-merom.s: Likewise.

include/opcode/

2006-02-27  H.J. Lu <hongjiu.lu@intel.com>

	* i386.h (i386_optab): Support Intel Merom New Instructions.

opcodes/

2006-02-27  H.J. Lu <hongjiu.lu@intel.com>

	* i386-dis.c (IS_3BYTE_OPCODE): New for 3-byte opcodes used by
	Intel Merom New Instructions.
	(THREE_BYTE_0): Likewise.
	(THREE_BYTE_1): Likewise.
	(three_byte_table): Likewise.
	(dis386_twobyte): Use THREE_BYTE_0 for entry 0x38. Use
	THREE_BYTE_1 for entry 0x3a.
	(twobyte_has_modrm): Updated.
	(twobyte_uses_SSE_prefix): Likewise.
	(print_insn): Handle 3-byte opcodes used by Intel Merom New
	Instructions.
 2006-02-27 15:35:37 +00:00
David S. Miller
ff3f9d5b2a 2006-02-24 David S. Miller <davem@sunset.davemloft.net> 
* sparc-dis.c (v9_priv_reg_names): Add "gl" entry.
	(v9_hpriv_reg_names): New table.
	(print_insn_sparc): Allow values up to 16 for '?' and '!'.
	New cases '$' and '%' for read/write hyperprivileged register.
	* sparc-opc.c (sparc_opcodes): Add new entries for UA2005
	window handling and rdhpr/wrhpr instructions.
 2006-02-25 01:33:24 +00:00
DJ Delorie
6772dd07c4 [include/elf] 
* m32c.h: Add relax relocs.

[cpu]
	* m32c.cpu (RL_TYPE): New attribute, with macros.
	(Lab-8-24): Add RELAX.
	(unary-insn-defn-g, binary-arith-imm-dst-defn,
	binary-arith-imm4-dst-defn): Add 1ADDR attribute.
	(binary-arith-src-dst-defn): Add 2ADDR attribute.
	(jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a,
	jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP
	attribute.
	(jsri16, jsri32): Add 1ADDR attribute.
	(jsr32.w, jsr32.a): Add JUMP attribute.

[opcodes]
	* m32c-desc.c: Regenerate with linker relaxation attributes.
	* m32c-desc.h: Likewise.
	* m32c-dis.c: Likewise.
	* m32c-opc.c: Likewise.

[gas]
	* config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
	(tc_gen_reloc): Don't define.
	* config/tc-m32c.c (rl_for, relaxable): New convenience macros.
	(OPTION_LINKRELAX): New.
	(md_longopts): Add it.
	(m32c_relax): New.
	(md_parse_options): Set it.
	(md_assemble): Emit relaxation relocs as needed.
	(md_convert_frag): Emit relaxation relocs as needed.
	(md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
	(m32c_apply_fix): New.
	(tc_gen_reloc): New.
	(m32c_force_relocation): Force out jump relocs when relaxing.
	(m32c_fix_adjustable): Return false if relaxing.

[bfd]
	* elf32-m32c.c (m32c_elf_howto_table): Add relaxation relocs.
	(m32c_elf_relocate_section): Don't relocate them.
	(compare_reloc): New.
	(relax_reloc): Remove.
	(m32c_offset_for_reloc): New.
	(m16c_addr_encodings): New.
	(m16c_jmpaddr_encodings): New.
	(m32c_addr_encodings): New.
	(m32c_elf_relax_section): Relax jumps and address displacements.
	(m32c_elf_relax_delete_bytes): Adjust for internal syms.  Fix up
	short jumps.

	* reloc.c: Add m32c relax relocs.
	* libbfd.h: Regenerate.
 2006-02-24 22:10:36 +00:00
Paul Brook
62b3e31101 2006-02-24 Paul Brook <paul@codesourcery.com> 
gas/
	* config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
	arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
	(struct asm_barrier_opt): Define.
	(arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
	(parse_psr): Accept V7M psr names.
	(parse_barrier): New function.
	(enum operand_parse_code): Add OP_oBARRIER.
	(parse_operands): Implement OP_oBARRIER.
	(do_barrier): New function.
	(do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
	(do_t_cpsi): Add V7M restrictions.
	(do_t_mrs, do_t_msr): Validate V7M variants.
	(md_assemble): Check for NULL variants.
	(v7m_psrs, barrier_opt_names): New tables.
	(insns): Add V7 instructions.  Mark V6 instructions absent from V7M.
	(md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
	(arm_cpu_option_table): Add Cortex-M3, R4 and A8.
	(arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
	(struct cpu_arch_ver_table): Define.
	(cpu_arch_ver): New.
	(aeabi_set_public_attributes): Use cpu_arch_ver.  Set
	Tag_CPU_arch_profile.
	* doc/c-arm.texi: Document new cpu and arch options.
gas/testsuite/
	* gas/arm/thumb32.d: Fix expected msr and mrs output.
	* gas/arm/arch7.d: New test.
	* gas/arm/arch7.s: New test.
	* gas/arm/arch7m-bad.l: New test.
	* gas/arm/arch7m-bad.d: New test.
	* gas/arm/arch7m-bad.s: New test.
include/opcode/
	* arm.h: Add V7 feature bits.
opcodes/
	* arm-dis.c (arm_opcodes): Add V7 instructions.
	(thumb32_opcodes): Ditto.  Handle V7M MSR/MRS variants.
	(print_arm_address): New function.
	(print_insn_arm): Use it.  Add 'P' and 'U' cases.
	(psr_name): New function.
	(print_insn_thumb32): Add 'U', 'C' and 'D' cases.
 2006-02-24 15:36:36 +00:00
H.J. Lu
59cf82fe74 bfd/ 
2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>

	* cpu-ia64-opc.c (ins_immu5b): New.
	(ext_immu5b): Likewise.
	(elf64_ia64_operands): Add IMMU5b.

gas/

2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.

gas/testsuite/

2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/ia64/opc-i.s: Add tests for tf.
	* gas/ia64/pseudo.s: Likewise.
	* gas/ia64/opc-i.d: Updated.
	* gas/ia64/pseudo.d: Likewise.

include/opcode/

2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>

	* ia64.h (ia64_opnd): Add IA64_OPND_IMMU5b.

opcodes/

2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>

	* ia64-opc-i.c (bXc): New.
	(mXc): Likewise.
	(OpX2TaTbYaXcC): Likewise.
	(TF). Likewise.
	(TFCM). Likewise.
	(ia64_opcodes_i): Add instructions for tf.

	* ia64-opc.h (IMMU5b): New.

	* ia64-asmtab.c: Regenerated.
 2006-02-23 21:36:18 +00:00
H.J. Lu
19a7219fd1 Update copyright years. 2006-02-23 14:49:32 +00:00
H.J. Lu
7f3dfb9cf7 gas/ 
2006-02-22  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-ia64.c (specify_resource): Add the rule 17 from
	SDM 2.2.

gas/testsuite/

2006-02-22  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/ia64/dv-raw-err.s: Add check for vmsw.0.
	* gas/ia64/dv-raw-err.l: Updated.

	* gas/ia64/opc-b.s: Add vmsw.0 and vmsw.1.
	* gas/ia64/opc-b.d: Updated.

opcodes/

2006-02-22  H.J. Lu  <hongjiu.lu@intel.com>

	* ia64-gen.c (lookup_regindex): Handle ".vm".
	(print_dependency_table): Handle '\"'.

	* ia64-ic.tbl: Updated from SDM 2.2.
	* ia64-raw.tbl: Likewise.
	* ia64-waw.tbl: Likewise.
	* ia64-asmtab.c: Regenerated.

	* ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1.
 2006-02-23 00:17:24 +00:00
Nick Clifton
d70c5fc7c5 Add support for the Infineon XC16X. 2006-02-17 14:36:28 +00:00