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731 Commits

Author SHA1 Message Date
Chenghua Xu
9108bc33b1 [MIPS] Add Loongson 2K1000 proccessor support. 
bfd/
	* archures.c (bfd_architecture): New machine
	bfd_mach_mips_gs264e.
	* bfd-in2.h (bfd_architecture): Likewise.
	* cpu-mips.c (enum I_xxx): Likewise.
	(arch_info_struct): Likewise.
	* elfxx-mips.c (_bfd_elf_mips_mach): Handle
	E_MIPS_MACH_GS264E.
	(mips_set_isa_flags): Likewise.
	(mips_mach_extensions): Map bfd_mach_mips_gs264e to
	bfd_mach_mips_gs464e extension.

binutils/
	* NEWS: Mention Loongson 2K1000 proccessor support.
	* readelf.c (get_machine_flags): Handle gs264e.

elfcpp/
	* mips.c (EF_MIPS_MACH): New E_MIPS_MACH_GS264E.

gas/
	* config/tc-mips.c (ISA_HAS_ODD_SINGLE_FPR): Exclude CPU_GS264E.
	(mips_cpu_info_table): Add gs264e descriptors.
	* doc/as.texi (march table): Add gs264e.

include/
	* elf/mips.h (E_MIPS_MACH_XXX): New E_MIPS_MACH_GS264E.
	* opcode/mips.h (CPU_XXX): New CPU_GS264E.

ld/
	* testsuite/ld-mips-elf/mips-elf-flags.exp: Run good_combination
	gs264e and gs464e.

opcodes/
	* mips-dis.c (mips_arch_choices): Add gs264e descriptors.
 2018-08-29 20:55:25 +08:00
Chenghua Xu
bd782c07b9 [MIPS] Add Loongson 3A2000/3A3000 proccessor support. 
bfd/
	* archures.c (bfd_architecture): New machine
	bfd_mach_mips_gs464e.
	* bfd-in2.h (bfd_architecture): Likewise.
	* cpu-mips.c (enum I_xxx): Likewise.
	(arch_info_struct): Likewise.
	* elfxx-mips.c (_bfd_elf_mips_mach): Handle
	E_MIPS_MACH_GS464E.
	(mips_set_isa_flags): Likewise.
	(mips_mach_extensions): Map bfd_mach_mips_gs464e to
	bfd_mach_mips_gs464 extension.

binutils/
	* NEWS: Mention Loongson 3A2000/3A3000 proccessor support.
	* readelf.c (get_machine_flags): Handle gs464e.

elfcpp/
	* mips.c (EF_MIPS_MACH): New E_MIPS_MACH_GS464E.

gas/
	* config/tc-mips.c (ISA_HAS_ODD_SINGLE_FPR): Exclude CPU_GS464E.
	(mips_cpu_info_table): Add gs464e descriptors.
	* doc/as.texi (march table): Add gs464e.

include/
	* elf/mips.h (E_MIPS_MACH_XXX): New E_MIPS_MACH_GS464E.
	* opcode/mips.h (CPU_XXX): New CPU_GS464E.

ld/
	* testsuite/ld-mips-elf/mips-elf-flags.exp: Run good_combination
	gs464e and gs464.

opcodes/
	* mips-dis.c (mips_arch_choices): Add gs464e descriptors.
 2018-08-29 20:43:19 +08:00
Chenghua Xu
ac8cb70f36 [MIPS] Add Loongson 3A1000 proccessor support. 
bfd/
	* archures.c (bfd_architecture): Rename
	bfd_mach_mips_loongson_3a to bfd_mach_mips_gs464.
	* bfd-in2.h (bfd_architecture): Likewise.
	* cpu-mips.c (enum I_xxx): Likewise.
	(arch_info_struct): Likewise.
	* elfxx-mips.c (_bfd_elf_mips_mach): Likewise.
	(mips_set_isa_flags): Likewise.
	(mips_mach_extensions): Likewise.
	(bfd_mips_isa_ext_mach): Likewise.
	(bfd_mips_isa_ext): Likewise.
	(print_mips_isa_ext): Delete AFL_EXT_LOONGSON_3A.

binutils/
	* NEWS: Mention Loongson 3A1000 proccessor support.
	* readelf.c (get_machine_flags): Rename loongson-3a to gs464.
	(print_mips_isa_ext): Delete AFL_EXT_LOONGSON_3A.

elfcpp/
	* mips.c (EF_MIPS_MACH): Rename E_MIPS_MACH_LS3A to
	E_MIPS_MACH_GS464.

gas/
	* config/tc-mips.c (ISA_HAS_ODD_SINGLE_FPR): Rename
	CPU_LOONGSON_3A to CPU_GS464.
	(mips_cpu_info_table): Add gs464 descriptors, Keep
	loongson3a as an alias of gs464 for compatibility.
	* doc/as.texi (march table): Rename loongson3a to gs464.
	* testsuite/gas/mips/loongson-3a-mmi.d: Set "ISA Extension"
	flag to None.

gold/
	* mips.cc (Mips_mach, add_machine_extensions, elf_mips_mach):
	Rename loongson3a to gs464.
	(mips_isa_ext_mach, mips_isa_ext): Delete loongson3a.
	(infer_abiflags): Use ases instead of isa_ext for infer ABI
flags.
	(elf_mips_mach_name): Rename loongson3a to gs464.

include/
	* elf/mips.h (E_MIPS_MACH_XXX): Rename E_MIPS_MACH_LS3A to
	E_MIPS_MACH_GS464.
	(AFL_EXT_XXX): Delete AFL_EXT_LOONGSON_3A.
	* opcode/mips.h (INSN_XXX): Delete INSN_LOONGSON_3A.
	(CPU_XXX): Rename CPU_LOONGSON_3A to CPU_GS464.
	* opcode/mips.h (mips_isa_table): Delete CPU_LOONGSON_3A case.

ld/
	* testsuite/ld-mips-elf/mips-elf-flags.exp: Rename loongson3a
	to gs464.

opcodes/
	* mips-dis.c (mips_arch_choices): Add gs464 descriptors, Keep
	loongson3a as an alias of gs464 for compatibility.
	* mips-opc.c (mips_opcodes): Change Comments.
 2018-08-29 20:32:30 +08:00
Chenghua Xu
a693765e23 [MIPS/GAS] Add Loongson EXT2 Instructions support. 
bfd/
	* elfxx-mips.c (print_mips_ases): Add Loongson EXT2 extension.

binutils/
	* readelf.c (print_mips_ases): Add Loongson EXT2 extension.

gas/
	* NEWS: Mention Loongson EXTensions R2 (EXT2) support.
	* config/tc-mips.c (options): Add OPTION_LOONGSON_EXT2 and
	OPTION_NO_LOONGSON_EXT2.
	(md_longopts): Likewise.
	(mips_ases): Define availability for EXT.
	(mips_convert_ase_flags): Map ASE_LOONGSON_EXT2 to
	AFL_ASE_LOONGSON_EXT2.
	(md_show_usage): Add help for -mloongson-ext2 and
	-mno-loongson-ext2.
	* doc/as.texi: Document -mloongson-ext2, -mno-loongson-ext2.
	* doc/c-mips.texi: Document -mloongson-ext2, -mno-loongson-ext2,
	.set loongson-ext2 and .set noloongson-ext2.
	* testsuite/gas/mips/loongson-ext2.d: New test.
	* testsuite/gas/mips/loongson-ext2.s: New test.
	* testsuite/gas/mips/mips.exp: Run loongson-ext2 test.

include/
	* elf/mips.h (AFL_ASE_LOONGSON_EXT2): New macro.
	(AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_EXT2.
	* opcode/mips.h (ASE_LOONGSON_EXT2): New macro.

opcodes/
	* mips-dis.c (parse_mips_ase_option): Handle -M loongson-ext
	option.
	(print_mips_disassembler_options): Document -M loongson-ext.
	* mips-opc.c (LEXT2): New macro.
	(mips_opcodes): Add cto, ctz, dcto, dctz instructions.
 2018-08-29 20:08:58 +08:00
Chenghua Xu
bdc6c06e3b [MIPS/GAS] Split Loongson EXT Instructions from loongson3a. 
bfd/
	 * elfxx-mips.c (infer_mips_abiflags): Use ases instead of
	 isa_ext for infer ABI flags.
	 (print_mips_ases): Add Loongson EXT extension.

binutils/
	 * readelf.c (print_mips_ases): Add Loongson EXT extension.

elfcpp/
	 * mips.h (AFL_ASE_LOONGSON_EXT): New enum.

gas/
	 * NEWS: Mention Loongson EXTensions (EXT) support.
	 * config/tc-mips.c (options): Add OPTION_LOONGSON_EXT and
	 OPTION_NO_LOONGSON_EXT.
	 (md_longopts): Likewise.
	 (mips_ases): Define availability for EXT.
	 (mips_convert_ase_flags): Map ASE_LOONGSON_EXT to
	 AFL_ASE_LOONGSON_EXT.
	 (mips_cpu_info_table): Add ASE_LOONGSON_EXT for loongson3a.
	 (md_show_usage): Add help for -mloongson-ext and
	 -mno-loongson-ext.
	 * doc/as.texi: Document -mloongson-ext, -mno-loongson-ext.
	 * doc/c-mips.texi: Document -mloongson-ext, -mno-loongson-ext,
	 .set loongson-ext and .set noloongson-ext.
	 * testsuite/gas/mips/loongson-mmi.d: Add ASE flag.

include/
	 * elf/mips.h (AFL_ASE_LOONGSON_EXT): New macro.
	 (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_EXT.
	 * opcode/mips.h (ASE_LOONGSON_EXT): New macro.

opcodes/
	 * mips-dis.c (mips_arch_choices): Add EXT to loongson3a
	 descriptors.
	 (parse_mips_ase_option): Handle -M loongson-ext option.
	 (print_mips_disassembler_options): Document -M loongson-ext.
	 * mips-opc.c (IL3A): Delete.
	 * mips-opc.c (LEXT): New macro.
	 (mips_opcodes): Replace IL2F|IL3A marking with LEXT for EXT
	 instructions.
 2018-08-29 19:57:39 +08:00
Chenghua Xu
716c08de28 [MIPS/GAS] Split Loongson CAM Instructions from loongson3a 
bfd/
	* elfxx-mips.c (print_mips_ases): Add CAM extension.

binutils/
	* readelf.c (print_mips_ases): Add CAM extension.

gas/
	* NEWS: Mention Loongson Content Address Memory (CAM)
	support.
	* config/tc-mips.c (options): Add OPTION_LOONGSON_CAM and
	OPTION_NO_LOONGSON_CAM.
	(md_longopts): Likewise.
	(mips_ases): Define availability for CAM.
	(mips_convert_ase_flags): Map ASE_LOONGSON_CAM to
	AFL_ASE_LOONGSON_CAM.
	(mips_cpu_info_table): Add ASE_LOONGSON_CAM for loongson3a.
	(md_show_usage): Add help for -mloongson-cam and
	-mno-loongson-cam.
	* doc/as.texi: Document -mloongson-cam, -mno-loongson-cam.
	* doc/c-mips.texi: Document -mloongson-cam, -mno-loongson-cam,
	.set loongson-cam and .set noloongson-cam.
	* testsuite/gas/mips/loongson-3a-2.d: Move cam test to ...
	* testsuite/gas/mips/loongson-cam.d: Here.  Add ISA/ASE
	flag verification.
	* testsuite/gas/mips/loongson-3a-2.s: Move cam test to ...
	* testsuite/gas/mips/loongson-cam.s: Here.
	* testsuite/gas/mips/loongson-3a-mmi.d: Add ASE flag.
	* testsuite/gas/mips/mips.exp: Run loongson-cam test.

include/
	* elf/mips.h (AFL_ASE_LOONGSON_CAM): New macro.
	(AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_CAM.
	* opcode/mips.h (ASE_LOONGSON_CAM): New macro.

opcodes/
	* mips-dis.c (mips_arch_choices): Add CAM to loongson3a
	descriptors.
	(parse_mips_ase_option): Handle -M loongson-cam option.
	(print_mips_disassembler_options): Document -M loongson-cam.
	* mips-opc.c (LCAM): New macro.
	(mips_opcodes): Replace IL2F|IL3A marking with LCAM for CAM
	instructions.
 2018-08-29 19:33:09 +08:00
H.J. Lu
a9eafb08b3 x86: Update GNU_PROPERTY_X86_XXX macros 
This patch updates GNU_PROPERTY_X86_XXX macros:

1. GNU_PROPERTY_X86_UINT32_AND_XXX: A 4-byte unsigned integer property.
A bit is set if it is set in all relocatable inputs:

 #define GNU_PROPERTY_X86_UINT32_AND_LO      0xc0000002
 #define GNU_PROPERTY_X86_UINT32_AND_HI      0xc0007fff

2. GNU_PROPERTY_X86_UINT32_OR_XXX: A 4-byte unsigned integer property.
A bit is set if it is set in any relocatable inputs:

 #define GNU_PROPERTY_X86_UINT32_OR_LO    0xc0008000
 #define GNU_PROPERTY_X86_UINT32_OR_HI    0xc000ffff

3. GNU_PROPERTY_X86_UINT32_OR_AND_XXX: A 4-byte unsigned integer property.
A bit is set if it is set in any relocatable inputs and the property is
present in all relocatable inputs:

 #define GNU_PROPERTY_X86_UINT32_OR_AND_LO   0xc0010000
 #define GNU_PROPERTY_X86_UINT32_OR_AND_HI   0xc0017fff

4. GNU_PROPERTY_X86_FEATURE_2_NEEDED, GNU_PROPERTY_X86_FEATURE_2_USED
and GNU_PROPERTY_X86_FEATURE_2_XXX bits.

GNU_PROPERTY_X86_FEATURE_1_AND is unchanged.  GNU_PROPERTY_X86_ISA_1_USED
and GNU_PROPERTY_X86_ISA_1_NEEDED are updated to better support targeted
processors since GNU_PROPERTY_X86_ISA_1_?86 aren't isn't very useful.
A new set of GNU_PROPERTY_X86_ISA_1_XXX bits are defined.  The previous
GNU_PROPERTY_X86_ISA_1_XXX macros are deprecated and renamed to
GNU_PROPERTY_X86_COMPAT_ISA_1_XXX.

bfd/

	* elfxx-x86.c (_bfd_x86_elf_parse_gnu_properties): Handle
	X86_COMPAT_ISA_1_USED, X86_COMPAT_ISA_1_NEEDED,
	X86_UINT32_AND_LO, X86_UINT32_AND_HI, X86_UINT32_OR_LO,
	X86_UINT32_OR_HI, X86_UINT32_OR_AND_LO and X86_UINT32_OR_AND_HI
	instead of X86_ISA_1_USED, X86_ISA_1_NEEDED and X86_FEATURE_1_AND.
	(_bfd_x86_elf_merge_gnu_properties): Likewise.
	(_bfd_x86_elf_link_setup_gnu_properties): Add X86_FEATURE_2_NEEDED
	instead of X86_ISA_1_NEEDED.
	(_bfd_x86_elf_link_fixup_gnu_properties): Handle
	X86_COMPAT_ISA_1_USED, X86_COMPAT_ISA_1_NEEDED, X86_UINT32_AND_LO,
	X86_UINT32_AND_HI, X86_UINT32_OR_LO, X86_UINT32_OR_HI,
	X86_UINT32_OR_AND_LO and X86_UINT32_OR_AND_HI instead of
	X86_ISA_1_USED, X86_ISA_1_NEEDED and X86_FEATURE_1_AND.

binutils/

	* readelf.c (decode_x86_compat_isa): New function.
	(decode_x86_feature_2): Likewise.
	(decode_x86_isa): Updated for new X86_ISA_1_XXX bits.
	(decode_x86_feature): Renamed to ...
	(decode_x86_feature_1): This.  Remove the type argument.
	(print_gnu_property_note): Handle X86_COMPAT_ISA_1_USED,
	X86_COMPAT_ISA_1_NEEDED, X86_UINT32_AND_LO, X86_UINT32_AND_HI,
	X86_UINT32_OR_LO, X86_UINT32_OR_HI, X86_UINT32_OR_AND_LO and
	X86_UINT32_OR_AND_HI instead of X86_ISA_1_USED, X86_ISA_1_NEEDED
	and X86_FEATURE_1_AND.
	* testsuite/binutils-all/i386/pr21231b.s: Updated to the current
	GNU_PROPERTY_X86_ISA_1_USED and GNU_PROPERTY_X86_ISA_1_NEEDED
	values.
	* testsuite/binutils-all/x86-64/pr21231b.s: Likewise.
	* testsuite/binutils-all/x86-64/pr23494a.s: Likewise.
	* testsuite/binutils-all/x86-64/pr23494b.s: Likewise.
	* testsuite/binutils-all/x86-64/pr23494c.s: Likewise.
	* testsuite/binutils-all/i386/pr21231b.d: Updated.
	* testsuite/binutils-all/x86-64/pr21231b.d: Likewise.
	* testsuite/binutils-all/x86-64/pr23494a-x32.d: Likewise.
	* testsuite/binutils-all/x86-64/pr23494a.d: Likewise.
	* testsuite/binutils-all/x86-64/pr23494c-x32.d: Likewise.
	* testsuite/binutils-all/x86-64/pr23494c.d: Likewise.
	* testsuite/binutils-all/x86-64/pr23494d-x32.d: Likewise.
	* testsuite/binutils-all/x86-64/pr23494d.d: Likewise.
	* testsuite/binutils-all/x86-64/pr23494e-x32.d: Likewise.
	* testsuite/binutils-all/x86-64/pr23494e.d: Likewise.

include/

	* elf/common.h (GNU_PROPERTY_X86_ISA_1_USED): Renamed to ...
	(GNU_PROPERTY_X86_COMPAT_ISA_1_USED): This.
	(GNU_PROPERTY_X86_ISA_1_NEEDED): Renamed to ...
	(GNU_PROPERTY_X86_COMPAT_ISA_1_NEEDED): This.
	(GNU_PROPERTY_X86_ISA_1_XXX): Renamed to ...
	(GNU_PROPERTY_X86_COMPAT_ISA_1_XXX): This.
	(GNU_PROPERTY_X86_UINT32_AND_LO): New.
	(GNU_PROPERTY_X86_UINT32_AND_HI): Likewise.
	(GNU_PROPERTY_X86_UINT32_OR_LO): Likewise.
	(GNU_PROPERTY_X86_UINT32_OR_HI): Likewise.
	(GNU_PROPERTY_X86_UINT32_OR_AND_LO): Likewise.
	(GNU_PROPERTY_X86_UINT32_OR_AND_HI): Likewise.
	(GNU_PROPERTY_X86_ISA_1_CMOV): Likewise.
	(GNU_PROPERTY_X86_ISA_1_SSE): Likewise.
	(GNU_PROPERTY_X86_ISA_1_SSE2): Likewise.
	(GNU_PROPERTY_X86_ISA_1_SSE3): Likewise.
	(GNU_PROPERTY_X86_ISA_1_SSSE3): Likewise.
	(GNU_PROPERTY_X86_ISA_1_SSE4_1): Likewise.
	(GNU_PROPERTY_X86_ISA_1_SSE4_2): Likewise.
	(GNU_PROPERTY_X86_ISA_1_AVX): Likewise.
	(GNU_PROPERTY_X86_ISA_1_AVX2): Likewise.
	(GNU_PROPERTY_X86_ISA_1_FMA): Likewise.
	(GNU_PROPERTY_X86_ISA_1_AVX512F): Likewise.
	(GNU_PROPERTY_X86_ISA_1_AVX512CD): Likewise.
	(GNU_PROPERTY_X86_ISA_1_AVX512ER): Likewise.
	(GNU_PROPERTY_X86_ISA_1_AVX512PF): Likewise.
	(GNU_PROPERTY_X86_ISA_1_AVX512VL): Likewise.
	(GNU_PROPERTY_X86_ISA_1_AVX512DQ): Likewise.
	(GNU_PROPERTY_X86_ISA_1_AVX512BW): Likewise.
	(GNU_PROPERTY_X86_ISA_1_AVX512_4FMAPS): Likewise.
	(GNU_PROPERTY_X86_ISA_1_AVX512_4VNNIW): Likewise.
	(GNU_PROPERTY_X86_ISA_1_AVX512_BITALG): Likewise.
	(GNU_PROPERTY_X86_ISA_1_AVX512_IFMA): Likewise.
	(GNU_PROPERTY_X86_ISA_1_AVX512_VBMI): Likewise.
	(GNU_PROPERTY_X86_ISA_1_AVX512_VBMI2): Likewise.
	(GNU_PROPERTY_X86_ISA_1_AVX512_VNNI): Likewise.
	(GNU_PROPERTY_X86_FEATURE_2_X86): Likewise.
	(GNU_PROPERTY_X86_FEATURE_2_X87): Likewise.
	(GNU_PROPERTY_X86_FEATURE_2_MMX): Likewise.
	(GNU_PROPERTY_X86_FEATURE_2_XMM): Likewise.
	(GNU_PROPERTY_X86_FEATURE_2_YMM): Likewise.
	(GNU_PROPERTY_X86_FEATURE_2_ZMM): Likewise.
	(GNU_PROPERTY_X86_FEATURE_2_FXSR): Likewise.
	(GNU_PROPERTY_X86_FEATURE_2_XSAVE): Likewise.
	(GNU_PROPERTY_X86_FEATURE_2_XSAVEOPT): Likewise.
	(GNU_PROPERTY_X86_FEATURE_2_XSAVEC): Likewise.
	(GNU_PROPERTY_X86_FEATURE_1_AND): Updated to
	(GNU_PROPERTY_X86_UINT32_AND_LO + 0).
	(GNU_PROPERTY_X86_ISA_1_NEEDED): Defined to
	(GNU_PROPERTY_X86_UINT32_OR_LO + 0).
	(GNU_PROPERTY_X86_FEATURE_2_NEEDED): New.  Defined to
	(GNU_PROPERTY_X86_UINT32_OR_LO + 1).
	(GNU_PROPERTY_X86_ISA_1_USED): Defined to
	(GNU_PROPERTY_X86_UINT32_OR_AND_LO + 0).
	(GNU_PROPERTY_X86_FEATURE_2_USED): New.  Defined to
	(GNU_PROPERTY_X86_UINT32_OR_AND_LO + 1).

ld/

	* testsuite/ld-i386/i386.exp: Run pr23372c, pr23372d, pr23486c
	and pr23486d.
	* testsuite/ld-i386/pr23372a.s: Update comments.
	* testsuite/ld-i386/pr23372b.s: Likewise.
	* testsuite/ld-i386/pr23372c.s: Likewise.
	* testsuite/ld-x86-64/pr23372a.s: Likewise.
	* testsuite/ld-x86-64/pr23372b.s: Likewise.
	* testsuite/ld-x86-64/pr23372c.s: Likewise.
	* testsuite/ld-x86-64/pr23486a.s: Likewise.
	* testsuite/ld-x86-64/pr23486b.s: Likewise.
	* testsuite/ld-i386/pr23372c.d: New file.
	* testsuite/ld-i386/pr23372d.d: Likewise.
	* testsuite/ld-i386/pr23486c.d: Likewise.
	* testsuite/ld-i386/pr23486d.d: Likewise.
	* testsuite/ld-x86-64/pr23372c-x32.d: Likewise.
	* testsuite/ld-x86-64/pr23372c.d: Likewise.
	* testsuite/ld-x86-64/pr23372d-x32.d: Likewise.
	* testsuite/ld-x86-64/pr23372d.d: Likewise.
	* testsuite/ld-x86-64/pr23372d.s: Likewise.
	* testsuite/ld-x86-64/pr23372e.s: Likewise.
	* testsuite/ld-x86-64/pr23372f.s: Likewise.
	* testsuite/ld-x86-64/pr23486c-x32.d: Likewise.
	* testsuite/ld-x86-64/pr23486c.d: Likewise.
	* testsuite/ld-x86-64/pr23486c.s: Likewise.
	* testsuite/ld-x86-64/pr23486d-x32.d: Likewise.
	* testsuite/ld-x86-64/pr23486d.d: Likewise.
	* testsuite/ld-x86-64/pr23486d.s: Likewise.
	* testsuite/ld-i386/property-3.r: Updated.
	* testsuite/ld-i386/property-4.r: Likewise.
	* testsuite/ld-i386/property-5.r: Likewise.
	* testsuite/ld-i386/property-x86-3.d: Likewise.
	* testsuite/ld-i386/property-x86-ibt3a.d: Likewise.
	* testsuite/ld-i386/property-x86-shstk3a.d: Likewise.
	* testsuite/ld-i386/property-x86-shstk3b.d: Likewise.
	* testsuite/ld-x86-64/property-3.r: Likewise.
	* testsuite/ld-x86-64/property-4.r: Likewise.
	* testsuite/ld-x86-64/property-5.r: Likewise.
	* testsuite/ld-x86-64/property-x86-3-x32.d: Likewise.
	* testsuite/ld-x86-64/property-x86-3.d: Likewise.
	* testsuite/ld-x86-64/property-x86-ibt3a-x32.d: Likewise.
	* testsuite/ld-x86-64/property-x86-ibt3a.d: Likewise.
	* testsuite/ld-x86-64/property-x86-ibt3b-x32.d: Likewise.
	* testsuite/ld-x86-64/property-x86-ibt3b.d: Likewise.
	* testsuite/ld-x86-64/property-x86-shstk3a-x32.d: Likewise.
	* testsuite/ld-x86-64/property-x86-shstk3a.d: Likewise.
	* testsuite/ld-x86-64/property-x86-shstk3b-x32.d: Likewise.
	* testsuite/ld-x86-64/property-x86-shstk3b.d: Likewise.
	* testsuite/ld-i386/property-x86-1.S: Updated to the current
	GNU_PROPERTY_X86_ISA_1_USED and GNU_PROPERTY_X86_ISA_1_NEEDED
	values.
	* testsuite/ld-i386/property-x86-2.S: Likewise.
	* testsuite/ld-i386/property-x86-3.s: Likewise.
	* testsuite/ld-x86-64/property-x86-1.S: Likewise.
	* testsuite/ld-x86-64/property-x86-2.S: Likewise.
	* testsuite/ld-x86-64/property-x86-3.s: Likewise.
	* ld/testsuite/ld-x86-64/x86-64.exp: Run pr23372c, pr23372c-x32,
	pr23372d, pr23372d-x32, pr23486c, pr23486c-x32, pr23486d and
	pr23486d-x32.
 2018-08-24 04:42:15 -07:00
H.J. Lu
aa7bca9b2e x86: Add GNU_PROPERTY_X86_UINT32_VALID 
The older linker treats .note.gnu.property section as a generic note
and just concatenates all .note.gnu.property sections from the input
to the output.  On CET-enabled OS, the output of the older linker is
marked as CET enabled, but in fact, it is not CET enabled and it crashes
on CET-enabled machines.

This patch defines GNU_PROPERTY_X86_UINT32_VALID.  Linker is updated to
set the GNU_PROPERTY_X86_UINT32_VALID bit in GNU property note for
non-relocatable output to differentiate outputs from the older linker.

bfd/

	* elfxx-x86.c (_bfd_x86_elf_parse_gnu_properties): Mask out the
	GNU_PROPERTY_X86_UINT32_VALID bit.
	(_bfd_x86_elf_link_fixup_gnu_properties): Set the
	GNU_PROPERTY_X86_UINT32_VALID bit for non-relocatable output.

binutils/

	* readelf.c (print_gnu_property_note): Check the
	GNU_PROPERTY_X86_UINT32_VALID bit for invalid GNU property note.

include/

	* elf/common.h (GNU_PROPERTY_X86_UINT32_VALID): New.
 2018-08-24 04:38:02 -07:00
John Darrington
4e57b45639 S12Z: Rename reloc R_S12Z_UKNWN_3 to R_S12Z_EXT18 and implement according to recently inferred information about this reloc. 
* bfd/elf32-s12z.c: (opru18_reloc): New function.
* bfd/elf32-s12z.c: (elf_s12z_howto_table): Adjust Howto according to new knowledge.
* include/elf/s12z.h: Rename R_S12Z_UKNWN_3 to R_S12Z_EXT18.
 2018-08-21 19:24:21 +02:00
Richard Earnshaw
57285adece arm - Add some comments about the versions of ARM ELF that define various e_flags values 
This patch adds a few comments to include/elf/arm.h to clarify which
versions of the ARM ELF specification defined which headers.  Given
that the EABI is pretty ubiquitous these days, I've marked anything
not based on that as deprecated.

There are no plans to remove any deprecated definitions at this time,
but any new development shouldn't be building upon support for
deprecated definitions remaining in the long term.

	* elf/arm.h: Updated comments for e_flags definitions.
 2018-08-09 16:51:09 +01:00
claziss
db1e1b45b4 [ARC] Add Tag_ARC_ATR_version. 
Add a new tag (Tag_ARC_ATR_version) used to indicate if current
attributes are interpreted in GNU way. This attribute is used by
Synopsys custom compiler to correctly identify and interpret the
object attributes section as generated by GNU tools.

gas/
2017-08-02  Claudiu Zissulescu <claziss@synopsys.com>

	* config/tc-arc.c (arc_set_public_attributes): Add
	Tag_ARC_ATR_version.
	(arc_convert_symbolic_attribute): Likewise.
	* testsuite/gas/arc/attr-arc600.d: Update test.
	* testsuite/gas/arc/attr-arc600_mul32x16.d: Likewise.
	* testsuite/gas/arc/attr-arc600_norm.d: Likewise.
	* testsuite/gas/arc/attr-arc601.d: Likewise.
	* testsuite/gas/arc/attr-arc601_mul32x16.d: Likewise.
	* testsuite/gas/arc/attr-arc601_mul64.d: Likewise.
	* testsuite/gas/arc/attr-arc601_norm.d: Likewise.
	* testsuite/gas/arc/attr-arc700.d: Likewise.
	* testsuite/gas/arc/attr-arcem.d: Likewise.
	* testsuite/gas/arc/attr-archs.d: Likewise.
	* testsuite/gas/arc/attr-autodetect-1.d: Likewise.
	* testsuite/gas/arc/attr-cpu-a601.d: Likewise.
	* testsuite/gas/arc/attr-cpu-a700.d: Likewise.
	* testsuite/gas/arc/attr-cpu-em.d: Likewise.
	* testsuite/gas/arc/attr-cpu-hs.d: Likewise.
	* testsuite/gas/arc/attr-em.d: Likewise.
	* testsuite/gas/arc/attr-em4.d: Likewise.
	* testsuite/gas/arc/attr-em4_dmips.d: Likewise.
	* testsuite/gas/arc/attr-em4_fpuda.d: Likewise.
	* testsuite/gas/arc/attr-em4_fpus.d: Likewise.
	* testsuite/gas/arc/attr-hs.d: Likewise.
	* testsuite/gas/arc/attr-hs34.d: Likewise.
	* testsuite/gas/arc/attr-hs38.d: Likewise.
	* testsuite/gas/arc/attr-hs38_linux.d: Likewise.
	* testsuite/gas/arc/attr-mul64.d: Likewise.
	* testsuite/gas/arc/attr-name.d: Likewise.
	* testsuite/gas/arc/attr-nps400.d: Likewise.
	* testsuite/gas/arc/attr-override-mcpu.d: Likewise.
	* testsuite/gas/arc/attr-quarkse_em.d: Likewise.

bfd/
2017-08-02  Claudiu Zissulescu <claziss@synopsys.com>

	* elf32-arc.c (arc_elf_merge_attributes): Handle
	Tag_ARC_ATR_version.

binutils/
2017-08-02  Claudiu Zissulescu <claziss@synopsys.com>

	* readelf.c (display_arc_attribute): Print Tag_ARC_ATR_version.

include/
2017-08-02  Claudiu Zissulescu <claziss@synopsys.com>

	* elf/arc.h (Tag_ARC_ATR_version): New tag.

ld/
2017-08-02  Claudiu Zissulescu <claziss@synopsys.com>

	* testsuite/ld-arc/attr-merge-0.d: Update test.
	* testsuite/ld-arc/attr-merge-1.d: Likewise.
	* testsuite/ld-arc/attr-merge-2.d: Likewise.
	* testsuite/ld-arc/attr-merge-3.d: Likewise.
	* testsuite/ld-arc/attr-merge-5.d: Likewise.
 2018-08-06 16:41:32 +03:00
Andrew Jenner
b8891f8d62 Add support for the C_SKY series of processors. 
This patch series is a new binutils port for C-SKY processors, including support for both the V1 and V2 processor variants.  V1 is derived from the MCore architecture while V2 is substantially different, with mixed 16- and 32-bit instructions, a larger register set, a different (but overlapping) ABI, etc.  There is support for bare-metal ELF targets and Linux with both glibc and uClibc.

This code is being contributed jointly by C-SKY Microsystems and Mentor Graphics.  C-SKY is responsible for the technical content and has proposed Lifang Xia and Yunhai Shang as port maintainers.  (Note that C-SKY does have a corporate copyright assignment on file with the FSF.) Mentor Graphics' role has been cleaning up the code, adding documentation and additional test cases, etc, to address issues we anticipated reviewers would complain about.

bfd     * Makefile.am (ALL_MACHINES, ALL_MACHINES_CFILES): Add C-SKY.
        (BFD32_BACKENDS, BFD_BACKENDS_CFILES): Likewise.
        * Makefile.in: Regenerated.
        * archures.c (enum bfd_architecture): Add bfd_arch_csky and
        related bfd_mach defines.
        (bfd_csky_arch): Declare.
        (bfd_archures_list): Add C-SKY.
        * bfd-in.h (elf32_csky_build_stubs): Declare.
        (elf32_csky_size_stubs): Declare.
        (elf32_csky_next_input_section: Declare.
        (elf32_csky_setup_section_lists): Declare.
        * bfd-in2.h: Regenerated.
        * config.bfd: Add C-SKY.
        * configure.ac: Likewise.
        * configure: Regenerated.
        * cpu-csky.c: New file.
        * elf-bfd.h (enum elf_target_id): Add C-SKY.
        * elf32-csky.c: New file.
        * libbfd.h: Regenerated.
        * reloc.c: Add C-SKY relocations.
        * targets.c (csky_elf32_be_vec, csky_elf32_le_vec): Declare.
        (_bfd_target_vector): Add C-SKY target vector entries.

binutils* readelf.c: Include elf/csky.h.
        (guess_is_rela): Handle EM_CSKY.
        (dump_relocations): Likewise.
        (get_machine_name): Likewise.
        (is_32bit_abs_reloc): Likewise.

include  * dis-asm.h (csky_symbol_is_valid): Declare.
         * opcode/csky.h: New file.

opcodes  * Makefile.am (TARGET_LIBOPCODES_CFILES): Add csky-dis.c.
         * Makefile.in: Regenerated.
         * configure.ac: Add C-SKY.
         * configure: Regenerated.
         * csky-dis.c: New file.
         * csky-opc.h: New file.
         * disassemble.c (ARCH_csky): Define.
         (disassembler, disassemble_init_for_target): Add case for ARCH_csky.
         * disassemble.h (print_insn_csky, csky_get_disassembler): Declare.

gas      * Makefile.am (TARGET_CPU_CFILES): Add entry for C-SKY.
         (TARGET_CPU_HFILES, TARGET_ENV_HFILES): Likewise.
         * Makefile.in: Regenerated.
         * config/tc-csky.c: New file.
         * config/tc-csky.h: New file.
         * config/te-csky_abiv1.h: New file.
         * config/te-csky_abiv1_linux.h: New file.
         * config/te-csky_abiv2.h: New file.
         * config/te-csky_abiv2_linux.h: New file.
         * configure.tgt: Add C-SKY.
         * doc/Makefile.am (CPU_DOCS): Add entry for C-SKY.
         * doc/Makefile.in: Regenerated.
         * doc/all.texi: Set CSKY feature.
         * doc/as.texi (Overview): Add C-SKY options.
         (Machine Dependencies): Likewise.
         * doc/c-csky.texi: New file.
         * testsuite/gas/csky/*: New test cases.

ld      * Makefile.am (ALL_EMULATION_SOURCES): Add C-SKY emulations.
        (ecskyelf.c, ecskyelf_linux.c): New rules.
        * Makefile.in: Regenerated.
        * configure.tgt: Add C-SKY.
        * emulparams/cskyelf.sh: New file.
        * emulparams/cskyelf_linux.sh: New file.
        * emultempl/cskyelf.em: New file.
        * gen-doc.texi: Add C-SKY.
        * ld.texi: Likewise.
        (Options specific to C-SKY targets): New section.
        * testsuite/ld-csky/*: New tests.
 2018-07-30 12:24:14 +01:00
Chenghua Xu
2bb9bbe2e8 MIPS/GAS: Correct the AFL_ASE_MASK macro 
Fix an issue with commit 8095d2f70e ("MIPS/GAS: Split Loongson MMI
Instructions from loongson2f/3a"), AFL_ASE_MASK should be 0x0006ffff
instead of 0x0004ffff.

2018-07-27  Chenghua Xu  <paul.hua.gm@gmail.com>
            Maciej W. Rozycki  <macro@linux-mips.org>

include/
	* elf/mips.h (AFL_ASE_MASK): Correct typo.
 2018-07-27 01:12:43 +01:00
Alan Modra
33cb30a1f9 Implement PowerPC64 .localentry for value 1 
This adds support for ".localentry 1", a new st_other
STO_PPC64_LOCAL_MASK encoding that signifies a function with a single
entry point like ".localentry 0", but unlike a ".localentry 0"
function does not preserve r2.

include/
	* elf/ppc64.h: Specify byte offset to local entry for values
	of two to six in STO_PPC64_LOCAL_MASK.  Clarify r2 return
	value for such functions when entering via global entry point.
	Specify meaning of a value of one in STO_PPC64_LOCAL_MASK.
bfd/
	* elf64-ppc.c (ppc64_elf_size_stubs): Use a ppc_stub_long_branch_r2off
	for calls to symbols with STO_PPC64_LOCAL_MASK bits set to 1.
gas/
	* config/tc-ppc.c (ppc_elf_localentry): Allow .localentry values
	of 1 and 7 to directly set value into STO_PPC64_LOCAL_MASK bits.
ld/testsuite/
	* ld-powerpc/elfv2.s: Add .localentry f5,1 testcase.
	* ld-powerpc/elfv2exe.d: Update.
	* ld-powerpc/elfv2so.d: Update.
 2018-07-26 12:53:50 +09:30
Alan Modra
67ce483baa PR23430, Indices misspelled 
PR 23430
include/
	* elf/common.h (SHT_SYMTAB_SHNDX): Fix comment typo.
bfd/
	* dwarf2.c (dwarf_debug_section_enum): Fix comment typo.
	* elf.c (bfd_section_from_shdr, elf_sort_sections): Likewise.
binutils/
	* elfcomm.h (struct archive_info): Rename uses_64bit_indicies
	to uses_64bit_indices.
	* elfcomm.c (setup_archive): Update uses of above.
	* readelf.c (process_archive): Likewise.
	(get_section_type_name): Rename indicies to indices.
	(get_32bit_elf_symbols, get_64bit_elf_symbols): Likewise.
	(process_section_groups): Likewise.
cpu/
	* or1kcommon.cpu (spr-reg-indices): Fix description typo.
opcodes/
	* or1k-desc.h: Regenerate.
 2018-07-24 19:58:12 +09:30
Chenghua Xu
8095d2f70e MIPS/GAS: Split Loongson MMI Instructions from loongson2f/3a 
The MMI instruction set has been implemented in many Loongson
processors.  There is a lot of software optimized for MMI.  This patch
splits MMI from loongson2f/3a, and adds GAS and disassembler options for
MMI instructions.

2018-07-20  Chenghua Xu  <paul.hua.gm@gmail.com>
            Maciej W. Rozycki  <macro@mips.com>

bfd/
	* elfxx-mips.c (print_mips_ases): Add MMI extension.

binutils/
	* readelf.c (print_mips_ases): Add MMI extension.

gas/
	* NEWS: Mention MultiMedia extensions Instructions (MMI)
	support.
	* config/tc-mips.c (options): Add OPTION_LOONGSON_MMI and
	OPTION_NO_LOONGSON_MMI.
	(md_longopts): Likewise.
	(mips_ases): Define availability for MMI.
	(mips_convert_ase_flags): Map ASE_LOONGSON_MMI to
	AFL_ASE_LOONGSON_MMI.
	(mips_cpu_info_table): Add ASE_LOONGSON_MMI for loongson2f/3a.
	(md_show_usage): Add help for -mloongson-mmi and
	-mno-loongson-mmi.
	* doc/as.texi: Document -mloongson-mmi, -mno-loongson-mmi.
	* doc/c-mips.texi: Document -mloongson-mmi, -mno-loongson-mmi,
	.set loongson-mmi and .set noloongson-mmi.
	* testsuite/gas/mips/loongson-2f.d: Move mmi test to ...
	* testsuite/gas/mips/loongson-2f-mmi.d: Here.  Add ISA/ASE
	flag verification.
	* testsuite/gas/mips/loongson-2f.s: Move mmi test to ...
	* testsuite/gas/mips/loongson-2f-mmi.s: Here.
	* testsuite/gas/mips/loongson-3a.d: Move mmi test to ...
	* testsuite/gas/mips/loongson-3a-mmi.d: Here.  Add ISA/ASE
	flag verification.
	* testsuite/gas/mips/loongson-3a.s: Move mmi test to ...
	* testsuite/gas/mips/loongson-3a-mmi.s: Here.
	* testsuite/gas/mips/mips.exp: Run loongson-2f-mmi and
	loongson-3a-mmi tests.

include/
	* elf/mips.h (AFL_ASE_MMI): New macro.
	(AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_MMI.
	* opcode/mips.h (ASE_LOONGSON_MMI): New macro.

opcodes/
	* mips-dis.c (mips_arch_choices): Add MMI to loongson2f and
	loongson3a descriptors.
	(parse_mips_ase_option): Handle -M loongson-mmi option.
	(print_mips_disassembler_options): Document -M loongson-mmi.
	* mips-opc.c (LMMI): New macro.
	(mips_opcodes): Replace IL2F|IL3A marking with LMMI for MMI
	instructions.
 2018-07-20 13:21:33 +01:00
Alan Modra
2393a7e3e6 Revert "Use offsets instead of addresses in ELF_SECTION_IN_SEGMENT for non SHT_NOBITS" 
This reverts commit 57c0d77c2c.
 2018-06-26 21:28:05 +09:30
Alan Hayward
57c0d77c2c Use offsets instead of addresses in ELF_SECTION_IN_SEGMENT for non SHT_NOBITS 
For sections that are not SHT_NOBITS, use sh_offset and p_offset instead of
sh_addr and p_vaddr when calculating if a section fits in a segment. Both
methods are valid when using the GNU linker.

include/
	* elf/internal.h (ELF_SECTION_IN_SEGMENT): Don’t check addresses
	for non SHT_NOBITS.
 2018-06-21 09:37:58 +01:00
Faraz Shahbazker
6f20c942c3 MIPS: Add Global INValidate ASE support 
Add support for the Global INValidate Application Specific Extension
for Release 6 of the MIPS Architecture.

[1] "MIPS Architecture for Programmers Volume II-A: The MIPS32
    Instruction Set Manual", Imagination Technologies Ltd., Document
    Number: MD00086, Revision 6.06, December 15, 2016, Section 3.2
    "Alphabetical List of Instructions", pp. 187-191

bfd/
	* elfxx-mips.c (print_mips_ases): Add GINV extension.

binutils/
	* readelf.c (print_mips_ases): Add GINV extension.

gas/
	* NEWS: Mention MIPS Global INValidate ASE support.
	* config/tc-mips.c (options): Add OPTION_GINV and OPTION_NO_GINV.
	(md_longopts): Likewise.
	(mips_ases): Define availability for GINV.
	(mips_convert_ase_flags): Map ASE_GINV to AFL_ASE_GINV.
	(md_show_usage): Add help for -mginv and -mno-ginv.
	* doc/as.texinfo: Document -mginv, -mno-ginv.
	* doc/c-mips.texi: Document -mginv, -mno-ginv, .set ginv and
	.set noginv.
	* testsuite/gas/mips/ase-errors-1.s: Add error checks for GINV
	ASE.
	* testsuite/gas/mips/ase-errors-2.s: Likewise.
	* testsuite/gas/mips/ase-errors-1.l: Likewise.
	* testsuite/gas/mips/ase-errors-2.l: Likewise.
	* testsuite/gas/mips/ginv.d: New test.
	* testsuite/gas/mips/ginv-err.d: New test.
	* testsuite/gas/mips/ginv-err.l: New test stderr output.
	* testsuite/gas/mips/ginv.s: New test source.
	* testsuite/gas/mips/ginv-err.s: New test source.
	* testsuite/gas/mips/mips.exp: Run the new tests.

include/
	* elf/mips.h (AFL_ASE_GINV, AFL_ASE_RESERVED1): New macros.
	(AFL_ASE_MASK): Update to include AFL_ASE_GINV.
	* opcode/mips.h: Document "+\" operand format.
	(ASE_GINV): New macro.

opcodes/
	* mips-dis.c (mips_arch_choices): Add GINV to mips32r6 and
	mips64r6 descriptors.
	(parse_mips_ase_option): Handle -Mginv option.
	(print_mips_disassembler_options): Document -Mginv.
	* mips-opc.c (decode_mips_operand) <+\>: New operand format.
	(GINV): New macro.
	(mips_opcodes): Define ginvi and ginvt.
 2018-06-14 21:34:49 +01:00
Scott Egerton
730c31740a MIPS: Add CRC ASE support 
Add support for the CRC Application Specific Extension for Release 6 of
the MIPS Architecture.

[1] "MIPS Architecture for Programmers Volume II-A: The MIPS32
    Instruction Set Manual", Imagination Technologies Ltd., Document
    Number: MD00086, Revision 6.06, December 15, 2016, Section 3.2
    "Alphabetical List of Instructions", pp. 143-148

[2] "MIPS Architecture for Programmers Volume II-A: The MIPS64
    Instruction Set Manual", Imagination Technologies Ltd., Document
    Number: MD00087, Revision 6.06, December 15, 2016, Section 3.2
    "Alphabetical List of Instructions", pp. 165-170

ChangeLog:

bfd/
2018-06-13  Scott Egerton  <scott.egerton@imgtec.com>
            Faraz Shahbazker  <Faraz.Shahbazker@mips.com>

	* elfxx-mips.c (print_mips_ases): Add CRC.

binutils/
2018-06-13  Scott Egerton  <scott.egerton@imgtec.com>
            Faraz Shahbazker  <Faraz.Shahbazker@mips.com>

	* readelf.c (print_mips_ases): Add CRC.

gas/
2018-06-13  Scott Egerton  <scott.egerton@imgtec.com>
            Faraz Shahbazker  <Faraz.Shahbazker@mips.com>
            Maciej W. Rozycki  <macro@mips.com>

	* config/tc-mips.c (options): Add OPTION_CRC and OPTION_NO_CRC.
	(md_longopts): Likewise.
	(md_show_usage): Add help for -mcrc and -mno-crc.
	(mips_ases): Define availability for CRC and CRC64.
	(mips_convert_ase_flags): Map ASE_CRC to AFL_ASE_CRC.
	* doc/as.texinfo: Document -mcrc, -mno-crc.
	* doc/c-mips.texi: Document -mcrc, -mno-crc, .set crc and
	.set no-crc.
	* testsuite/gas/mips/ase-errors-1.l: Add error checks for CRC
	ASE.
	* testsuite/gas/mips/ase-errors-2.l: Likewise.
	* testsuite/gas/mips/ase-errors-1.s: Likewise.
	* testsuite/gas/mips/ase-errors-2.s: Likewise.
	* testsuite/gas/mips/crc.d: New test.
	* testsuite/gas/mips/crc64.d: New test.
	* testsuite/gas/mips/crc-err.d: New test.
	* testsuite/gas/mips/crc64-err.d: New test.
	* testsuite/gas/mips/crc-err.l: New test stderr output.
	* testsuite/gas/mips/crc64-err.l: New test stderr output.
	* testsuite/gas/mips/crc.s: New test source.
	* testsuite/gas/mips/crc64.s: New test source.
	* testsuite/gas/mips/crc-err.s: New test source.
	* testsuite/gas/mips/crc64-err.s: New test source.
	* testsuite/gas/mips/mips.exp: Run the new tests.

include/
2018-06-13  Scott Egerton  <scott.egerton@imgtec.com>
            Faraz Shahbazker  <Faraz.Shahbazker@mips.com>

	* elf/mips.h (AFL_ASE_CRC): New macro.
	(AFL_ASE_MASK): Update to include AFL_ASE_CRC.
	* opcode/mips.h (ASE_CRC): New macro.
	* opcode/mips.h (ASE_CRC64): Likewise.

opcodes/
2018-06-13  Scott Egerton  <scott.egerton@imgtec.com>
            Faraz Shahbazker  <Faraz.Shahbazker@mips.com>

	* mips-dis.c (mips_arch_choices): Add CRC and CRC64 ASEs.
	* mips-opc.c (CRC, CRC64): New macros.
	(mips_builtin_opcodes): Define crc32b, crc32h, crc32w,
	crc32cb, crc32ch and crc32cw for CRC.  Define crc32d and
	crc32cd for CRC64.
 2018-06-13 15:39:05 +01:00
Max Filippov
4b8e28c793 xtensa: use property tables for correct disassembly 
xtensa disassembler does not use information from the .xt.prop sections
to switch between code/data disassembly in text sections. This may
result in incorrect disassembly when data is interpreted as code and
disassembler loses synchronization with instruction stream. Use .xt.prop
section information to correctly interpret code and data and synchronize
with instruction stream.

2018-06-04  Max Filippov  <jcmvbkbc@gmail.com>
bfd/
	* elf32-xtensa.c (xtensa_read_table_entries): Make global.
	(compute_fill_extra_space): Drop declaration. Rename function to
	xtensa_compute_fill_extra_space.
	(compute_ebb_actions, remove_dead_literal): Update references to
	compute_fill_extra_space.

include/
	* elf/xtensa.h (xtensa_read_table_entries)
	(xtensa_compute_fill_extra_space): New declarations.

opcodes/
	* xtensa-dis.c (bfd.h, elf/xtensa.h): New includes.
	(dis_private): Add new fields for property section tracking.
	(xtensa_coalesce_insn_tables, xtensa_find_table_entry)
	(xtensa_instruction_fits): New functions.
	(fetch_data): Bump minimal fetch size to 4.
	(print_insn_xtensa): Make struct dis_private static.
	Load and prepare property table on section change.
	Don't disassemble literals. Don't disassemble instructions that
	cross property table boundaries.
 2018-06-04 10:38:55 -07:00
Jim Wilson
7f99954970 RISC-V: Add RV32E support. 
Kito Cheng  <kito.cheng@gmail.com>
	Monk Chiang  <sh.chiang04@gmail.com>

	bfd/
	* elfnn-riscv.c (_bfd_riscv_elf_merge_private_bfd_data): Handle
	EF_RISCV_RVE.

	binutils/
	* readelf.c (get_machine_flags): Handle EF_RISCV_RVE.

	gas/
	* config/tc-riscv.c (rve_abi): New.
	(riscv_set_options): Add rve field.  Initialize it.
	(riscv_set_rve) New function.
	(riscv_set_arch): Support 'e' ISA subset.
	(reg_lookup_internal): If rve, check register is available.
	(riscv_set_abi): New parameter rve.
	(md_parse_option): Pass new argument to riscv_set_abi.
	(riscv_after_parse_args): Call riscv_set_rve.  If rve_abi, set
	EF_RISCV_RVE.
	* doc/c-riscv.texi (-mabi): Document new ilp32e argument.

	include/
	* elf/riscv.h (EF_RISCV_RVE): New define.
 2018-05-18 14:03:18 -07:00
John Darrington
7b4ae82428 Add support for the Freescale s12z processor. 
bfd	* Makefile.am: Add s12z files.
	* Makefile.in: Regenerate.
	* archures.c: Add bfd_s12z_arch.
	* bfd-in.h: Add exports of bfd_putb24 and bfd_putl24.
	* bfd-in2.h: Regenerate.
	* config.bfd: Add s12z target.
	* configure.ac: Add s12z target.
	* configure: Regenerate.
	* cpu-s12z.c: New file.
	* elf32-s12z.c: New file.
	* libbfd.c (bfd_putb24): New function.
	(bfd_putl24): New function.
	* libbfd.h: Regenerate.
	* reloc.c: Add s12z relocations.
	(bfd_get_reloc_size): Handle size 5 relocs.
	* targets.c: Add s12z_elf32_vec.

opcodes	* Makefile.am: Add support for s12z architecture.
	* configure.ac: Likewise.
	* disassemble.c: Likewise.
	* disassemble.h: Likewise.
	* Makefile.in: Regenerate.
	* configure: Regenerate.
	* s12z-dis.c: New file.
	* s12z.h: New file.

include	* elf/s12z.h: New header.

ld	* Makefile.am: Add support for s12z architecture.
	* configure.tgt: Likewise.
	* Makefile.in: Regenerate.
	* emulparams/m9s12zelf.sh: New file.
	* scripttempl/elfm9s12z.sc: New file.
	* testsuite/ld-discard/static.d: Expect to fail for the s12z
	target.
	* testsuite/ld-elf/endsym.d: Likewise.
	* testsuite/ld-elf/merge.d: Likewise.
	* testsuite/ld-elf/pr14926.d: Skip for the s12z target.
	* testsuite/ld-elf/sec64k.exp: Likewise.
	* testsuite/ld-s12z: New directory.
	* testsuite/ld-s12z/opr-linking.d: New file.
	* testsuite/ld-s12z/opr-linking.s: New file.
	* testsuite/ld-s12z/relative-linking.d: New file.
	* testsuite/ld-s12z/relative-linking.s: New file.
	* testsuite/ld-s12z/z12s.exp: New file.

gas	* Makefile.am: Add support for s12z target.
	* Makefile.in: Regenerate.
	* NEWS: Mention the new support.
	* config/tc-s12z.c: New file.
	* config/tc-s12z.h: New file.
	* configure.tgt: Add  s12z support.
	* doc/Makefile.am: Likewise.
	* doc/Makefile.in: Regenerate.
	* doc/all.texi: Add s12z documentation.
	* doc/as.textinfo: Likewise.
	* doc/c-s12z.texi: New file.
	* testsuite/gas/s12z: New directory.
	* testsuite/gas/s12z/abs.d: New file.
	* testsuite/gas/s12z/abs.s: New file.
	* testsuite/gas/s12z/adc-imm.d: New file.
	* testsuite/gas/s12z/adc-imm.s: New file.
	* testsuite/gas/s12z/adc-opr.d: New file.
	* testsuite/gas/s12z/adc-opr.s: New file.
	* testsuite/gas/s12z/add-imm.d: New file.
	* testsuite/gas/s12z/add-imm.s: New file.
	* testsuite/gas/s12z/add-opr.d: New file.
	* testsuite/gas/s12z/add-opr.s: New file.
	* testsuite/gas/s12z/and-imm.d: New file.
	* testsuite/gas/s12z/and-imm.s: New file.
	* testsuite/gas/s12z/and-opr.d: New file.
	* testsuite/gas/s12z/and-opr.s: New file.
	* testsuite/gas/s12z/and-or-cc.d: New file.
	* testsuite/gas/s12z/and-or-cc.s: New file.
	* testsuite/gas/s12z/bfext-special.d: New file.
	* testsuite/gas/s12z/bfext-special.s: New file.
	* testsuite/gas/s12z/bfext.d: New file.
	* testsuite/gas/s12z/bfext.s: New file.
	* testsuite/gas/s12z/bit-manip.d: New file.
	* testsuite/gas/s12z/bit-manip.s: New file.
	* testsuite/gas/s12z/bit.d: New file.
	* testsuite/gas/s12z/bit.s: New file.
	* testsuite/gas/s12z/bra-expression-defined.d: New file.
	* testsuite/gas/s12z/bra-expression-defined.s: New file.
	* testsuite/gas/s12z/bra-expression-undef.d: New file.
	* testsuite/gas/s12z/bra-expression-undef.s: New file.
	* testsuite/gas/s12z/bra.d: New file.
	* testsuite/gas/s12z/bra.s: New file.
	* testsuite/gas/s12z/brclr-symbols.d: New file.
	* testsuite/gas/s12z/brclr-symbols.s: New file.
	* testsuite/gas/s12z/brset-clr-opr-imm-rel.d: New file.
	* testsuite/gas/s12z/brset-clr-opr-imm-rel.s: New file.
	* testsuite/gas/s12z/brset-clr-opr-reg-rel.d: New file.
	* testsuite/gas/s12z/brset-clr-opr-reg-rel.s: New file.
	* testsuite/gas/s12z/brset-clr-reg-imm-rel.d: New file.
	* testsuite/gas/s12z/brset-clr-reg-imm-rel.s: New file.
	* testsuite/gas/s12z/brset-clr-reg-reg-rel.d: New file.
	* testsuite/gas/s12z/brset-clr-reg-reg-rel.s: New file.
	* testsuite/gas/s12z/clb.d: New file.
	* testsuite/gas/s12z/clb.s: New file.
	* testsuite/gas/s12z/clr-opr.d: New file.
	* testsuite/gas/s12z/clr-opr.s: New file.
	* testsuite/gas/s12z/clr.d: New file.
	* testsuite/gas/s12z/clr.s: New file.
	* testsuite/gas/s12z/cmp-imm.d: New file.
	* testsuite/gas/s12z/cmp-imm.s: New file.
	* testsuite/gas/s12z/cmp-opr-inc.d: New file.
	* testsuite/gas/s12z/cmp-opr-inc.s: New file.
	* testsuite/gas/s12z/cmp-opr-rdirect.d: New file.
	* testsuite/gas/s12z/cmp-opr-rdirect.s: New file.
	* testsuite/gas/s12z/cmp-opr-reg.d: New file.
	* testsuite/gas/s12z/cmp-opr-reg.s: New file.
	* testsuite/gas/s12z/cmp-opr-rindirect.d: New file.
	* testsuite/gas/s12z/cmp-opr-rindirect.s: New file.
	* testsuite/gas/s12z/cmp-opr-sxe4.d: New file.
	* testsuite/gas/s12z/cmp-opr-sxe4.s: New file.
	* testsuite/gas/s12z/cmp-opr-xys.d: New file.
	* testsuite/gas/s12z/cmp-opr-xys.s: New file.
	* testsuite/gas/s12z/cmp-s-imm.d: New file.
	* testsuite/gas/s12z/cmp-s-imm.s: New file.
	* testsuite/gas/s12z/cmp-s-opr.d: New file.
	* testsuite/gas/s12z/cmp-s-opr.s: New file.
	* testsuite/gas/s12z/cmp-xy.d: New file.
	* testsuite/gas/s12z/cmp-xy.s: New file.
	* testsuite/gas/s12z/com-opr.d: New file.
	* testsuite/gas/s12z/com-opr.s: New file.
	* testsuite/gas/s12z/complex-shifts.d: New file.
	* testsuite/gas/s12z/complex-shifts.s: New file.
	* testsuite/gas/s12z/db-tb-cc-opr.d: New file.
	* testsuite/gas/s12z/db-tb-cc-opr.s: New file.
	* testsuite/gas/s12z/db-tb-cc-reg.d: New file.
	* testsuite/gas/s12z/db-tb-cc-reg.s: New file.
	* testsuite/gas/s12z/dbCC.d: New file.
	* testsuite/gas/s12z/dbCC.s: New file.
	* testsuite/gas/s12z/dec-opr.d: New file.
	* testsuite/gas/s12z/dec-opr.s: New file.
	* testsuite/gas/s12z/dec.d: New file.
	* testsuite/gas/s12z/dec.s: New file.
	* testsuite/gas/s12z/div.d: New file.
	* testsuite/gas/s12z/div.s: New file.
	* testsuite/gas/s12z/eor.d: New file.
	* testsuite/gas/s12z/eor.s: New file.
	* testsuite/gas/s12z/exg.d: New file.
	* testsuite/gas/s12z/exg.s: New file.
	* testsuite/gas/s12z/ext24-ld-xy.d: New file.
	* testsuite/gas/s12z/ext24-ld-xy.s: New file.
	* testsuite/gas/s12z/inc-opr.d: New file.
	* testsuite/gas/s12z/inc-opr.s: New file.
	* testsuite/gas/s12z/inc.d: New file.
	* testsuite/gas/s12z/inc.s: New file.
	* testsuite/gas/s12z/inh.d: New file.
	* testsuite/gas/s12z/inh.s: New file.
	* testsuite/gas/s12z/jmp.d: New file.
	* testsuite/gas/s12z/jmp.s: New file.
	* testsuite/gas/s12z/jsr.d: New file.
	* testsuite/gas/s12z/jsr.s: New file.
	* testsuite/gas/s12z/ld-imm-page2.d: New file.
	* testsuite/gas/s12z/ld-imm-page2.s: New file.
	* testsuite/gas/s12z/ld-imm.d: New file.
	* testsuite/gas/s12z/ld-imm.s: New file.
	* testsuite/gas/s12z/ld-immu18.d: New file.
	* testsuite/gas/s12z/ld-immu18.s: New file.
	* testsuite/gas/s12z/ld-large-direct.d: New file.
	* testsuite/gas/s12z/ld-large-direct.s: New file.
	* testsuite/gas/s12z/ld-opr.d: New file.
	* testsuite/gas/s12z/ld-opr.s: New file.
	* testsuite/gas/s12z/ld-s-opr.d: New file.
	* testsuite/gas/s12z/ld-s-opr.s: New file.
	* testsuite/gas/s12z/ld-small-direct.d: New file.
	* testsuite/gas/s12z/ld-small-direct.s: New file.
	* testsuite/gas/s12z/lea-immu18.d: New file.
	* testsuite/gas/s12z/lea-immu18.s: New file.
	* testsuite/gas/s12z/lea.d: New file.
	* testsuite/gas/s12z/lea.s: New file.
	* testsuite/gas/s12z/mac.d: New file.
	* testsuite/gas/s12z/mac.s: New file.
	* testsuite/gas/s12z/min-max.d: New file.
	* testsuite/gas/s12z/min-max.s: New file.
	* testsuite/gas/s12z/mod.d: New file.
	* testsuite/gas/s12z/mod.s: New file.
	* testsuite/gas/s12z/mov.d: New file.
	* testsuite/gas/s12z/mov.s: New file.
	* testsuite/gas/s12z/mul-imm.d: New file.
	* testsuite/gas/s12z/mul-imm.s: New file.
	* testsuite/gas/s12z/mul-opr-opr.d: New file.
	* testsuite/gas/s12z/mul-opr-opr.s: New file.
	* testsuite/gas/s12z/mul-opr.d: New file.
	* testsuite/gas/s12z/mul-opr.s: New file.
	* testsuite/gas/s12z/mul-reg.d: New file.
	* testsuite/gas/s12z/mul-reg.s: New file.
	* testsuite/gas/s12z/mul.d: New file.
	* testsuite/gas/s12z/mul.s: New file.
	* testsuite/gas/s12z/neg-opr.d: New file.
	* testsuite/gas/s12z/neg-opr.s: New file.
	* testsuite/gas/s12z/not-so-simple-shifts.d: New file.
	* testsuite/gas/s12z/not-so-simple-shifts.s: New file.
	* testsuite/gas/s12z/opr-18u.d: New file.
	* testsuite/gas/s12z/opr-18u.s: New file.
	* testsuite/gas/s12z/opr-expr.d: New file.
	* testsuite/gas/s12z/opr-expr.s: New file.
	* testsuite/gas/s12z/opr-ext-18.d: New file.
	* testsuite/gas/s12z/opr-ext-18.s: New file.
	* testsuite/gas/s12z/opr-idx-24-reg.d: New file.
	* testsuite/gas/s12z/opr-idx-24-reg.s: New file.
	* testsuite/gas/s12z/opr-idx3-reg.d: New file.
	* testsuite/gas/s12z/opr-idx3-reg.s: New file.
	* testsuite/gas/s12z/opr-idx3-xysp-24.d: New file.
	* testsuite/gas/s12z/opr-idx3-xysp-24.s: New file.
	* testsuite/gas/s12z/opr-indirect-expr.d: New file.
	* testsuite/gas/s12z/opr-indirect-expr.s: New file.
	* testsuite/gas/s12z/opr-symbol.d: New file.
	* testsuite/gas/s12z/opr-symbol.s: New file.
	* testsuite/gas/s12z/or-imm.d: New file.
	* testsuite/gas/s12z/or-imm.s: New file.
	* testsuite/gas/s12z/or-opr.d: New file.
	* testsuite/gas/s12z/or-opr.s: New file.
	* testsuite/gas/s12z/p2-mul.d: New file.
	* testsuite/gas/s12z/p2-mul.s: New file.
	* testsuite/gas/s12z/page2-inh.d: New file.
	* testsuite/gas/s12z/page2-inh.s: New file.
	* testsuite/gas/s12z/psh-pul.d: New file.
	* testsuite/gas/s12z/psh-pul.s: New file.
	* testsuite/gas/s12z/qmul.d: New file.
	* testsuite/gas/s12z/qmul.s: New file.
	* testsuite/gas/s12z/rotate.d: New file.
	* testsuite/gas/s12z/rotate.s: New file.
	* testsuite/gas/s12z/s12z.exp: New file.
	* testsuite/gas/s12z/sat.d: New file.
	* testsuite/gas/s12z/sat.s: New file.
	* testsuite/gas/s12z/sbc-imm.d: New file.
	* testsuite/gas/s12z/sbc-imm.s: New file.
	* testsuite/gas/s12z/sbc-opr.d: New file.
	* testsuite/gas/s12z/sbc-opr.s: New file.
	* testsuite/gas/s12z/shift.d: New file.
	* testsuite/gas/s12z/shift.s: New file.
	* testsuite/gas/s12z/simple-shift.d: New file.
	* testsuite/gas/s12z/simple-shift.s: New file.
	* testsuite/gas/s12z/single-ops.d: New file.
	* testsuite/gas/s12z/single-ops.s: New file.
	* testsuite/gas/s12z/specd6.d: New file.
	* testsuite/gas/s12z/specd6.s: New file.
	* testsuite/gas/s12z/st-large-direct.d: New file.
	* testsuite/gas/s12z/st-large-direct.s: New file.
	* testsuite/gas/s12z/st-opr.d: New file.
	* testsuite/gas/s12z/st-opr.s: New file.
	* testsuite/gas/s12z/st-s-opr.d: New file.
	* testsuite/gas/s12z/st-s-opr.s: New file.
	* testsuite/gas/s12z/st-small-direct.d: New file.
	* testsuite/gas/s12z/st-small-direct.s: New file.
	* testsuite/gas/s12z/st-xy.d: New file.
	* testsuite/gas/s12z/st-xy.s: New file.
	* testsuite/gas/s12z/sub-imm.d: New file.
	* testsuite/gas/s12z/sub-imm.s: New file.
	* testsuite/gas/s12z/sub-opr.d: New file.
	* testsuite/gas/s12z/sub-opr.s: New file.
	* testsuite/gas/s12z/tfr.d: New file.
	* testsuite/gas/s12z/tfr.s: New file.
	* testsuite/gas/s12z/trap.d: New file.
	* testsuite/gas/s12z/trap.s: New file.

binutils* readelf.c: Add support for s12z architecture.
	* testsuite/lib/binutils-common.exp (is_elf_format): Excluse s12z
	targets.
 2018-05-18 15:26:18 +01:00
John Darrington
637b19704c Add support for detecting Freescale S12Z binaries in readelf. 
* include/elf/common.h (EM_S12Z): New macro
* binutils/readelf.c (get_machine_name): EM_S12Z - handle new case.
 2018-05-10 12:51:42 +01:00
Francois H. Theron
fe944acf8f This patch adds support to objdump for disassembly of NFP (Netronome Flow Processor) ELF files (.nffw) as well as some basic readelf support. 
bfd	* Makefile.am: Added NFP files to build.
	* archures.c: Added bfd_arch_nfp
	* config.bfd: Added NFP support.
	* configure.ac: Added NFP support.
	* cpu-nfp.c: New, for NFP support.
	* elf-bfd.h: Added elf_section_info()
	* elf64-nfp.c: New, for NFP support.
	* po/SRC-POTFILES.in: Added NFP source files.
	* targets.c: Added nfp_elf64_vec
	* bfd-in2.h: Regenerate.
	* Makefile.in: Regenerate.
	* configure: Regenerate.

binutils* readelf.c: Very basic support for EM_NFP and its section types.
	* testsuite/binutils-all/nfp: New directory.
	* testsuite/binutils-all/nfp/objdump.exp: New file.  Run new
	tests.
	* testsuite/binutils-all/nfp/test2_ctx8.d: New file.
	* testsuite/binutils-all/nfp/test2_no-pc_ctx4.d: New file.
	* testsuite/binutils-all/nfp/test1.d: New file.
	* testsuite/binutils-all/nfp/nfp6000.nffw: New file.
	* testsuite/binutils-all/nfp/test2_nfp6000.nffw: New file.
	* NEWS: Mention the new support.

include	* dis-asm.h: Added print_nfp_disassembler_options prototype.
	* elf/common.h: Added EM_NFP, officially assigned. See Google Group
	Generic System V Application Binary Interface.
	* elf/nfp.h: New, for NFP support.
	* opcode/nfp.h: New, for NFP support.

opcodes	Makefile.am: Added nfp-dis.c.
	configure.ac: Added bfd_nfp_arch.
	disassemble.h: Added print_insn_nfp prototype.
	disassemble.c: Added ARCH_nfp and call to print_insn_nfp
	nfp-dis.c: New, for NFP support.
	po/POTFILES.in: Added nfp-dis.c to the list.
	Makefile.in: Regenerate.
	configure: Regenerate.
 2018-04-30 17:02:59 +01:00
Christophe Lyon
5c5a4843ec [ARM] Add TLS relocations for FDPIC. 
Define and handle TLS relocations for FDPIC in BFD and gas.

In gas, the new relocations are rejected if the --fdpic option was not
specified.

We also define the __tdata_start symbol to mark the start of the
.tdata section. This allows FDPIC static binaries to find the start of
.tdata section, since phdr->p_vaddr of TLS segment is not a valid
value for FDPIC.

2018-04-25  Christophe Lyon  <christophe.lyon@st.com>
	Mickaël Guêné  <mickael.guene@st.com>

	bfd/:
	* bfd-in2.h (BFD_RELOC_ARM_TLS_GD32_FDPIC)
	(BFD_RELOC_ARM_TLS_LDM32_FDPIC, BFD_RELOC_ARM_TLS_IE32_FDPIC): New
	relocations.
	* elf32-arm.c (elf32_arm_howto_table_2): Add R_ARM_TLS_GD32_FDPIC,
	R_ARM_TLS_LDM32_FDPIC, R_ARM_TLS_IE32_FDPIC relocations.
	(elf32_arm_reloc_map): Add R_ARM_TLS_GD32_FDPIC,
	R_ARM_TLS_LDM32_FDPIC, R_ARM_TLS_IE32_FDPIC.
	(struct elf32_arm_link_hash_table): Update comment.
	(elf32_arm_final_link_relocate): Handle TLS FDPIC relocations.
	(IS_ARM_TLS_RELOC): Likewise.
	(elf32_arm_check_relocs): Likewise.
	(allocate_dynrelocs_for_symbol): Likewise.
	(elf32_arm_size_dynamic_sections): Update comment.
	* reloc.c: Add BFD_RELOC_ARM_TLS_GD32_FDPIC,
	BFD_RELOC_ARM_TLS_LDM32_FDPIC, BFD_RELOC_ARM_TLS_IE32_FDPIC.

	gas/
	* config/tc-arm.c (reloc_names): Add TLSGD_FDPIC, TLSLDM_FDPIC,
	GOTTPOFF_FDIC relocations.
	(md_apply_fix): Handle the new TLS FDPIC relocations.
	(tc_gen_reloc): Likewise.
	(arm_fix_adjustable): Likewise.

	include/
	* elf/arm.h: Add R_ARM_TLS_GD32_FDPIC, R_ARM_TLS_LDM32_FDPIC,
	R_ARM_TLS_IE32_FDPIC.

	ld/
	* scripttempl/elf.sc: Define __tdata_start for .tdata section.
 2018-04-25 20:57:02 +00:00
Christophe Lyon
188fd7aea6 [ARM] Add FDPIC relocations definitions 
Add FDPIC relocation definitions in BFD and gas.
Gas rejects them if the --fdpic option was not specified.

2018-04-25  Christophe Lyon  <christophe.lyon@st.com>
	Mickaël Guêné  <mickael.guene@st.com>

	bfd/
	* bfd-in2.c (BFD_RELOC_ARM_GOTFUNCDESC)
	(BFD_RELOC_ARM_GOTOFFFUNCDESC, BFD_RELOC_ARM_FUNCDESC)
	(BFD_RELOC_ARM_FUNCDESC_VALUE): New.
	* elf32-arm.c (elf32_arm_howto_table_2): Add R_ARM_GOTFUNCDESC,
	R_ARM_GOTOFFFUNCDESC, R_ARM_FUNCDESC, R_ARM_FUNCDESC_VALUE.
	(elf32_arm_howto_from_type): Take new members of
	elf32_arm_howto_table_2 into account.
	(elf32_arm_reloc_map): Add BFD_RELOC_ARM_GOTFUNCDESC,
	BFD_RELOC_ARM_GOTOFFFUNCDESC, BFD_RELOC_ARM_FUNCDESC,
	BFD_RELOC_ARM_FUNCDESC_VALUE.
	* reloc.c: Add BFD_RELOC_ARM_GOTFUNCDESC,
	BFD_RELOC_ARM_GOTOFFFUNCDESC, BFD_RELOC_ARM_FUNCDESC,
	BFD_RELOC_ARM_FUNCDESC_VALUE.

	gas/
	* config/tc-arm.c (reloc_names): Add gotfuncdesc, gotofffuncdesc,
	funcdesc.
	(md_apply_fix): Support the new relocations.
	(tc_gen_reloc): Likewise.
	* testsuite/gas/arm/reloc-fdpic.d: New.
	* testsuite/gas/arm/reloc-fdpic.s: New.

	include/
	* elf/arm.h (R_ARM_GOTFUNCDESC, R_ARM_GOTOFFFUNCDESC)
	(R_ARM_FUNCDESC)
	(R_ARM_FUNCDESC_VALUE): Define new relocations.
 2018-04-25 20:51:53 +00:00
Christophe Lyon
18a2033805 [ARM] Add FDPIC OSABI flag support. 
ELF files targetting ARM FDPIC use the ELFOSABI_ARM_FDPIC flag.
Set it appropriately in file generators (eg. gas), and handle it in
readers (eg. readelf).

2018-04-25  Christophe Lyon  <christophe.lyon@st.com>
	Mickaël Guêné  <mickael.guene@st.com>

	bfd/
	* elf32-arm.c (elf32_arm_print_private_bfd_data): Support
	EF_ARM_PIC and ELFOSABI_ARM_FDPIC.
	(elf32_arm_post_process_headers): Support ELFOSABI_ARM_FDPIC.
	(ELF_OSABI): Define to ELFOSABI_ARM_FDPIC.

	binutils/
	* readelf.c (decode_ARM_machine_flags): Support EF_ARM_PIC.
	(get_osabi_name): Support ELFOSABI_ARM_FDPIC.

	gas/
	* config/tc-arm.c (arm_fdpic): New.
	(elf32_arm_target_format): Support FDPIC.
	(OPTION_FDPIC): New.
	(md_longopts): Support FDPIC.
	(md_parse_option): Likewise.
	(md_show_usage): Likewise.

	include/
	* elf/arm.h (EF_ARM_FDPIC): New.
 2018-04-25 20:49:57 +00:00
Michael Eager
3f0a5f17d7 [MicroBlaze] PIC data text relative 
Andrew Sadek <andrew.sadek.se@gmail.com>

A new implemented feature in GCC Microblaze that allows Position
Independent Code to run using Data Text Relative addressing instead
of using Global Offset Table.

Its aim was to make 'PIC' more efficient and flexible as elf size
excess performance overhead were noticed when using GOT due to the
indirect addressing.

include/ChangeLog:
	* bfdlink.h (Add flag): Add new flag @ 'bfd_link_info' struct.
	* elf/microblaze.h (Add 3 new relocations):
	R_MICROBLAZE_TEXTPCREL_64, R_MICROBLAZE_TEXTREL_64
	and R_MICROBLAZE_TEXTREL_32_LO for relax function.
bfd/ChangeLog:
	* bfd/reloc.c (2 new BFD relocations):
	BFD_RELOC_MICROBLAZE_64_TEXTPCREL &
	BFD_RELOC_MICROBLAZE_64_TEXTPCREL
	* bfd/bfd-in2.h: Regenerate
	* bfd/libbfd.h: Regenerate
	* bfd/elf32-microblaze.c (Handle new relocs): define 'HOWTO' of 3
	new relocs and handle them in both relocate and relax functions.
	(microblaze_elf_reloc_type_lookup): add mapping between for new
	bfd relocs.
	(microblaze_elf_relocate_section): Handle new relocs in case of
	elf relocation.
	(microblaze_elf_relax_section): Handle new relocs for elf relaxation.
gas/ChangeLog:
	* gas/config/tc-microblaze.c (Handle new relocs directives in
	assembler): Handle new relocs from compiler output.
	(imm_types): add new imm types for data text relative addressing
	TEXT_OFFSET, TEXT_PC_OFFSET
	(md_convert_frag): conversion for BFD_RELOC_MICROBLAZE_64_TEXTPCREL,
	BFD_RELOC_MICROBLAZE_64_TEXTPCREL
	(md_apply_fix): apply fix for BFD_RELOC_MICROBLAZE_64_TEXTPCREL,
	BFD_RELOC_MICROBLAZE_64_TEXTPCREL
	(md_estimate_size_before_relax): estimate size for
	BFD_RELOC_MICROBLAZE_64_TEXTPCREL,
	BFD_RELOC_MICROBLAZE_64_TEXTPCREL
	(tc_gen_reloc): generate relocations for
	BFD_RELOC_MICROBLAZE_64_TEXTPCREL,
	BFD_RELOC_MICROBLAZE_64_TEXTPCREL
ld/ChangeLog:
	* ld/lexsup.c (Add 2 ld options):
	(ld_options): add disable-multiple-abs-defs @ 'ld_options' array
	(parse_args): parse new option and pass flag to 'link_info' struct.
	* ld/ldlex.h (Add enum): add new enum @ 'option_values' enum.
	* ld/ld.texinfo (Add new option): Add description for
	'disable-multiple-abs-defs'
	* ld/main.c: Initialize flags with false @ 'main'. Handle
	disable-multiple-abs-defs @ 'mutiple_definition'.
 2018-04-17 14:47:13 -07:00
Alan Modra
f954747f10 Reinstate readelf decoding of i860, i960 and i370 relocs 
include/
	* elf/i370.h: Revert removal.
	* elf/i860.h: Likewise.
	* elf/i960.h: Likewise.
binutils
	* readelf.c: Revert 2018-04-16 and 2018-04-11 changes.
 2018-04-17 10:48:58 +09:30
Alan Modra
6793974daa Remove i370 support 
include/
	* elf/i370.h: Delete.
	* opcode/i370.h: Delete.
bfd/
	* Makefile.am: Remove i370 support.
	* archures.c: Likewise.
	* config.bfd: Likewise.
	* configure.ac: Likewise.
	* targets.c: Likewise.
	* cpu-i370.c: Delete.
	* elf32-i370.c: Delete.
	* Makefile.in: Regenerate.
	* bfd-in2.h: Regenerate.
	* configure: Regenerate.
	* po/SRC-POTFILES.in: Regenerate.
opcodes/
	* Makefile.am: Remove i370 support.
	* configure.ac: Likewise.
	* disassemble.c: Likewise.
	* disassemble.h: Likewise.
	* i370-dis.c: Delete.
	* i370-opc.c: Delete.
	* Makefile.in: Regenerate.
	* configure: Regenerate.
	* po/POTFILES.in: Regenerate.
binutils/
	* readelf.c: Remove i370 support.
	* testsuite/binutils-all/objdump.exp: Likewise.
gas/
	* Makefile.am: Remove i370 support.
	* app.c: Likewise.
	* config/obj-elf.c: Likewise.
	* configure.tgt: Likewise.
	* doc/Makefile.am: Likewise.
	* doc/as.texinfo: Likewise.
	* testsuite/gas/all/gas.exp: Likewise.
	* testsuite/gas/elf/warn-2.s: Likewise.
	* testsuite/gas/lns/lns.exp: Likewise.
	* config/tc-i370.c: Delete.
	* config/tc-i370.h: Delete.
	* doc/c-i370.texi: Delete.
	* Makefile.in: Regenerate.
	* doc/Makefile.in: Regenerate.
	* po/POTFILES.in: Regenerate.
ld/
	* Makefile.am: Remove i370 support.
	* configure.tgt: Likewise.
	* testsuite/ld-elf/compressed1d.d: Likewise.
	* testsuite/ld-elf/group8a.d: Likewise.
	* testsuite/ld-elf/group8b.d: Likewise.
	* testsuite/ld-elf/group9a.d: Likewise.
	* testsuite/ld-elf/group9b.d: Likewise.
	* testsuite/ld-elf/merge.d: Likewise.
	* testsuite/ld-elf/pr12851.d: Likewise.
	* testsuite/ld-elf/pr12975.d: Likewise.
	* testsuite/ld-elf/pr13177.d: Likewise.
	* testsuite/ld-elf/pr13195.d: Likewise.
	* testsuite/ld-elf/pr17615.d: Likewise.
	* testsuite/ld-elf/pr21562a.d: Likewise.
	* testsuite/ld-elf/pr21562b.d: Likewise.
	* testsuite/ld-elf/pr21562c.d: Likewise.
	* testsuite/ld-elf/pr21562d.d: Likewise.
	* testsuite/ld-elf/pr21562i.d: Likewise.
	* testsuite/ld-elf/pr21562j.d: Likewise.
	* testsuite/ld-elf/pr21562k.d: Likewise.
	* testsuite/ld-elf/pr21562l.d: Likewise.
	* testsuite/ld-elf/pr21562m.d: Likewise.
	* testsuite/ld-elf/pr21562n.d: Likewise.
	* testsuite/ld-elf/pr22677.d: Likewise.
	* testsuite/lib/ld-lib.exp: Likewise.
	* emulparams/elf32i370.sh: Delete.
	* scripttempl/elfi370.sc: Delete.
	* Makefile.in: Regenerate.
	* po/BLD-POTFILES.in: Regenerate.
 2018-04-16 15:21:56 +09:30
Alan Modra
a8eb42a8b7 Remove i860, i960, bout and aout-adobe targets 
Plus remove a few leftovers from the 29k support.

include/
	* aout/adobe.h: Delete.
	* aout/reloc.h: Delete.
	* coff/i860.h: Delete.
	* coff/i960.h: Delete.
	* elf/i860.h: Delete.
	* elf/i960.h: Delete.
	* opcode/i860.h: Delete.
	* opcode/i960.h: Delete.
	* aout/aout64.h (enum reloc_type): Trim off 29k and other unused values.
	* aout/ar.h (ARMAGB): Remove.
	* coff/internal.h (struct internal_aouthdr, struct internal_scnhdr,
	union internal_auxent): Remove i960 support.
bfd/
	* aout-adobe.c: Delete.
	* bout.c: Delete.
	* coff-i860.c: Delete.
	* coff-i960.c: Delete.
	* cpu-i860.c: Delete.
	* cpu-i960.c: Delete.
	* elf32-i860.c: Delete.
	* elf32-i960.c: Delete.
	* hosts/i860mach3.h: Delete.
	* Makefile.am: Remove i860, i960, bout, and adobe support.
	* archures.c: Remove i860 and i960 support.
	* coffcode.h: Likewise.
	* reloc.c: Likewise.
	* aoutx.h: Comment updates.
	* archive.c: Remove BOUT and i960 support.
	* bfd.c: Remove BOUT support.
	* coffswap.h: Remove i960 support.
	* config.bfd: Remove i860, i960 and adobe targets.
	* configure.ac: Remove adode, bout, i860, i960, icoff targets.
	* targets.c: Likewise.
	* ieee.c: Remove i960 support.
	* mach-o.c: Remove i860 support.
	* Makefile.in: Regenerate.
	* bfd-in2.h: Regenerate.
	* configure: Regenerate.
	* libbfd.h: Regenerate.
	* po/SRC-POTFILES.in: Regenerate.
opcodes/
	* opcodes/i860-dis.c: Delete.
	* opcodes/i960-dis.c: Delete.
	* Makefile.am: Remove i860 and i960 support.
	* configure.ac: Likewise.
	* disassemble.c: Likewise.
	* disassemble.h: Likewise.
	* Makefile.in: Regenerate.
	* configure: Regenerate.
	* po/POTFILES.in: Regenerate.
binutils/
	* ieee.c: Remove i960 support.
	* od-macho.c: Remove i860 support.
	* readelf.c: Remove i860 and i960 support.
	* testsuite/binutils-all/objcopy.exp: Likewise.
	* testsuite/binutils-all/objdump.exp: Likewise.
	* testsuite/lib/binutils-common.exp: Likewise.
gas/
	* config/aout_gnu.h: Delete.
	* config/tc-i860.c: Delete.
	* config/tc-i860.h: Delete.
	* config/tc-i960.c: Delete.
	* config/tc-i960.h: Delete.
	* doc/c-i860.texi: Delete.
	* doc/c-i960.texi: Delete.
	* testsuite/gas/i860/README.i860: Delete.
	* testsuite/gas/i860/bitwise.d: Delete.
	* testsuite/gas/i860/bitwise.s: Delete.
	* testsuite/gas/i860/branch.d: Delete.
	* testsuite/gas/i860/branch.s: Delete.
	* testsuite/gas/i860/bte.d: Delete.
	* testsuite/gas/i860/bte.s: Delete.
	* testsuite/gas/i860/dir-align01.d: Delete.
	* testsuite/gas/i860/dir-align01.s: Delete.
	* testsuite/gas/i860/dir-intel01.d: Delete.
	* testsuite/gas/i860/dir-intel01.s: Delete.
	* testsuite/gas/i860/dir-intel02.d: Delete.
	* testsuite/gas/i860/dir-intel02.s: Delete.
	* testsuite/gas/i860/dir-intel03-err.l: Delete.
	* testsuite/gas/i860/dir-intel03-err.s: Delete.
	* testsuite/gas/i860/dual01.d: Delete.
	* testsuite/gas/i860/dual01.s: Delete.
	* testsuite/gas/i860/dual02-err.l: Delete.
	* testsuite/gas/i860/dual02-err.s: Delete.
	* testsuite/gas/i860/dual03.d: Delete.
	* testsuite/gas/i860/dual03.s: Delete.
	* testsuite/gas/i860/fldst01.d: Delete.
	* testsuite/gas/i860/fldst01.s: Delete.
	* testsuite/gas/i860/fldst02.d: Delete.
	* testsuite/gas/i860/fldst02.s: Delete.
	* testsuite/gas/i860/fldst03.d: Delete.
	* testsuite/gas/i860/fldst03.s: Delete.
	* testsuite/gas/i860/fldst04.d: Delete.
	* testsuite/gas/i860/fldst04.s: Delete.
	* testsuite/gas/i860/fldst05.d: Delete.
	* testsuite/gas/i860/fldst05.s: Delete.
	* testsuite/gas/i860/fldst06.d: Delete.
	* testsuite/gas/i860/fldst06.s: Delete.
	* testsuite/gas/i860/fldst07.d: Delete.
	* testsuite/gas/i860/fldst07.s: Delete.
	* testsuite/gas/i860/fldst08.d: Delete.
	* testsuite/gas/i860/fldst08.s: Delete.
	* testsuite/gas/i860/float01.d: Delete.
	* testsuite/gas/i860/float01.s: Delete.
	* testsuite/gas/i860/float02.d: Delete.
	* testsuite/gas/i860/float02.s: Delete.
	* testsuite/gas/i860/float03.d: Delete.
	* testsuite/gas/i860/float03.s: Delete.
	* testsuite/gas/i860/float04.d: Delete.
	* testsuite/gas/i860/float04.s: Delete.
	* testsuite/gas/i860/form.d: Delete.
	* testsuite/gas/i860/form.s: Delete.
	* testsuite/gas/i860/i860.exp: Delete.
	* testsuite/gas/i860/iarith.d: Delete.
	* testsuite/gas/i860/iarith.s: Delete.
	* testsuite/gas/i860/ldst01.d: Delete.
	* testsuite/gas/i860/ldst01.s: Delete.
	* testsuite/gas/i860/ldst02.d: Delete.
	* testsuite/gas/i860/ldst02.s: Delete.
	* testsuite/gas/i860/ldst03.d: Delete.
	* testsuite/gas/i860/ldst03.s: Delete.
	* testsuite/gas/i860/ldst04.d: Delete.
	* testsuite/gas/i860/ldst04.s: Delete.
	* testsuite/gas/i860/ldst05.d: Delete.
	* testsuite/gas/i860/ldst05.s: Delete.
	* testsuite/gas/i860/ldst06.d: Delete.
	* testsuite/gas/i860/ldst06.s: Delete.
	* testsuite/gas/i860/pfam.d: Delete.
	* testsuite/gas/i860/pfam.s: Delete.
	* testsuite/gas/i860/pfmam.d: Delete.
	* testsuite/gas/i860/pfmam.s: Delete.
	* testsuite/gas/i860/pfmsm.d: Delete.
	* testsuite/gas/i860/pfmsm.s: Delete.
	* testsuite/gas/i860/pfsm.d: Delete.
	* testsuite/gas/i860/pfsm.s: Delete.
	* testsuite/gas/i860/pseudo-ops01.d: Delete.
	* testsuite/gas/i860/pseudo-ops01.s: Delete.
	* testsuite/gas/i860/regress01.d: Delete.
	* testsuite/gas/i860/regress01.s: Delete.
	* testsuite/gas/i860/shift.d: Delete.
	* testsuite/gas/i860/shift.s: Delete.
	* testsuite/gas/i860/simd.d: Delete.
	* testsuite/gas/i860/simd.s: Delete.
	* testsuite/gas/i860/system.d: Delete.
	* testsuite/gas/i860/system.s: Delete.
	* testsuite/gas/i860/xp.d: Delete.
	* testsuite/gas/i860/xp.s: Delete.
	* Makefile.am: Remove i860 and i960 support.
	* configure.tgt: Likewise.
	* doc/Makefile.am: Likewise.
	* doc/all.texi: Likewise.
	* testsuite/gas/all/gas.exp
	* config/obj-coff.h: Remove i960 support.
	* doc/internals.texi: Likewise.
	* expr.c: Likewise.
	* read.c: Likewise.
	* write.c: Likewise.
	* write.h: Likewise.
	* testsuite/gas/lns/lns.exp: Likewise.
	* testsuite/gas/symver/symver.exp: Likewise.
	* config/tc-m68k.c: Remove BOUT support.
	* config/tc-score.c: Likewise.
	* config/tc-score7.c: Likewise.
	* config/tc-sparc.c: Likewise.
	* symbols.c: Likewise.
	* doc/h8.texi: Likewise.
	* configure.ac: Remove BOUT and i860 support.
	* doc/as.texinfo: Remove BOUT, i860 and i960 support
	* Makefile.in: Regenerate.
	* config.in: Regenerate.
	* configure: Regenerate.
	* doc/Makefile.in: Regenerate.
	* po/POTFILES.in: Regenerate.
ld/
	* emulparams/coff_i860.sh: Delete.
	* emulparams/elf32_i860.sh: Delete.
	* emulparams/elf32_i960.sh: Delete.
	* emulparams/gld960.sh: Delete.
	* emulparams/gld960coff.sh: Delete.
	* emulparams/lnk960.sh: Delete.
	* emultempl/gld960.em: Delete.
	* emultempl/gld960c.em: Delete.
	* emultempl/lnk960.em: Delete.
	* scripttempl/i860coff.sc: Delete.
	* scripttempl/i960.sc: Delete.
	* ld.texinfo: Remove i960 support.
	* Makefile.am: Remove i860 and i960 support.
	* configure.tgt: Likewise.
	* testsuite/ld-discard/extern.d: Likewise.
	* testsuite/ld-discard/start.d: Likewise.
	* testsuite/ld-discard/static.d: Likewise.
	* testsuite/ld-elf/compressed1d.d: Likewise.
	* testsuite/ld-elf/group1.d: Likewise.
	* testsuite/ld-elf/group3b.d: Likewise.
	* testsuite/ld-elf/group8a.d: Likewise.
	* testsuite/ld-elf/group8b.d: Likewise.
	* testsuite/ld-elf/group9a.d: Likewise.
	* testsuite/ld-elf/group9b.d: Likewise.
	* testsuite/ld-elf/linkonce2.d: Likewise.
	* testsuite/ld-elf/merge.d: Likewise.
	* testsuite/ld-elf/merge2.d: Likewise.
	* testsuite/ld-elf/merge3.d: Likewise.
	* testsuite/ld-elf/orphan-10.d: Likewise.
	* testsuite/ld-elf/orphan-11.d: Likewise.
	* testsuite/ld-elf/orphan-12.d: Likewise.
	* testsuite/ld-elf/orphan-9.d: Likewise.
	* testsuite/ld-elf/orphan-region.d: Likewise.
	* testsuite/ld-elf/orphan.d: Likewise.
	* testsuite/ld-elf/orphan3.d: Likewise.
	* testsuite/ld-elf/pr12851.d: Likewise.
	* testsuite/ld-elf/pr12975.d: Likewise.
	* testsuite/ld-elf/pr13177.d: Likewise.
	* testsuite/ld-elf/pr13195.d: Likewise.
	* testsuite/ld-elf/pr17550a.d: Likewise.
	* testsuite/ld-elf/pr17550b.d: Likewise.
	* testsuite/ld-elf/pr17550c.d: Likewise.
	* testsuite/ld-elf/pr17550d.d: Likewise.
	* testsuite/ld-elf/pr17615.d: Likewise.
	* testsuite/ld-elf/pr20528a.d: Likewise.
	* testsuite/ld-elf/pr20528b.d: Likewise.
	* testsuite/ld-elf/pr21562a.d: Likewise.
	* testsuite/ld-elf/pr21562b.d: Likewise.
	* testsuite/ld-elf/pr21562c.d: Likewise.
	* testsuite/ld-elf/pr21562d.d: Likewise.
	* testsuite/ld-elf/pr21562i.d: Likewise.
	* testsuite/ld-elf/pr21562j.d: Likewise.
	* testsuite/ld-elf/pr21562k.d: Likewise.
	* testsuite/ld-elf/pr21562l.d: Likewise.
	* testsuite/ld-elf/pr21562m.d: Likewise.
	* testsuite/ld-elf/pr21562n.d: Likewise.
	* testsuite/ld-elf/pr22677.d: Likewise.
	* testsuite/ld-elf/pr22836-1a.d: Likewise.
	* testsuite/ld-elf/pr22836-1b.d: Likewise.
	* testsuite/ld-elf/pr349.d: Likewise.
	* testsuite/ld-elf/sec-to-seg.exp: Likewise.
	* testsuite/ld-elf/sec64k.exp: Likewise.
	* testsuite/ld-elf/warn1.d: Likewise.
	* testsuite/ld-elf/warn2.d: Likewise.
	* testsuite/ld-elf/warn3.d: Likewise.
	* testsuite/lib/ld-lib.exp: Likewise.
	* Makefile.in: Regenerate.
	* po/BLD-POTFILES.in: Regenerate.
 2018-04-11 21:49:30 +09:30
Alan Modra
23cedd1dc9 PowerPC inline PLT call support 
In addition to the existing relocs we need two more to mark all
instructions in the call sequence, PLTCALL on the call itself (plus
the toc restore insn for ppc64), and PLTSEQ on others.  All
relocations in a particular sequence have the same symbol.

Example ppc64 ELFv2 assembly:
 .reloc .,R_PPC64_PLTSEQ,puts
	std 2,24(1)
	addis 12,2,puts@plt@ha	# .reloc .,R_PPC64_PLT16_HA,puts
	ld 12,puts@plt@l(12)	# .reloc .,R_PPC64_PLT16_LO_DS,puts
 .reloc .,R_PPC64_PLTSEQ,puts
	mtctr 12
 .reloc .,R_PPC64_PLTCALL,puts
	bctrl
	ld 2,24(1)

Example ppc32 -fPIC assembly:
	addis 12,30,puts+32768@plt@ha # .reloc .,R_PPC_PLT16_HA,puts+0x8000
	lwz 12,12,puts+32768@plt@l    # .reloc .,R_PPC_PLT16_LO,puts+0x8000
 .reloc .,R_PPC_PLTSEQ,puts+32768
	mtctr 12
 .reloc .,R_PPC_PLTCALL,puts+32768
	bctrl

Marking sequences like this allows the linker to convert them to nops
and a direct call if the target symbol turns out to be local.

When the call is __tls_get_addr, each relocation shown above is paired
with an R_PPC*_TLSLD or R_PPC*_TLSGD reloc to additionally mark the
sequence for possible TLS optimization.  The TLSLD or TLSGD relocs are
emitted first.

include/
	* elf/ppc.h (R_PPC_PLTSEQ, R_PPC_PLTCALL): Define.
	* elf/ppc64.h (R_PPC64_PLTSEQ, R_PPC64_PLTCALL): Define.
bfd/
	* elf32-ppc.c (ppc_elf_howto_raw): Add PLTSEQ and PLTCALL howtos.
	(is_plt_seq_reloc): New function.
	(ppc_elf_check_relocs): Handle PLTSEQ and PLTCALL relocs.
	(ppc_elf_tls_optimize): Handle inline plt call sequence.
	(ppc_elf_relax_section): Handle PLTCALL reloc.
	(ppc_elf_relocate_section): Nop out inline plt call sequence when
	resolving locally.
	* elf64-ppc.c (ppc64_elf_howto_raw): Add R_PPC64_PLTSEQ and
	R_PPC64_PLTCALL entries.  Comment R_PPC64_TOCSAVE.
	(has_tls_get_addr_call): Correct comment.
	(is_branch_reloc): Add PLTCALL.
	(is_plt_seq_reloc): New function.
	(ppc64_elf_check_relocs): Handle PLT16_LO_DS reloc.  Set
	has_tls_reloc for R_PPC64_TLSGD and R_PPC64_TLSLD.  Create plt
	entry for R_PPC64_PLTCALL.
	(ppc64_elf_tls_optimize): Handle inline plt call sequence.
	(ppc_type_of_stub): Handle PLTCALL reloc.
	(toc_adjusting_stub_needed): Likewise.
	(ppc64_elf_relocate_section): Set "can_plt_call" for PLTCALL
	reloc insn.  Nop out inline plt call sequence when resolving
	locally.  Handle __tls_get_addr inline plt call optimization.
elfcpp/
	* powerpc.h (R_POWERPC_PLTSEQ, R_POWERPC_PLTCALL): Define.
gold/
	* powerpc.cc (Target_powerpc::Track_tls::maybe_skip_tls_get_addr_call):
	Handle inline plt sequence relocs.
	(Stub_table::Plt_stub_key::Plt_stub_key): Likewise.
	(Target_powerpc::Scan::reloc_needs_plt_for_ifunc): Likewise.
	(Target_powerpc::Relocate::relocate): Likewise.
 2018-04-09 17:25:20 +09:30
Renlin Li
84f1b9fb08 [1/2][GAS][AARCH64]Add BFD_RELOC_AARCH64_TLSLE_LDST8/16/32/64_TPREL_LO12 support in GAS. 
This patch adds the following relocation support into binutils gas.
BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12,
BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12_NC,
BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12,
BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12_NC,
BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12,
BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12_NC,
BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12,
BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12_NC.

Those relocations includes both ip64 and ilp32 variant.
 2018-03-28 18:03:55 +01:00
H.J. Lu
b1202ffa53 DT_FLAGS_1: Add Solaris bits 
The following bits in DT_FLAGS_1 are used by Solaris:

 #define DF_1_KMOD       0x10000000 /* kernel module */
 #define DF_1_WEAKFILTER 0x20000000 /* apply weak binding to DT_FILTER */
 #define DF_1_NOCOMMON   0x40000000 /* no COMMON symbols exist */

binutils/

	* readelf.c (process_dynamic_section): Also dump DF_1_KMOD,
	DF_1_WEAKFILTER and DF_1_NOCOMMON.

include/

	* elf/common.h (DF_1_KMOD): New.
	(DF_1_WEAKFILTER): Likewise.
	(DF_1_NOCOMMON): Likewise.
 2018-03-21 12:55:52 -07:00
Alan Modra
219d1afa89 Update year range in copyright notice of binutils files 2018-01-03 17:49:56 +10:30
H.J. Lu
276da9b31b Re-apply "elf: Properly compute offsets of note descriptor and next note" 
CORE PT_NOTE segments may have p_align values of 0 or 1.  gABI specifies
that PT_NOTE alignment should be aligned to 4 bytes for 32-bit objects
and to 8 bytes for 64-bit objects.  If segment alignment is less than 4,
we use 4 byte alignment.
 2017-11-24 14:52:15 -08:00
Simon Marchi
4e25ac038e Revert "elf: Properly compute offsets of note descriptor and next note" 
This reverts commit 650444eb54.

With this patch, running the GDB test case gdb.base/auxv.exp is stuck in
an infinite loop, consuming memory to the point that it renders the
machine unusable. I am reverting it so we can take our time to
investigate while not killing all the developers' machines.
 2017-11-24 15:43:51 -05:00
H.J. Lu
650444eb54 elf: Properly compute offsets of note descriptor and next note 
According to gABI, in a note entry, the note name field, not note name
size, is padded for the note descriptor.  And the note descriptor field,
not note descriptor size, is padded for the next note entry.  Also notes
are aligned to 4 bytes in 32-bit objects and 8 bytes in 64-bit objects.
Since on Linux, .note.ABI-tag and .note.gnu.build-id notes are always
aligned to 4 bytes, we need to use alignment of note section or note
segment, instead of assuming alignment based on ELF file class.

Tested on i686 and x86-64.

bfd/

	PR binutils/22444
	* elf.c (elf_read_notes): Add an argument for note aligment.
	(elf_parse_notes): Likewise.
	(_bfd_elf_make_section_from_shdr): Pass section aligment to
	elf_parse_notes.
	(bfd_section_from_phdr): Pass segment aligment to elf_read_notes.
	(elf_parse_notes): Add an argument for note aligment.  Use
	ELF_NOTE_DESC_OFFSET to get the offset of the note descriptor.
	Use ELF_NOTE_NEXT_OFFSET to get the offset of the next note
	entry.
	(elf_read_notes): Add an argument for note aligment and pass it
	to elf_parse_notes.

binutils/

	PR binutils/22444
	* readelf.c (process_notes_at): Use ELF_NOTE_DESC_OFFSET to get
	the offset of the note descriptor.  Use ELF_NOTE_NEXT_OFFSET to
	get the offset of the next note entry.

include/

	PR binutils/22444
	* elf/external.h (ELF_ALIGN_UP): New.
	(ELF_NOTE_DESC_OFFSET): Likewise.
	(ELF_NOTE_NEXT_OFFSET): Likewise.
 2017-11-24 06:41:52 -08:00
James Bowman
81b42bcab1 FT32B is a new FT32 family member. It has a code compression scheme, which requires the use of linker relaxations. The change is quite large, so submission is in several parts. 
Part 2 adds a relaxation pass, which actually implements the code compression scheme.

bfd	* archures.c: Add bfd_mach_ft32b.
	* cpu-ft32.c: Add arch_info_struct.
	* elf32-ft32.c: Add R_FT32_RELAX, SC0, SC1,
	DIFF32. (ft32_elf_relocate_section): Add clauses
	for R_FT32_SC0, SC1, DIFF32.  (ft32_reloc_shortable,
	elf32_ft32_is_diff_reloc, elf32_ft32_adjust_diff_reloc_value,
	elf32_ft32_adjust_reloc_if_spans_insn,
	elf32_ft32_relax_delete_bytes, elf32_ft32_relax_is_branch_target,
	ft32_elf_relax_section): New function.
	* reloc.c: Add BFD_RELOC_FT32_RELAX, SC0, SC1, DIFF32.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Regenerate.

gas	* config/tc-ft32.c (md_assemble): add relaxation reloc
	BFD_RELOC_FT32_RELAX.  (md_longopts): Add "norelax" and
	"no-relax". (md_apply_fix): Add reloc BFD_RELOC_FT32_DIFF32.
	(relaxable_section, ft32_validate_fix_sub, ft32_force_relocation,
	ft32_allow_local_subtract): New function.
	* config/tc-ft32.h: remove unused MD_PCREL_FROM_SECTION.
	* testsuite/gas/ft32/insnsc.s: New test exercising all FT32B
	shortcodes.

include	* elf/ft32.h: Add R_FT32_RELAX, SC0, SC1, DIFF32.
 2017-11-01 15:33:24 +00:00
James Bowman
3b4b0a629a FT32: support for FT32B processor - part 1 
FT32B is a new FT32 family member. It has a code
compression scheme, which requires the use of linker
relaxations. The change is quite large, so submission
is in several parts.

Part 1 adds a 15-bit instruction field, and CPU-specific functions for
the code compression that are used in binutils and GDB.

bfd/ChangeLog:

2017-10-12  James Bowman  <james.bowman@ftdichip.com>

	* bfd-in2.h: Regenerate.
	* libbfd.h: Regenerate.
	* elf32-ft32.c: Add HOWTO R_FT32_15.
	* reloc.c: Add BFD_RELOC_FT32_15.

gas/ChangeLog:

2017-10-12  James Bowman  <james.bowman@ftdichip.com>

	* config/tc-ft32.c (md_assemble): Replace FT32_FLD_K8 with
	K15.
	(md_apply_fix, tc_gen_reloc): Add BFD_RELOC_FT32_15.

include/ChangeLog:

2017-10-12  James Bowman  <james.bowman@ftdichip.com>

	* elf/ft32.h: Add R_FT32_15.
	* opcode/ft32.h: Replace FT32_FLD_K8 with K15.
	(ft32_shortcode, sc_compar, ft32_split_shortcode,
	ft32_merge_shortcode, ft32_merge_shortcode): New functions.

opcodes/ChangeLog:

2017-10-12  James Bowman  <james.bowman@ftdichip.com>

	* opcodes/ft32-dis.c (print_insn_ft32): Replace FT32_FLD_K8 with K15.
	* opcodes/ft32-opc.c (ft32_opc_info): Replace FT32_FLD_K8 with
	K15. Add jmpix pattern.

sim/ChangeLog:

2017-10-12  James Bowman  <james.bowman@ftdichip.com>

	* sim/ft32/interp.c (step_once): Replace FT32_FLD_K8 with K15.
 2017-10-12 18:41:29 -07:00
John Baldwin
12c4bd7f53 Handle FreeBSD-specific AT_EHDRFLAGS and AT_HWCAP auxiliary vector types. 
FreeBSD recently added two additional ELF auxiliary vectors.  FreeBSD's
AT_HWCAP uses a different number compared to AT_HWCAP on Linux as the
numerical value was already in use for a different vector on FreeBSD.

include/ChangeLog:

	* elf/common.h (AT_FREEBSD_EHDRFLAGS, AT_FREEBSD_HWCAP): Define.

gdb/ChangeLog:

	* fbsd-tdep.c (fbsd_print_auxv_entry): Handle AT_EHDRFLAGS and
	AT_HWCAP.
 2017-10-05 09:50:01 -07:00
Alexander Fedotov-B55613
83eef88358 Missing relocation R_PPC_VLE_ADDR20 and add VLE flag to details in readelf 
include/
	* elf/ppc.h (R_PPC_VLE_ADDR20): New relocation.
bfd/
	* elf32-ppc.c (ppc_elf_howto_raw): Add R_PPC_VLE_ADDR20.
	(ppc_elf_check_relocs): Handle it.
	(ppc_elf_vle_split20): New function.
	(ppc_elf_relocate_section): Handle R_PPC_VLE_ADDR20.
binutils/
	* readelf.c (get_elf_section_flags): Add VLE.
	(process_section_headers): Add VLE key to details.
gas/
	* config/tc-ppc.c (md_parse_option): Handle "mno-vle" flag.
	(ppc_elf_section_letter): New function.
	* config/tc-ppc.h (md_elf_section_letter): New.
	* testsuite/gas/elf/section10.d: Adjust for VLE.
 2017-09-05 08:42:27 +09:30
Gustavo Romero
66c3b5f87c Add new NT_PPC_* available since Linux 4.8 
Add new note types available since Linux 4.8 to elf/common.h and
make the 'readelf' tool aware of it.

include/
	* elf/common.h (NT_PPC_TAR): New macro.
	(NT_PPC_PPR): Likewise.
	(NT_PPC_DSCR): Likewise.
	(NT_PPC_EBB): Likewise.
	(NT_PPC_PMU): Likewise.
	(NT_PPC_TM_CGPR): Likewise.
	(NT_PPC_TM_CFPR): Likewise.
	(NT_PPC_TM_CVMX): Likewise.
	(NT_PPC_TM_CVSX): Likewise.
	(NT_PPC_TM_SPR): Likewise.
	(NT_PPC_TM_CTAR): Likewise.
	(NT_PPC_TM_CPPR): Likewise.
	(NT_PPC_TM_CDSCR): Likewise.
binutils/
	* readelf.c (get_note_type): Handle PPC note types available
	since Linux 4.8.
 2017-08-16 07:45:28 +09:30
John Eric Martin
684d5a10b1 [ARC] Add JLI support. 
The following relocation types were added to GCC/binutils:

ARC_JLI_SECTOFF is a relocation type in Metaware that is now used by
GCC as well to adjust the index of function calls to functions with
attribute jli_call_always.

bfd/
2017-07-19  Claudiu Zissulescu  <claziss@synopsys.com>
	    John Eric Martin  <John.Martin@emmicro-us.com>

	* bfd-in2.h: Regenerate.
	* libbfd.h: Regenerate.
	* elf32-arc.c (JLI): Define.
	* reloc.c: Add JLI relocations.

gas/
2017-07-19  Claudiu Zissulescu  <claziss@synopsys.com>

	* testsuite/gas/arc/jli-1.d: New file.
	* testsuite/gas/arc/jli-1.s: Likewise.
	* testsuite/gas/arc/taux.d: Update for jli_base.

include/
2017-07-19  Claudiu Zissulescu  <claziss@synopsys.com>
	    John Eric Martin  <John.Martin@emmicro-us.com>

	* elf/arc-reloc.def: Add JLI relocs howto.
	* opcode/arc-func.h (replace_jli): New function.

ld/
2017-07-19  Claudiu Zissulescu  <claziss@synopsys.com>
	    John Eric Martin  <John.Martin@emmicro-us.com>

	* emulparams/arcelf.sh (JLI_START_TABLE): Define.
	* scripttempl/elfarc.sc: Handle jlitab section.
	* scripttempl/elfarcv2.sc: Likewise.
	* testsuite/ld-arc/arc.exp: Add JLI test.
	* testsuite/ld-arc/jli-script.ld: New file.
	* testsuite/ld-arc/jli-simple.dd: Likewise.
	* testsuite/ld-arc/jli-simple.rd: Likewise.
	* testsuite/ld-arc/jli-simple.s: Likewise.
	* testsuite/ld/testsuite/ld-arc/jli-overflow.s: Likewise.
	* testsuite/ld/testsuite/ld-arc/jli-overflow.d: Likewise.
	* testsuite/ld/testsuite/ld-arc/jli-overflow.err: Likewise.

opcode/
2017-07-19  Claudiu Zissulescu  <claziss@synopsys.com>
	    John Eric Martin  <John.Martin@emmicro-us.com>

	* arc-opc.c (UIMM10_6_S_JLIOFF): Define.
	(UIMM3_23): Adjust accordingly.
	* arc-regs.h: Add/correct jli_base register.
	* arc-tbl.h (jli_s): Likewise.
 2017-07-19 09:56:55 +02:00
Yuri Chornovian
de194d8575 Fix spelling typos. 2017-07-18 16:58:14 +01:00
John Baldwin
0b9305edf1 Recognize the recently-added FreeBSD core dump note for LWP info. 
This core dump note contains the same information returned by the
ptrace PT_LWPINFO operation for each LWP belonging to a process.

binutils/ChangeLog:

	* readelf.c (get_freebsd_elfcore_note_type): Handle
	NT_FREEBSD_PTLWPINFO.

include/ChangeLog:

	* elf/common.h (NT_FREEBSD_PTLWPINFO): Define.
 2017-07-07 16:10:47 -07:00
Andreas Arnez
88ab90e860 S390: Support guarded-storage core note sections 
Newer Linux kernel versions offer two new register sets in support of the
z/Architecture's guarded storage facility: NT_S390_GS_CB, the
"guarded-storage registers", and NT_S390_GS_BC, the "guarded-storage
broadcast control block".  This patch adds support for the respective core
notes sections to binutils.

bfd/ChangeLog:
	* elf-bfd.h (elfcore_write_s390_gs_cb): Add prototype.
	(elfcore_write_s390_gs_bc): Likewise.
	* elf.c (elfcore_grok_s390_gs_cb): New function.
	(elfcore_grok_s390_gs_bc): New function.
	(elfcore_grok_note): Call them.
	(elfcore_write_s390_gs_cb): New function.
	(elfcore_write_s390_gs_bc): New function.
	(elfcore_write_register_note): Call them.

binutils/ChangeLog:
	* readelf.c (get_note_type): Add NT_S390_GS_CB and NT_S390_GS_BC.

include/ChangeLog:
	* elf/common.h (NT_S390_GS_CB): New macro.
	(NT_S390_GS_BC): Likewise.
 2017-06-29 10:30:09 +02:00
Maciej W. Rozycki
38bf472a15 MIPS: Add Imagination interAptiv MR2 MIPS32r3 processor support 
Add support for the Imagination interAptiv MR2 MIPS32r3 processor with
the MIPS16e2 ASE as per documentation, including in particular:

1. Support for implementation-specific interAptiv MR2 COPYW and UCOPYW
   MIPS16e2 instructions[1], for assembly and disassembly,

2. Support for implementation-specific interAptiv MR2 SAVE and RESTORE
   regular MIPS instructions[2], for assembly and disassembly,

3. ELF binary file annotation for the interAptiv MR2 MIPS architecture
   extension.

4. Support for interAptiv MR2 architecture selection for assembly, in
   the form of the `-march=interaptiv-mr2' command-line option and its
   corresponding `arch=interaptiv-mr2' setting for the `.set' and
   `.module' pseudo-ops.

5. Support for interAptiv MR2 architecture selection for disassembly,
   in the form of the `mips:interaptiv-mr2' target architecture, for
   use e.g. with the `-m' command-line option for `objdump'.

Parts of this change by Matthew Fortune and Andrew Bennett.

References:

[1] "MIPS32 interAptiv Multiprocessing System Software User's Manual",
    Imagination Technologies Ltd., Document Number: MD00904, Revision
    02.01, June 15, 2016, Section 24.3 "MIPS16e2 Implementation Specific
    Instructions", pp. 878-883

[2] same, Chapter 25 "Implementation-specific Instructions", pp. 911-917

	include/
	* elf/mips.h (E_MIPS_MACH_IAMR2): New macro.
	(AFL_EXT_INTERAPTIV_MR2): Likewise.
	* opcode/mips.h: Document new operand codes defined.
	(INSN_INTERAPTIV_MR2): New macro.
	(INSN_CHIP_MASK): Adjust accordingly.
	(CPU_INTERAPTIV_MR2): New macro.
	(cpu_is_member) <CPU_INTERAPTIV_MR2>: New case.
	(MIPS16_ALL_ARGS): Rename to...
	(MIPS_SVRS_ALL_ARGS): ... this.
	(MIPS16_ALL_STATICS): Rename to...
	(MIPS_SVRS_ALL_STATICS): ... this.

	bfd/
	* archures.c (bfd_mach_mips_interaptiv_mr2): New macro.
	* cpu-mips.c (I_interaptiv_mr2): New enum value.
	(arch_info_struct): Add "mips:interaptiv-mr2" entry.
	* elfxx-mips.c (_bfd_elf_mips_mach) <E_MIPS_MACH_IAMR2>: New
	case.
	(mips_set_isa_flags) <bfd_mach_mips_interaptiv_mr2>: Likewise.
	(bfd_mips_isa_ext) <bfd_mach_mips_interaptiv_mr2>: Likewise.
	(print_mips_isa_ext) <AFL_EXT_INTERAPTIV_MR2>: Likewise.
	(mips_mach_extensions): Add `bfd_mach_mipsisa32r3' and
	`bfd_mach_mips_interaptiv_mr2' entries.
	* bfd-in2.h: Regenerate.

	opcodes/
	* mips-formats.h (INT_BIAS): New macro.
	(INT_ADJ): Redefine in INT_BIAS terms.
	* mips-dis.c (mips_arch_choices): Add "interaptiv-mr2" entry.
	(mips_print_save_restore): New function.
	(print_insn_arg) <OP_SAVE_RESTORE_LIST>: Update comment.
	(validate_insn_args) <OP_SAVE_RESTORE_LIST>: Remove `abort'
	call.
	(print_insn_args): Handle OP_SAVE_RESTORE_LIST.
	(print_mips16_insn_arg): Call `mips_print_save_restore' for
	OP_SAVE_RESTORE_LIST handling, factored out from here.
	* mips-opc.c (decode_mips_operand) <'-'> <'m'>: New case.
	(RD_31, RD_SP, WR_SP, MOD_SP, IAMR2): New macros.
	(mips_builtin_opcodes): Add "restore" and "save" entries.
	* mips16-opc.c (decode_mips16_operand) <'n', 'o'>: New cases.
	(IAMR2): New macro.
	(mips16_opcodes): Add "copyw" and "ucopyw" entries.

	binutils/
	* readelf.c (get_machine_flags) <E_MIPS_MACH_IAMR2>: New case.
	(print_mips_isa_ext) <AFL_EXT_INTERAPTIV_MR2>: Likewise.
	* NEWS: Mention Imagination interAptiv MR2 processor support.

	gas/
	* config/tc-mips.c (validate_mips_insn): Handle
	OP_SAVE_RESTORE_LIST specially.
	(mips_encode_save_restore, mips16_encode_save_restore): New
	functions.
	(match_save_restore_list_operand): Factor out SAVE/RESTORE
	operand insertion into the instruction word or halfword to these
	new functions.
	(mips_cpu_info_table): Add "interaptiv-mr2" entry.

	* doc/c-mips.texi (MIPS Options): Add `interaptiv-mr2' to the
	`-march=' argument list.
 2017-06-28 02:07:36 +01:00
Kuan-Lin Chen
a6cbf936e3 RISC-V: Use pc-relative relocation for FDE initial location 
The symbol address in .eh_frame may be adjusted in
_bfd_elf_discard_section_eh_frame, and the content of .eh_frame will be
adjusted in _bfd_elf_write_section_eh_frame. Therefore, we cannot insert
a relocation whose addend symbol is in .eh_frame. Othrewise, the value
may be adjusted twice.

bfd/ChangeLog
2017-06-26  Kuan-Lin Chen  <rufus@andestech.com>

	* elfnn-riscv.c (perform_relocation): Support the new
	R_RISCV_32_PCREL relocation.
	(riscv_elf_relocate_section): Likewise.
	* elfxx-riscv.c (howto_table): Likewise.
	(riscv_reloc_map): Likewise.
	* bfd-in2.h (BFD_RELOC_RISCV_32_PCREL): New relocation.
	* libbfd.h: Regenerate.

gas/ChangeLog
2017-06-26  Kuan-Lin Chen  <rufus@andestech.com>

	* config/tc-riscv.c (md_apply_fix) [BFD_RELOC_32]: Convert to a
	R_RISCV_32_PCREL relocation.

include/ChangeLog
2017-06-26  Kuan-Lin Chen  <rufus@andestech.com>

	* elf/riscv.h (R_RISCV_32_PCREL): New.
 2017-06-26 18:26:40 -07:00