PR binutils/21156
* dwarf.c (cu_tu_indexes_read): Move into...
(load_cu_tu_indexes): ... here. Change the variable into
tri-state. Change the function into boolean, returning
false if the indicies could not be loaded.
(find_cu_tu_set): Return NULL if the indicies could not be
loaded.
The direct references in objcopy kind of look like a hack to me, so
I'm calling these symbols internal too. Certainly they aren't named
and documented as a public BFD symbol today anyway.
So ... give these bfd-internal symbols with external linkage a _bfd_
prefix to avoid collisions in the global symbol namespace.
While at it, give them names that more closely match the corresponding
option name that toggles them.
Also while at it, fix a few related comment typos.
gdb/ChangeLog:
2017-02-17 Pedro Alves <palves@redhat.com>
* srec.c (Chunk): Rename to ...
(_bfd_srec_len): ... this.
(S3Forced): Rename to ...
(_bfd_srec_forceS3): ... this.
* objcopy.c: Adjust all references.
PR binutils/21155
* readelf.c (IN_RANGE): New macro. Tests for an address + offset
being within a given range.
(target_specific_reloc_handling): Use macro to test for underflow
as well as overflow of reloc offset.
PR binutils/21139
* readelf.c (target_specific_reloc_handling): Add num_syms
parameter. Check for symbol table overflow before accessing
symbol value. If reloc pointer is NULL, discard all saved state.
(apply_relocations): Pass num_syms to target_specific_reloc_handling.
Call target_specific_reloc_handling with a NULL reloc pointer
after processing all of the relocs.
PR binutils/21137
* readelf.c (target_specific_reloc_handling): Add end parameter.
Check for buffer overflow before writing relocated values.
(apply_relocations): Pass end to target_specific_reloc_handling.
PR 20343
ld * ld.texinfo (Options): Extend documentation of the --plugin
option. Include a description of where the plugins should be
located.
binutils* doc/binutils.texi (ar): Extend documentation of the --plugin
option. Include a description of where the plugins should be
located.
(nm): Likewise.
When displaying the section headers table using objdump (-h), the column
containing the section header name is currently fixed at 13 characters.
A section name that is longer than 13 characters will overflow the
column causing the table to become miss-aligned.
In this commit I change the behaviour so that _in wide mode_ (-w -h) the
section name column is dynamically resized to fit the longest section
name we plan to display. In wide mode the column still retains a
minimum width of 13 characters.
In non-wide more the behaviour is completely unchanged.
While I was changing the dump_headers function I have unified the two
printf lines that handled the different address widths into a single
printf, the address width is now passed into printf using the '*' field
width format character.
binutils/ChangeLog:
* objdump.c (dump_section_header): Extract max section name length
from data parameter, use this when formatting output.
(find_longest_section_name): New function.
(dump_headers): Calculate longest section name when in wide mode,
reformat to unify printing of header line.
ld/ChangeLog:
* testsuite/ld-elf/eh-frame-hdr.d: Update expected results.
PR 21059
binutils* arlex.l: Support processing with flex 2.6.3.
* deflex.l: Likewise.
gas * config/bfin-lex.l: Support processing with flex 2.6.3.
* itbl-lex.l: Likewise.
binutils* resbin.c: Optional dialog control data immediately follow
the control description without alignment.
* testsuite/binutils-all/windres/controldata.rc: New test.
source.
* testsuite/binutils-all/windres/controldata.rsd: New test.
PR binutils/20876
bfd * opncls.c (find_separate_debug_file): Add include_dirs
parameter. Only include the directory part of the bfd's filename
in search paths if include_dirs is true. Add a couple of extra
locations for looking for debug files.
( bfd_follow_gnu_debuglink): Update invocation of
find_separate_debug_file.
(bfd_follow_gnu_debugaltlink): Likewise.
(get_build_id): New function: Finds the build-id of the given bfd.
(get_build_id_name): New function: Computes the name of the
separate debug info file for a bfd, based upon its build-id.
(check_build_id_file): New function: Checks to see if a separate
debug info file exists at the given location, and that its
build-id matches that of the original bfd.
(bfd_follow_build_id_debuglink): New function: Finds a separate
debug info file for a given bfd by using the build-id method.
* dwarf2.c (_bfd_dwarf2_slurp_debug_info): Try using the build-id
method of locating a separate debug info file before using the
debuglink method.
* bfd-in2.h: Regenerate.
binutils * NEWS: Mention the new feature.
* testsuite/binutils-all/objdump.exp (test_build_id_debuglink):
New proc to test the location of separate debug info files using
the build-id method.
bfd * dwarf2.c (lookup_address_in_function_table): Return early if
there are no functions in the given comp unit, or if the high
address of the last function in the comp unit is less than the
desired address.
binutils * objdump.c (display_file): Add new parameter 'last_file'. If
last_file is true, do not call bfd_close at the end of the
function.
(main): Set the value of the last_file parameter when calling
display_file.
Add ASMACRO instruction support as per the MIPS16e ASE architecture
specifications [1][2], completing MIPS16e instruction set support.
[1] "MIPS32 Architecture for Programmers, Volume IV-a: The MIPS16e
Application-Specific Extension to the MIPS32 Architecture", MIPS
Technologies, Inc., Document Number: MD00076, Revision 2.63, July
16, 2013, Section 4.1 "MIPS16e Instruction Descriptions", p. 65
[2] "MIPS64 Architecture for Programmers, Volume IV-a: The MIPS16e
Application-Specific Extension to the MIPS64 Architecture", MIPS
Technologies, Inc., Document Number: MD00077, Revision 2.60, June
25, 2008, Section 1.1 "MIPS16e Instruction Descriptions", p. 66
include/
* opcode/mips.h: Document `0', `1', `2', `3', `4' and `s'
operand codes.
opcodes/
* mips16-opc.c (decode_mips16_operand): Add `0', `1', `2', `3',
`4' and `s' operand codes.
(mips16_opcodes): Add "asmacro" entry.
binutils/
* testsuite/binutils-all/mips/mips16-extend-insn.d: Update for
ASMACRO support.
gas/
* testsuite/gas/mips/mips16-asmacro.d: New test.
* testsuite/gas/mips/mips16-32@mips16-asmacro.d: New test.
* testsuite/gas/mips/mips16-64@mips16-asmacro.d: New test.
* testsuite/gas/mips/mips16-asmacro.s: New test source.
* testsuite/gas/mips/mips.exp: Run the new tests.
Identify non-extensible instructions in the MIPS16 opcode table and
disallow their use with the `.e' instruction size suffix in assembly and
do not interpret any EXTEND prefix present as a part of the instruction
in disassembly.
According to all versions of the MIPS16 ASE specifications the following
instructions encodings are not extensible [1][2][3][4][5][6]: I8/MOV32R,
I8/MOVR32, all RRR minor opcodes, all RR minor opcodes except from DSRA
and DSRL, and EXTEND itself, and as from revision 2.50 of the MIPS16e
ASE specifications it has been further clarified what was previously
implied, that non-extesiable instructions when preceded with an EXTEND
prefix must cause a Reserved Instruction exception [3][5].
Therefore in the presence of an EXTEND prefix none of these instructions
are supposed to be handled as extended instructions and supporting these
forms in disassembly causes confusion, and in the case of the RRR major
opcode it also clashes with the ASMACRO encoding.
References:
[1] "Product Description, MIPS16 Application-Specific Extension",
Version 1.3, MIPS Technologies, Inc., 970130, Table 3. "MIPS16
Instruction Set Summary", p. 5
[2] same, Table 5 "RR Minor Opcodes (RR-type instructions)", p.10
[3] "MIPS32 Architecture for Programmers, Volume IV-a: The MIPS16e
Application-Specific Extension to the MIPS32 Architecture", MIPS
Technologies, Inc., Document Number: MD00076, Revision 2.63, July
16, 2013, Section 3.9 "MIPS16e Instruction Summaries", pp. 37-39
[4] same, Section 3.15 "Instruction Bit Encoding", pp. 46-49
[5] "MIPS64 Architecture for Programmers, Volume IV-a: The MIPS16e
Application-Specific Extension to the MIPS64 Architecture", MIPS
Technologies, Inc., Document Number: MD00077, Revision 2.60, June
25, 2008, Section 1.9 "MIPS16e Instruction Summaries", pp. 38-41
[6] same, Section 1.15 "Instruction Bit Encoding", pp. 48-51
include/
* opcode/mips.h (INSN2_SHORT_ONLY): New macro.
gas/
* config/tc-mips.c (is_size_valid_16): Disallow a `.e' suffix
instruction size override for INSN2_SHORT_ONLY opcode table
entries.
* testsuite/gas/mips/mips16-extend-swap.d: Adjust output.
* testsuite/gas/mips/mips16-macro-e.l: Adjust error messages.
* testsuite/gas/mips/mips16-32@mips16-macro-e.l: Adjust error
messages.
* testsuite/gas/mips/mips16e-32@mips16-macro-e.l: Adjust error
messages.
* testsuite/gas/mips/mips16-insn-e.d: New test.
* testsuite/gas/mips/mips16-insn-t.d: New test.
* testsuite/gas/mips/mips16-32@mips16-insn-e.d: New test.
* testsuite/gas/mips/mips16-64@mips16-insn-e.d: New test.
* testsuite/gas/mips/mips16e-32@mips16-insn-e.d: New test.
* testsuite/gas/mips/mips16-32@mips16-insn-t.d: New test.
* testsuite/gas/mips/mips16-64@mips16-insn-t.d: New test.
* testsuite/gas/mips/mips16e-32@mips16-insn-t.d: New test.
* testsuite/gas/mips/mips16-insn-e.l: New stderr output.
* testsuite/gas/mips/mips16-insn-t.l: New stderr output.
* testsuite/gas/mips/mips16-32@mips16-insn-e.l: New stderr
output.
* testsuite/gas/mips/mips16-64@mips16-insn-e.l: New stderr
output.
* testsuite/gas/mips/mips16e-32@mips16-insn-e.l: New stderr
output.
* testsuite/gas/mips/mips16-32@mips16-insn-t.l: New stderr
output.
* testsuite/gas/mips/mips16-64@mips16-insn-t.l: New stderr
output.
* testsuite/gas/mips/mips16e-32@mips16-insn-t.l: New stderr
output.
* testsuite/gas/mips/mips16-insn-e.s: New test source.
* testsuite/gas/mips/mips16-insn-t.s: New test source.
* testsuite/gas/mips/mips.exp: Run the new tests.
opcodes/
* mips-dis.c (print_insn_mips16): Disallow EXTEND prefix
matching for INSN2_SHORT_ONLY opcode table entries.
* mips16-opc.c (SH): New macro.
(mips16_opcodes): Set SH in `pinfo2' for non-extensible
instruction entries: "nop", "addu", "and", "break", "cmp",
"daddu", "ddiv", "ddivu", "div", "divu", "dmult", "dmultu",
"drem", "dremu", "dsllv", "dsll", "dsrav", "dsra", "dsrlv",
"dsrl", "dsubu", "exit", "entry", "jalr", "jal", "jr", "j",
"jalrc", "jrc", "mfhi", "mflo", "move", "mult", "multu", "neg",
"not", "or", "rem", "remu", "sllv", "sll", "slt", "sltu",
"srav", "sra", "srlv", "srl", "subu", "xor", "sdbbp", "seb",
"seh", "sew", "zeb", "zeh", "zew" and "extend".
binutils/
* testsuite/binutils-all/mips/mips16-extend-insn.d: New test.
* testsuite/binutils-all/mips/mips16-extend-insn.s: New test
source.
* testsuite/binutils-all/mips/mips.exp: Run the new tests.
Limit MIPS16 instruction disassembly according to the ISA level and ASE
set selected, as with the regular MIPS and microMIPS instruction sets.
Retain the property of `objdump -m mips:16' disassembling all MIPS16
instructions however, regardless of any ISA level recorded in the binary
examined.
To validate the disassembler use the GAS test suite for its convenience
of running tests across multiple ISAs, even though placing the tests in
the binutils test suite would be more appropriate. Adjust the single
binutils test which depends on 64-bit instruction disassembly to have
the ISA level required actually recorded in the binary examined.
opcodes/
* mips-dis.c (mips_arch_choices): Use ISA_MIPS64 rather than
ISA_MIPS3 as the `isa' selection in the `bfd_mach_mips16' entry.
(print_insn_mips16): Check opcode entries for validity against
the ISA level and ASE set selected.
binutils/
* testsuite/binutils-all/mips/mips16-undecoded.s: Use `.module'
rather than `.set' to set the ISA level.
gas/
* testsuite/gas/mips/mips16-sub.d: New test.
* testsuite/gas/mips/mips16-32@mips16-sub.d: New test.
* testsuite/gas/mips/mips16e-32@mips16-sub.d: New test.
* testsuite/gas/mips/mips16e-sub.d: New test.
* testsuite/gas/mips/mips16-32@mips16e-sub.d: New test.
* testsuite/gas/mips/mips16-64@mips16e-sub.d: New test.
* testsuite/gas/mips/mips16e-64-sub.d: New test.
* testsuite/gas/mips/mips16-32@mips16e-64-sub.d: New test.
* testsuite/gas/mips/mips16-64@mips16e-64-sub.d: New test.
* testsuite/gas/mips/mips16e-32@mips16e-64-sub.d: New test.
* testsuite/gas/mips/mips16-sub.s: New test source.
* testsuite/gas/mips/mips16e-sub.s: New test source.
* testsuite/gas/mips/mips16e-64-sub.s: New test source.
* testsuite/gas/mips/mips.exp: Run the new tests.
Switch to 32-bit MIPS16 opcode table entry interpretation, similar to
how the microMIPS opcode table is handled, for both the `match' and
`mask' fields, removing special casing for JAL and JALX instructions and
their `a' and `i' operand codes throughout, while retaining automatic
processing of extendable opcodes in assembly and disassembly.
In assembly disallow size enforcement suffixes as appropriate: `.t' for
both 32-bit instructions and macros and `.e' for macros only, making
macro handling consistent with the microMIPS instruction set.
In disassembly fully decode EXTEND prefixes prepended to unsupported
instruction encodings (according to the ISA selection) rather than
dumping them as hexadecimal data along with the following instruction,
removing all special casing for the EXTEND prefix and making its
handling rely on its opcode table entry, except where it is considered a
part of an extendable instruction.
include/
* opcode/mips.h (mips_opcode_32bit_p): New inline function.
gas/
* config/tc-mips.c (micromips_insn_length): Use
`mips_opcode_32bit_p'.
(is_size_valid): Adjust description.
(is_size_valid_16): New function.
(validate_mips_insn): Use `mips_opcode_32bit_p' in MIPS16
operand decoding.
(validate_mips16_insn): Remove `a' and `i' operand code special
casing, use `mips_opcode_32bit_p' to determine instruction
width.
(append_insn): Adjust forced MIPS16 instruction size
determination.
(match_mips16_insn): Likewise. Don't shift the instruction's
opcode with the `a' and `i' operand codes. Use
`mips_opcode_32bit_p' in operand decoding.
(match_mips16_insns): Check for forced instruction size's
validity.
(mips16_ip): Don't force instruction size in the `noautoextend'
mode.
* testsuite/gas/mips/mips16-jal-e.d: New test.
* testsuite/gas/mips/mips16-jal-t.d: New test.
* testsuite/gas/mips/mips16-macro-e.d: New test.
* testsuite/gas/mips/mips16-macro-t.d: New test.
* testsuite/gas/mips/mips16-jal-t.l: New stderr output.
* testsuite/gas/mips/mips16-macro-e.l: New stderr output.
* testsuite/gas/mips/mips16-macro-t.l: New stderr output.
* testsuite/gas/mips/mips16-jal-e.s: New test source.
* testsuite/gas/mips/mips16-jal-t.s: New test source.
* testsuite/gas/mips/mips16-macro-e.s: New test source.
* testsuite/gas/mips/mips16-macro-t.s: New test source.
* testsuite/gas/mips/mips.exp: Run the new tests.
opcodes/
* mips-dis.c (print_mips16_insn_arg): Always handle `extend' and
`insn' together, with `extend' as the high-order 16 bits.
(match_kind): New enum.
(print_insn_mips16): Rework for 32-bit instruction matching.
Do not dump EXTEND prefixes here.
* mips16-opc.c (mips16_opcodes): Move "extend" entry to the end.
Recode `match' and `mask' fields as 32-bit in absolute "jal" and
"jalx" entries.
binutils/
* testsuite/binutils-all/mips/mips16-extend-noinsn.d: Adjust
test for separate EXTEND prefix disassembly.
We've decided to standardize on two flags for RISC-V: "-march" sets the
target architecture (which determines which instructions can be
generated), and "-mabi" sets the target ABI. We needed to rework this
because the old flag set didn't support soft-float or single-float ABIs,
and didn't support an x32-style ABI on RISC-V.
Additionally, we've changed the behavior of the -march flag: it's now a
lot stricter and only parses things we can actually understand.
Additionally, it's now lowercase-only: the rationale is that while the
RISC-V ISA manual specifies that ISA strings are case-insensitive, in
Linux-land things are usually case-sensitive. Since this flag can be
used to determine library paths, we didn't want to bake some
case-insensitivity in there that would case trouble later.
This patch implements these two new flags and removes the old flags that
could conflict with these. There wasn't a RISC-V release before, so we
want to just support a clean flag set.
include/
* elf/riscv.h (EF_RISCV_SOFT_FLOAT): Don't define.
(EF_RISCV_FLOAT_ABI, EF_RISCV_FLOAT_ABI_SOFT): Define.
(EF_RISCV_FLOAT_ABI_SINGLE, EF_RISCV_FLOAT_ABI_DOUBLE): Define.
(EF_RISCV_FLOAT_ABI_QUAD): Define.
bfd/
* elfnn-riscv.c (_bfd_riscv_elf_merge_private_bfd_data): Use
EF_RISCV_FLOAT_ABI_SOFT instead of EF_RISCV_SOFT_FLOAT.
binutils/
* readelf.c (get_machine_flags): Use
EF_RISCV_FLOAT_ABI_{SOFT,SINGLE,DOBULE,QUAD) instead of
EF_RISCV_{SOFT,HARD}_FLOAT.
gas/
* config/tc-riscv.h (xlen): Delete.
* config/tc-riscv.c (xlen): Make static.
(abi_xlen): New variable.
(options): Replace OPTION_{M32,M64,MSOFT_FLOAT,MHARD_FLOAT,MRVC}
with OPTION_MABI.
(md_longopts): Likewise.
(md_parse_option): Likewise.
(riscv_elf_final_processing): Likewise.
* doc/as.texinfo (Target RISC-V options): Likewise.
* doc/c-riscv.texi (OPTIONS): Likewise.
* config/tc-riscv.c (float_mode): Removed.
(float_abi): New type, specifies the floating-point ABI.
(riscv_set_abi): New function.
(riscv_add_subset): Only allow lower-case ISA names and require
them to start with "rv".
(riscv_after_parse_args): Likewise.
opcodes/
* riscv-dis.c (riscv_disassemble_insn): Default to the ELF's
XLEN when none is provided.
Respect any ASE flags recorded in ELF file structures for the purpose of
selecting instructions to be disassembled, preventing code from being
hex-dumped even though having been clearly indicated as valid at the
assembly time. Use date from the MIPS ABI flags structure if present,
and otherwise there may be an MDMX ASE flag set in the ELF file header.
For backwards compatibility only set extra flags and do not clear any,
preserving all previously set by the architecture selected to be
disassembled for.
include/
* elf/mips.h (Elf_Internal_ABIFlags_v0): Also declare struct
typedef as `elf_internal_abiflags_v0'.
bfd/
* bfd-in.h (elf_internal_abiflags_v0): New struct declaration.
(bfd_mips_elf_get_abiflags): New prototype.
* elfxx-mips.c (bfd_mips_elf_get_abiflags): New function.
* bfd-in2.h: Regenerate.
opcodes/
* mips-dis.c (mips_convert_abiflags_ases): New function.
(set_default_mips_dis_options): Also infer ASE flags from ELF
file structures.
binutils/
* testsuite/binutils-all/mips/mips-ase-1.d: New test.
* testsuite/binutils-all/mips/mips-ase-2.d: New test.
* testsuite/binutils-all/mips/mips-ase-3.d: New test.
* testsuite/binutils-all/mips/mips-ase-1.s: New test source.
* testsuite/binutils-all/mips/mips-ase-2.s: New test source.
* testsuite/binutils-all/mips/mips.exp: Run the new tests.
Use a tab rather than a space to separate `extend' and its uninterpreted
argument output, like with regular instructions. Separate hexadecimal
halves of undecoded extended instructions output with a space instead of
presenting them concatenated.
opcodes/
* mips-dis.c (print_insn_mips16): Use a tab rather than a space
to separate `extend' and its uninterpreted argument output.
Separate hexadecimal halves of undecoded extended instructions
output.
binutils/
* testsuite/binutils-all/mips/mips16-extend-noinsn.d: New test.
* testsuite/binutils-all/mips/mips16-extend-noinsn.s: New test
source.
* testsuite/binutils-all/mips/mips.exp: Run the new test.
Complement commit dd8b7c222e ("MIPS: mips16e jalrc/jrc opcodes"),
<https://sourceware.org/ml/binutils/2005-07/msg00349.html>, and stop the
disassembler making a delay-slot adjustment for PC-relative operations
following either MIPS16e compact jumps, or undefined RR/J(AL)R(C)
encodings that have the `l' (link) and `ra' (source register is `ra')
bits set both at a time. Adjust code description for accuracy. Add a
suitable test case.
opcodes/
* mips-dis.c (print_mips16_insn_arg): Avoid delay-slot
adjustment for PC-relative operations following MIPS16e compact
jumps or undefined RR/J(AL)R(C) encodings.
binutils/
* testsuite/binutils-all/mips/mips16-pcrel.d: New test.
* testsuite/binutils-all/mips/mips16-pcrel.s: New test source.
* testsuite/binutils-all/mips/mips.exp: Run the new test.
PR binutils/20930
* objcopy.c (mark_symbols_used_in_relocations): Check for a null
symbol pointer pointer before attempting to mark the symbol as
kept.
