Commit Graph

2175 Commits

Author SHA1 Message Date
Fangrui Song
9a17a13643 [PATCH] gold: Set DF_1_PIE for -pie
PR gold/26039
	* layout.cc (Layout::finish_dynamic_section): Set DF_1_PIE.

	elfcpp/
	* elfcpp.h (enum DF_1): New enum member DF_1_PIE.
2020-06-18 10:46:18 +01:00
Alan Modra
423054bead Use __asm__ rather than asm in gold testsuite
discard_locals_test.c:28:6: error: expected declaration specifiers or
‘...’ before string constant
 asm (".Lshould_be_discarded:");
      ^

	* testsuite/discard_locals_test.c: Replace uses of asm with __asm__.
	* testsuite/discard_locals_relocatable_test.c: Likewise.
2020-06-16 22:12:39 +09:30
Alan Modra
90cd2aad03 Use CXXCOMPILE in gold/testsuite/Makefile for c++ testcases
I was playing with passing -std=c99 to an older version of gcc by
using CC="gcc-4 -std=c99", and ran into
cc1plus: error: command line option ‘-std=c99’ is valid for C/ObjC but
not for C++ [-Werror]
This obvious fix uses the correct compiler for a number of gold
testcases.

	* testsuite/Makefile.am (export_dynamic_plugin.o): Use CXXCOMPILE.
	(plugin_test_wrap_symbols_1.o): Likewise.
	(plugin_test_wrap_symbols_2.o): Likewise.
	* testsuite/Makefile.in: Regenerate.
2020-06-16 21:03:25 +09:30
Roland McGrath
cae64165f4 gold, ld: Implement -z start-stop-visibility=... option.
gold/
	Implement -z start-stop-visibility=... option.
	* options.h (class General_options): Handle -z start-stop-visibility=.
	(General_options::start_stop_visibility_enum): New public method.
	(General_options::set_start_stop_visibility_enum): New private method.
	(General_options::start_stop_visibility_enum_): New private member.
	* options.cc (General_options::General_options): Add initializer.
	(General_options::finalize): Set this->start_stop_visibility_enum_
	from string value.
	* layout.cc (Layout::define_section_symbols): Use option setting.

bfd/
	* elflink.c (bfd_elf_define_start_stop): Use start_stop_visibility
	field of bfd_link_info.

include/
	* bfdlink.h (struct bfd_link_info): New field start_stop_visibility.

ld/
	* NEWS: Mention -z start-stop-visibility=... option for ELF.
	* ld.texi (Options): Document -z start-stop-visibility=... option.
	* ldmain.c (main): Initialize link_info.start_stop_visibility.
	* emultempl/elf.em (gld${EMULATION_NAME}_handle_option):
	Parse -z start-stop-visibility=... option.
2020-06-15 11:45:02 -07:00
Alan Modra
87c69f9732 Rename PowerPC64 pcrel GOT TLS relocations
These relocations should have had REL in their names, to reflect the
fact that they are pc-relative.  Fix that now by adding _PCREL.
I've added some back-compatibility code to support anyone using
.reloc with the old relocations.

include/
	* elf/ppc64.h (elf_ppc64_reloc_type): Rename
	R_PPC64_GOT_TLSGD34 to R_PPC64_GOT_TLSGD_PCREL34,
	R_PPC64_GOT_TLSLD34 to R_PPC64_GOT_TLSLD_PCREL34,
	R_PPC64_GOT_TPREL34 to R_PPC64_GOT_TPREL_PCREL34, and
	R_PPC64_GOT_DTPREL34 to R_PPC64_GOT_DTPREL_PCREL34.
bfd/
	* reloc.c: Rename
	BFD_RELOC_PPC64_GOT_TLSGD34 to BFD_RELOC_PPC64_GOT_TLSGD_PCREL34,
	BFD_RELOC_PPC64_GOT_TLSLD34 to BFD_RELOC_PPC64_GOT_TLSLD_PCREL34,
	BFD_RELOC_PPC64_GOT_TPREL34 to BFD_RELOC_PPC64_GOT_TPREL_PCREL34,
	BFD_RELOC_PPC64_GOT_DTPREL34 to BFD_RELOC_PPC64_GOT_DTPREL_PCREL34.
	* elf64-ppc.c: Update throughout for reloc renaming.
	(ppc64_elf_reloc_name_lookup): Handle old reloc names.
	* libbfd.h: Regenerate.
	* bfd-in2.h: Regenerate.
gas/
	* config/tc-ppc.c: Update throughout for reloc renaming.
elfcpp/
	* powerpc.h: Rename
	R_PPC64_GOT_TLSGD34 to R_PPC64_GOT_TLSGD_PCREL34,
	R_PPC64_GOT_TLSLD34 to R_PPC64_GOT_TLSLD_PCREL34,
	R_PPC64_GOT_TPREL34 to R_PPC64_GOT_TPREL_PCREL34, and
	R_PPC64_GOT_DTPREL34 to R_PPC64_GOT_DTPREL_PCREL34.
gold/
	* powerpc.cc: Update throughout for reloc renaming.
2020-06-06 14:44:32 +09:30
Alan Modra
6f3fe02b0b PowerPC: downgrade FP mismatch error for shared libraries to a warning
PR 25882
bfd/
	* elf32-ppc.c (_bfd_elf_ppc_merge_fp_attributes): Don't init FP
	attributes from shared libraries, and do not return an error if
	they don't match.
gold/
	* powerpc.cc (merge_object_attributes): Replace name param with
	obj param.  Update callers.  Don't init FP attributes from shared
	libraries, and do not emit an error if they don't match.
2020-05-22 13:32:51 +09:30
Nikita Ermakov
6a31512fd4 gold: powerpc: Test whether sym is not a plugin in do_gc_mark_symbol
sym->object() could be either a Plugin or Powerpc_relobj. There could
be a situation when Pluginobj would be proccessed in
ppc_object->get_opd_ent(dst_off) as Powerpc_relobj and it leads to the
segmentation fault.

	* powerpc.cc (do_gc_mark_symbol): Don't segfault on plugin symbols.
2020-05-15 08:30:33 +09:30
Nick Clifton
9d95b8e9d6 Update Swedish translation for the gas sub-directory and a new Serbian translation for the gold sub-directory. 2020-05-14 11:26:26 +01:00
Alan Modra
7c1f422735 PowerPC Rename powerxx to power10
Now that ISA3.1 is out we can finish with the powerxx silliness.

bfd/
	* elf64-ppc.c: Rename powerxx to power10 throughout.
gas/
	* config/tc-ppc.c (md_assemble): Update for PPC_OPCODE_POWER10
	renaming.
	* testsuite/gas/ppc/prefix-align.d: Use -mpower10/-Mpower10 in
	place of -mfuture/-Mfuture.
	* testsuite/gas/ppc/prefix-pcrel.d: Likewise.
	* testsuite/gas/ppc/prefix-reloc.d: Likewise.
gold/
	* powerpc.cc: Rename powerxx to power10 throughout.
include/
	* elf/ppc64.h: Update comment.
	* opcode/ppc.h (PPC_OPCODE_POWER10): Rename from PPC_OPCODE_POWERXX.
ld/
	* testsuite/ld-powerpc/callstub-1.d: Use -mpower10/-Mpower10 in
	place of -mfuture/-Mfuture.
	* testsuite/ld-powerpc/notoc2.d: Likewise.
	* testsuite/ld-powerpc/powerpc.exp: Likewise.
	* testsuite/ld-powerpc/tlsgd.d: Likewise.
	* testsuite/ld-powerpc/tlsie.d: Likewise.
	* testsuite/ld-powerpc/tlsld.d: Likewise.
opcodes/
	* ppc-dis.c (ppc_opts): Add "power10" entry.
	(print_insn_powerpc): Update for PPC_OPCODE_POWER10 renaming.
	* ppc-opc.c (POWER10): Rename from POWERXX.  Update all uses.
2020-05-11 21:08:36 +09:30
H.J. Lu
8c16443418 gold: Compile common tests with -fcommon
Since GCC 10 defaults to -fno-common, add -fcommon to common tests to
force common behavior.

	PR gold/25904
	* testsuite/Makefile.am (COMMON_TEST_C_CFLAGS): New.
	(common_test_1.o): New rule.
	(common_test_2.o): Likewise.
	(common_test_3.o): Likewise.
	(plugin_common_test_1.o): Likewise.
	(plugin_common_test_2.o): Likewise.
	(common_test_1_v1.o): Likewise.
	(common_test_1_v2.o): Likewise.
	(common_test_2_pic.o): Compile with $(COMMON_TEST_C_CFLAGS).
	(common_test_3_pic.o): Likewise.
	* testsuite/Makefile.in: Regenerated.
2020-05-02 06:48:26 -07:00
H.J. Lu
ccf20d460f gold: x86-64: Fix TLSDESC relaxation for x32
X32 TLSDESC sequences can be:

40 8d 05 00 00 00 00	rex lea	foo@TLSDESC(%rip), %reg
...
67 ff 10		call	*foo@TLSCALL(%eax)

or the same sequence as LP64:

48 8d 05 00 00 00 00	lea	foo@TLSDESC(%rip), %reg
...
ff 10			call	*foo@TLSCALL(%rax)

We need to support both sequences for x32.  For both GDesc -> IE/LE
transitions,

67 ff 10		call	*foo@TLSCALL(%eax)

should relaxed to

0f 1f 00		nopl	(%rax)

For GDesc -> LE transition,

40 8d 05 00 00 00 00	rex lea	foo@TLSDESC(%rip), %reg

should relaxed to

40 c7 c0 fc ff ff ff	rex movl $foo@tpoff, %reg

For GDesc -> IE transition,

40 8d 05 00 00 00 00	rex lea	foo@TLSDESC(%rip), %reg

should relaxed to

40 8b 05 00 00 00 00	rex movl foo@gottpoff(%rip), %eax

	PR gold/25426
	* x86_64.cc (Target_x86_64<size>::Relocate::tls_desc_gd_to_ie):
	For x32, relax "rex leal foo@tlsdesc(%rip), %reg" to
	"rex movl foo@gottpoff(%rip), %eax" and relax ""call *(%eax)"
	to "nopl (%rax)".
	(Target_x86_64<size>::Relocate::tls_desc_gd_to_le): For x32,
	relax "rex leal foo@tlsdesc(%rip), %reg" to
	"rex movl foo@tpoff, %eax" and relax "call *foo@tlscall(%eax)"
	to "nopl (%rax)".
	* testsuite/Makefile.am (tls_test_gnu2.o): Depend on
	gcctestdir/as.
	(tls_test_file2_gnu2.o): Likewise.
	(tls_test_c_gnu2.o): Likewise.
	* testsuite/Makefile.in: Regenerated.
2020-05-01 10:11:23 -07:00
H.J. Lu
6d520e36de gold: x86-64: Fix TLSDESC -> LE relaxation
X86-64 TLSDESC sequences can be:

4c 8d 0d 00 00 00 00	leaq	foo@TLSDESC(%rip), %r9
4c 89 c8		movq	%r9, %rax
ff 10			call	*foo@TLSCALL(%rax)

TLSDESC -> LE relaxation can turn them into:

49 c7 c1 fc ff ff ff 	mov    $0xfffffffffffffffc,%r9
4c 89 c8             	mov    %r9,%rax
66 90                	xchg   %ax,%ax

We need to check and update the REX byte in this case.

	PR gold/25473
	* x86_64.cc (Target_x86_64<size>::Relocate::tls_desc_gd_to_ie):
	Properly check r8 - r15 in "lea foo@TLSDESC(%rip), %reg".
	(Target_x86_64<size>::Relocate::tls_desc_gd_to_le): Properly
	relax r8 - r15 in "lea foo@TLSDESC(%rip), %reg".
	* testsuite/Makefile.am (check_SCRIPTS): Add x86_64_gd_to_le.sh.
	(check_DATA): Add x86_64_gd_to_le.stdout.
	(MOSTLYCLEANFILES): Add x86_64_gd_to_le.
	(x86_64_gd_to_le.o): New target.
	(x86_64_gd_to_le): Likewise.
	(x86_64_gd_to_le.stdout): Likewise.
	* testsuite/Makefile.in: Regenerated.
	* testsuite/x86_64_gd_to_le.s: New file.
	* testsuite/x86_64_gd_to_le.sh: Likewise.
2020-05-01 10:08:48 -07:00
H.J. Lu
e10cfd0633 gold: Make Ordering::operator() even more complex
GCC 9 generates the same function size for Ordering::operator() in
odr_violation1.cc and odr_violation2.cc on x32:

  134: 00000000    31 FUNC    WEAK   DEFAULT   64 _ZN8OrderingclEii
   40: 00000000    31 FUNC    GLOBAL DEFAULT   10 _ZN8OrderingclEii

This patch makes Ordering::operator() even more complex

   134: 00000000    31 FUNC    WEAK   DEFAULT   64 _ZN8OrderingclEii
    42: 00000000    35 FUNC    GLOBAL DEFAULT   11 _ZN8OrderingclEii

	* testsuite/odr_violation2.cc (Ordering::operator()): Make
	expression even more complex.
2020-05-01 10:06:31 -07:00
H.J. Lu
de6d6067f5 gold: Update ver_test_pr16504.sh
commit df3a023bd6
Author: Alan Modra <amodra@gmail.com>
Date:   Tue Jul 23 17:54:42 2019 +0930

    SHF_GNU_MBIND requires ELFOSABI_GNU

changed readelf to print IFUNC only for ELFOSABI_GNU.  Since

$ readelf -h ver_test_pr16504.so
...
 OS/ABI:                            UNIX - System V
...

we get

$ readelf -sW ver_test_pr16504.so
...
     3: 0000000000000378    13 <OS specific>: 10 GLOBAL DEFAULT    9 foo@@VER1
...

Update ver_test_pr16504.sh to also accept "<OS specific>: 10".

	* testsuite/ver_test_pr16504.sh: Updated.
2020-05-01 09:05:21 -07:00
H.J. Lu
48bc218262 gold: Increment plt_offset after setting TLSDESC PLT entry
Increment plt_offset after setting the reserved TLSDESC PLT entry.

	PR gold/25872
	* x86_64.cc (Output_data_plt_x86_64_bnd::do_write): Increment
	plt_offset after setting the reserved TLSDESC PLT entry.
	(Output_data_plt_x86_64_ibt<size>::do_write): Likewise.
2020-05-01 09:00:27 -07:00
H.J. Lu
e977e74712 gold: Handle local IFUNC symbol for APLT
Handle local IFUNC symbol for APLT like global IFUNC symbol.

	PR gold/25872
	* x86_64.cc (Output_data_plt_x86_64_bnd::do_address_for_local):
	Handle local IFUNC symbol.
	(Output_data_plt_x86_64_ibt::do_address_for_local): Likewise.
2020-05-01 08:59:32 -07:00
Fangrui Song
9a6c68caa9 Add support for --no-rosegment option.
gold/
    * options.h (General_options): Add --no-rosegment option.
2020-03-19 15:54:38 -07:00
Nick Clifton
45c63c0fe8 Updated translations for some of the binutils sub-directories. 2020-02-24 14:52:34 +00:00
Nick Clifton
26916852e1 Updated translations for various binutils sub-directories 2020-01-20 15:10:23 +00:00
Nick Clifton
1b1bb2c67b Update version to 2.34.50. Regenerate configure and .pot files. 2020-01-18 14:12:07 +00:00
Nick Clifton
ae77468624 Add markers for 2.34 branch to the NEWS files and ChangeLogs. 2020-01-18 13:50:25 +00:00
Alan Modra
b14ce8bfe1 Re: Update year range in copyright notice of binutils files
Add the ChangeLog entry.
2020-01-01 18:55:18 +10:30
Alan Modra
b3adc24a07 Update year range in copyright notice of binutils files 2020-01-01 18:42:54 +10:30
Alan Modra
0b11474080 ChangeLog rotation 2020-01-01 18:12:08 +10:30
Martin Liska
5fa5f8f5fe
Introduce new .text.sorted.* sections.
gold/ChangeLog:

2019-11-26  Martin Liska  <mliska@suse.cz>

	* layout.cc (Layout::special_ordering_of_input_section):
	Add ".text.sorted".
	* output.cc: Special case ".text.sorted".
	* testsuite/section_sorting_name.cc: Cover also .text.sorted
	subsections.
	* testsuite/section_sorting_name.sh: Likewise.

ld/ChangeLog:

2019-11-26  Martin Liska  <mliska@suse.cz>

	* scripttempl/arclinux.sc: Add .text.sorted.* which is sorted
	by default.
	* scripttempl/elf.sc: Likewise.
	* scripttempl/elf64bpf.sc: Likewise.
	* scripttempl/nds32elf.sc: Likewise.
	* testsuite/ld-arm/arm-no-rel-plt.ld: Expect .text.sorted.*
	in the default linker script.
	* testsuite/ld-arm/fdpic-main.ld: Likewise.
	* testsuite/ld-arm/fdpic-shared.ld: Likewise.
2019-11-26 17:20:10 +01:00
Alan Modra
aa465b19c8 [GOLD] OSABI not set when STT_GNU_IFUNC or STB_GNU_UNIQUE symbols output
This patch arranges to have OSABI set to ELFOSABI_GNU (if not set to
some other non-zero value) when gold outputs an ifunc local or global
symbol, or a unique global symbol to either .dynsym or .symtab.
STT_GNU_IFUNC and STB_GNU_UNIQUE have values in the LOOS to HIOS range
and therefore require interpretation according to OSABI.

I'm not sure why parameters->target() is const Target& while
parameters->sized_target() is Sized_target*, but it's inconvenient to
use the latter in Symbol_table::finalize.  So this patch adds another
const_cast complained about in layout.cc and gold.cc.

	PR 24853
	* symtab.h (set_has_gnu_output, has_gnu_output_): New.
	* symtab.cc (Symbol_table::Symbol_table): Init has_gnu_output_.
	(Symbol_table::finalize): Set ELFOSABI_GNU when has_gnu_output_.
	(Symbol_table::set_dynsym_indexes, Symbol_table::sized_finalize):
	Call set_has_gnu_output for STT_GNU_IFUNC and STB_GNU_UNIQUE globals.
	* object.cc (Sized_relobj_file::do_finalize_local_symbols): Call
	set_has_gnu_output when STT_GNU_IFUNC locals will be output.
2019-11-19 07:36:20 +10:30
Miguel Saldivar
6f485ad416 PR24996, Gold fix for ternary operator within linker scripts
PR 24996
	* expression.cc (Trinary_expression::arg2_value): Use correct integer
	expression when calling "eval_maybe_dot" method.
	(Trinary_expression::arg3_value): Likewise.
2019-11-11 10:56:44 +10:30
Alan Modra
ea8e302e12 PR16794, gold ignores R_386_GOTOFF addend
An R_386_GOTOFF relocation has an addend, typically used when a
symbol can be replaced by its section symbol plus an offset.
psymval->value(object,0) is quite wrong then, fix it.

	PR 16794
	* i386.cc (Target_i386::Relocate::relocate <R_386_GOTOFF>): Don't
	ignore addend, apply using pcrel32.
	* x86_64.cc (Target_x86_64::Relocate::relocate <R_X86_64_GOTOFF64>):
	Similarly use pcrel64.
2019-09-28 16:47:52 +09:30
Nick Clifton
5d33705c7b Fix building gold with gcc-10.
* descriptors.cc: Include <string>
2019-09-24 10:07:56 +01:00
Alan Modra
6831670dd3 implicit conversion from enum ld_plugin_level to enum ld_plugin_status
This is a gcc10 warning fix.

gold/
	* testsuite/plugin_new_section_layout.c (new_input_hook): Correct
	return status enum values.
2019-09-23 23:44:21 +09:30
Alan Modra
4c51dacacf [GOLD] Fix spurious "plugin needed to handle lto object" warnings
lto_slim_object_ was unitialized.  I also thought it worth adding
a sanity check on the .gnu.lto_.lto.* section size, and made some
other tidies.

	PR 24768
	* layout.cc (Layout::Layout): Init lto_slim_object_.
	* object.cc (Sized_relobj_file::do_layout): Wrap overlong line.
	Don't use C cast.  Validate section size.  Don't copy contents.
2019-09-20 15:37:11 +09:30
Alan Modra
e59a100122 PowerPC64, error on unsupported dynamic relocation
This patch corrects the set of dynamic relocations recognised by gold
as supported by glibc, and teaches ld.bfd to report an error similar
to the gold error.  Note that ld --noinhibit-exec can be used to
produce an output, supporting older ld with newer glibc if the set of
supported glibc dynamic relocations changes.

bfd/
	* elf64-ppc.c (ppc64_glibc_dynamic_reloc): New function.
	(ppc64_elf_relocate_section): Error if emitting unsupported
	dynamic relocations.
gold/
	* powerpc.cc (Target_powerpc::Scan::check_non_pic): Move REL24
	to 32-bit supported.
2019-09-20 12:51:19 +09:30
Simon Marchi
e0b2a78c83 Re-generate many configure and Makefile.in files
I get some spurious changes when running autoconf/automake for various
projects in the tree.  This is likely because they were generated using
distro-patched tools last time.

I ran `autoreconf -f` in the various automake projects of the
binutils-gdb tree, and this is the result.  The tools I am using have
been compiled from source, from the upstream release.

bfd/ChangeLog:

	* Makefile.in: Re-generate.
	* configure: Re-generate.
	* doc/Makefile.in: Re-generate.

binutils/ChangeLog:

	* Makefile.in: Re-generate.
	* configure: Re-generate.
	* doc/Makefile.in: Re-generate.

gas/ChangeLog:

	* Makefile.in: Re-generate.
	* configure: Re-generate.
	* doc/Makefile.in: Re-generate.

gold/ChangeLog:

	* testsuite/Makefile.in: Re-generate.

gprof/ChangeLog:

	* Makefile.in: Re-generate.
	* configure: Re-generate.

ld/ChangeLog:

	* Makefile.in: Re-generate.
	* configure: Re-generate.

opcodes/ChangeLog:

	* Makefile.in: Re-generate.
	* configure: Re-generate.
2019-09-18 09:09:15 -04:00
Phil Blundell
60391a255b Add markers for 2.33 branch to NEWS and ChangeLog files. 2019-09-09 10:27:40 +01:00
Martin Liska
b4c555cfc4
Fix detection of missing plugin for LTO objects.
2019-08-16  Martin Liska  <mliska@suse.cz>

	PR ld/24912
	* elflink.c: Report error only for not relocatable.
	* linker.c (_bfd_generic_link_add_one_symbol): Do not handle
	here lto_slim_object as it's handled in caller.
2019-08-16  Martin Liska  <mliska@suse.cz>

	PR ld/24912
	* object.cc (big_endian>::do_layout): Do not report error,
	but only set a flag.
	(big_endian>::do_add_symbols): Report error only for when
	relocatable.
2019-08-16 13:14:36 +02:00
Alan Modra
89c52ae3a2 [GOLD] PowerPC64 pc-relative TLS support
Gold version of git commit c213164ad2.

elfcpp/
	* powerpc.h (R_PPC64_TPREL34, R_PPC64_DTPREL34),
	(R_PPC64_GOT_TLSGD34, R_PPC64_GOT_TLSLD34),
	(R_PPC64_GOT_TPREL34, R_PPC64_GOT_DTPREL34): Define.
gold/
	* powerpc.cc (Target_powerpc::Scan::get_reference_flags): Set
	flags for new relocations, and some missing older relocs.
	(Target_powerpc::Scan::local): Handle new pcrel tls relocs.
	Call set_has_static_tls for tprel relocs.
	(Target_powerpc::Scan::global): Likewise.
	(Target_powerpc::Relocate::relocate): Handle new pcrel tls relocs.
2019-08-02 18:41:34 +09:30
Alan Modra
6a010cf67a [GOLD] PowerPC relocation signed overflow check
Relocations with right shifts were calculating wrong overflow status.
Since the addr34 split-field reloc is implemented as an 18-bit high
part with value shifted right by 16 and a 16-bit low part, most of the
pc-relative relocs were affected.

	* powerpc.cc (Powerpc_relocate_functions::rela, rela_ua): Perform
	signed right shift for signed overflow check.
2019-08-02 18:22:42 +09:30
Martin Liska
cc5277b173 Support .gnu.lto_.lto section in ELF files (PR 24768).
bfd/ChangeLog:

2019-07-22  Martin Liska  <mliska@suse.cz>

	PR 24768
	* archive.c (_bfd_compute_and_write_armap): Come up with
	report_plugin_err variable.
	* bfd-in2.h (struct bfd): Add lto_slim_object flag.
	* elf.c (struct lto_section): New.
	(_bfd_elf_make_section_from_shdr): Parse content of
	.gnu_lto_.lto section.
	* elflink.c: Report error for a missing LTO plugin.
	* linker.c (_bfd_generic_link_add_one_symbol): Likewise.

binutils/ChangeLog:

2019-07-22  Martin Liska  <mliska@suse.cz>

	PR 24768
	* nm.c (filter_symbols): Set report_plugin_err if
	error is reported.
	(display_rel_file): Report error for a missing LTO plugin.

gold/ChangeLog:

2019-07-22  Martin Liska  <mliska@suse.cz>

	PR 24768
	* layout.h (class Layout): Add is_lto_slim_object and
	set_lto_slim_object.
	* object.cc (struct lto_section): Add lto_slim_object_.
	(big_endian>::do_layout): Parse content of
	.gnu_lto_.lto section.
	(big_endian>::do_add_symbols): Report error for a missing
	LTO plugin.
2019-07-29 10:11:44 +02:00
Alan Modra
0c951c25c6 [GOLD] PowerPC R_PPC64_PCREL_OPT support
* powerpc.cc (xlate_pcrel_opt): New function.
	(Target_powerpc::Relocate::relocate): Optimise PCREL34 and
	GOT_PCREL34 sequences marked with PCREL_OPT.
2019-07-13 09:57:50 +09:30
Alan Modra
c9b8abb7af [GOLD] PowerPC got reloc optimisation
Note that gold won't remove unused GOT entries, in contrast to ld.bfd
which will.

	* powerpc.cc (Powerpc_relobj::make_got_relative): New function.
	(relative_value_is_known): New functions.
	(Target_powerpc::Relocate::relocate): Edit code using
	GOT16_HA, GOT16_LO_DS, and GOT_PCREL34 relocs.
2019-07-13 09:57:50 +09:30
Alan Modra
e4dff7651b [GOLD] PowerPC relocations for prefix insns
Also use pc-relative instructions for notoc stubs.

elfcpp/
	* powerpc.h (R_PPC64_PCREL_OPT, R_PPC64_D34, R_PPC64_D34_LO),
	(R_PPC64_D34_HI30, R_PPC64_D34_HA30, R_PPC64_PCREL34),
	(R_PPC64_GOT_PCREL34, R_PPC64_PLT_PCREL34, R_PPC64_PLT_PCREL34_NOTOC),
	(R_PPC64_ADDR16_HIGHER34, R_PPC64_ADDR16_HIGHERA34),
	(R_PPC64_ADDR16_HIGHEST34, R_PPC64_ADDR16_HIGHESTA34),
	(R_PPC64_REL16_HIGHER34, R_PPC64_REL16_HIGHERA34),
	(R_PPC64_REL16_HIGHEST34, R_PPC64_REL16_HIGHESTA34),
	(R_PPC64_D28, R_PPC64_PCREL28): Define.
gold/
	* powerpc.cc (Target_powerpc): Add powerxx_stubs_ and accessor
	functions.
	(Target_powerpc::maybe_skip_tls_get_addr_call): Handle PLT_PCREL34
	and PLT_PCREL34_NOTOC relocs.
	(Powerpc_relocate_functions): Add addr34, addr34_hi, addr34_ha,
	addr28, addr16_higher34, addr16_highera34, addr16_highest34,
	addr16_highest34a functions.
	(li_11_0, ori_11_11_0, sldi_11_11_34): Define.
	(paddi_12_pc, pld_12_pc, pnop): Define.
	(d34, ha34): New inline functions.
	(Stub_table::add_plt_call_entry): Handle powerxx_stubs.
	(Stub_table::add_eh_frame): Likewise.
	(build_powerxx_offset): New function.
	(Stub_table::plt_call_size): Handle powerxx_stubs.
	(Stub_table::branch_stub_size): Likewise.
	(Stub_table::do_write): Likewise.
	(Target_powerpc::Scan::get_reference_flags): Handle new relocs.
	(Target_powerpc::Scan::reloc_needs_plt_for_ifunc: Likewise.
	(Target_powerpc::Scan::local, global, relocate): Likewise.
2019-07-13 09:57:50 +09:30
Alan Modra
220f99066d [GOLD] PowerPC notoc eh_frame
When generating notoc call and branch stubs without the benefit of
pc-relative insns, the stubs need to use LR to access the run time PC.
All LR changes must be described in .eh_frame if we're to support
unwinding through asynchronous exceptions.  That's what this patch
does.

The patch has gone through way too many iterations.  At first I
attempted to add multiple FDEs, one for each stub.  That ran into
difficulties with do_plt_fde_location which is only capable of setting
the address of a single FDE per Output_data section, and with removing
any FDEs added on a previous do_relax pass.  Removing FDEs (git commit
be897fb774) went overboard in matching the FDE contents.  That means
either stashing the contents created for add_eh_frame_for_plt to use
when calling remove_eh_frame_for_plt, or recreating contents on the
fly (*) just to remove FDEs.  In fact, FDE content matching is quite
unnecesary.  FDEs added by a previous do_relax pass are those with
u_.from_linker.post_map set.  So they can easily be recognised just by
looking at that flag.  This patch keeps that part of the multiple FDE
changes.

In the end I went for just one FDE per stub group to describe the call
stubs.  That's reasonably efficient for the common case of only
needing to describe the __tls_get_addr_opt call stub.  We don't expect
to be making many calls using notoc stubs without pc-relative insns.

*) Which has it's own set of problems.  The contents must be recreated
using the old stub layout, but .eh_frame size can affect stub
requirements so you need to temporarily keep the old .eh_frame size
when creating new stubs, then reset .eh_frame size before adding new
FDEs.

	* ehframe.cc (Fde::operator==): Delete.
	(Cie::remove_fde): Delete.
	(Eh_frame::remove_ehframe_for_plt): Delete fde_data and fde_length
	parameters.  Remove all post-map plt FDEs.
	* ehframe.h (Fde:post_map): Make const, add variant to compare plt.
	(Fde::operator==): Delete.
	(Cie::remove_fde): Implement here.
	(Cie::last_fde): New accessor.
	(Eh_frame::remove_ehframe_for_plt): Update prototype.
	* layout.cc (Layout::remove_eh_frame_for_plt): Delete fde_data and
	fde_length parameters.
	* layout.h (Layout::remove_eh_frame_for_plt): Update prototype.
	* powerpc.cc (Stub_table::tls_get_addr_opt_bctrl_): Delete.
	(Stub_table::plt_fde_len_, plt_fde_, init_plt_fde): Delete.
	(Stub_table::add_plt_call_entry): Don't set tls_get_addr_opt_bctrl_.
	(eh_advance): New function.
	(stub_sort): New function.
	(Stub_table::add_eh_frame): Emit eh_frame for notoc plt calls and
	branches as well as __tls_get_addr_opt plt call stub.
	(Stub_table::remove_eh_frame): Update to suit.
2019-07-13 09:57:50 +09:30
Alan Modra
32f5984419 [GOLD] PowerPC64 ELFv2 notoc support
Calls from notoc functions via the PLT need different stubs.  Even
calls to local functions requiring a valid toc pointer must go via a
stub.  This patch provides the support in gold.

elfcpp/
	* powerpc.h (R_PPC64_PLTSEQ_NOTOC, R_PPC64_PLTCALL_NOTOC): Define.
gold/
	* powerpc.cc (Target_powerpc::maybe_skip_tls_get_addr_call): Handle
	notoc calls.
	(is_branch_reloc): Template on size.  Return true for REL24_NOTOC.
	Update all callers.
	(max_branch_delta): Likewise.
	(Target_powerpc::Branch_info::make_stub): Add a stub for notoc
	calls to functions needing a valid toc pointer.
	(Target_powerpc::do_relax): Layout stubs again if any need resize.
	(add_12_11_12, addi_12_11, addis_12_11, ldx_12_11_12, ori_12_12_0),
	(oris_12_12_0, sldi_12_12_32): Define.
	(Stub_table::Plt_stub_ent): Add notoc_ and iter_ fields.
	(Stub_table::Branch_stub_key, Branch_stub_key_hash): Rename from
	Branch_stub_ent and Branch_stub_ent hash.  Remove save_res_ from key.
	(Stub_table::Branch_stub_ent): New struct.
	(class Stub_table): Add need_resize and resizing vars.
	(Stub_table::need_resize, branch_size): New accessors.
	(Stub_table::set_resizing): New function.
	(Stub_table::add_plt_call_entry): Handle notoc calls and resizing
	on seeing such or a tocsave stubs after a normal stub using the
	same sym.
	(Stub_table::add_long_branch_entry): Similarly.
	(Stub_table::find_long_branch_entry): Return a Branch_stub_ent*.
	(Stub_table::define_stub_syms): Adjust
	(Stub_table::build_tls_opt_head, build_tls_opt_tail): New functions.
	(build_notoc_offset): New function.
	(Stub_table::plt_call_size): Move out of line.  Handle notoc calls.
	(Stub_table::branch_stub_size): Similarly.
	(Stub_table::do_write): Separate loop for ELFv2 stubs, handling
	notoc calls.  Simplify ELFv1 loop.  Output notoc branch stubs.
	Use build_tls_opt_head and build_tls_opt_tail.
	(Target_powerpc::Scan::get_reference_flags): Handle REL24_NOTOC.
	(Target_powerpc::Scan::reloc_needs_plt_for_ifunc): Likewise,
	and PLTSEQ_NOTOC and PLTCALL_NOTOC.
	(Target_powerpc::Scan::local, global, relocate): Likewise.
2019-07-13 09:57:50 +09:30
Alan Modra
f60c61e60e [GOLD] PowerPC tweak relnum tests
There is a call of relocate() to perform a single relocation.  In that
case the "relnum" parameter is -1U and of course it isn't appropriate
to consider any of the PowerPC code sequence optimisations triggered
by a following relocation.

	* powerpc.cc (Target_powerpc::Relocate::relocate): Don't look
	at next/previous reloc when relnum is -1.
2019-06-28 10:18:03 +09:30
Alan Modra
f073a3e8c6 [GOLD] PowerPC linkage table error
This fixes a segfault when attempring to output a "linkage table
error".  "object" is only non-NULL in the local symbol case.

	* powerpc.cc (Stub_table::plt_error): New function.
	(Stub_table::do_write): Use it.
	(Output_data_glink::do_write): Don't segfault emitting linkage
	table error.
2019-06-28 10:17:45 +09:30
Alan Modra
c432bbbaaa [GOLD] R_PPC64_REL16_HIGH relocs
These relocs have been around for quite a while.  It's past time gold
supported them.

elfcpp/
	* powerpc.h (R_PPC64_REL16_HIGH, R_PPC64_REL16_HIGHA),
	(R_PPC64_REL16_HIGHER, R_PPC64_REL16_HIGHERA),
	(R_PPC64_REL16_HIGHEST, R_PPC64_REL16_HIGHESTA): Define.

gold/
	* powerpc.cc (Target_powerpc::Scan::get_reference_flags): Handle
	REL16_HIGH* relocs.
	(Target_powerpc::Scan::local): Likewise.
	(Target_powerpc::Scan::global): Likewise.
	(Target_powerpc::Relocate::relocate): Likewise.
2019-06-28 10:17:08 +09:30
Martin Liska
a3972330f4 Fix a missing include of <string>
gold/ChangeLog:

2019-06-07  Martin Liska  <mliska@suse.cz>

	* errors.h: Include string.
2019-06-10 12:26:33 +02:00
Joshua Oreman
e173ea00c2 Fix problem with ICF where diffs in EH frame info is ignored.
PR gold/21066
	* gc.h (gc_process_relocs): Track relocations in .eh_frame sections
	when ICF is enabled, even though the .eh_frame sections themselves
	are not foldable.
	* icf.cc (get_section_contents): Change arguments to permit operation
	on just part of a section. Include extra identity regions in the
	referring section's contents recursively.
	(match_sections): Lock object here instead of in get_section_contents
	so that get_section_contents can operate recursively.
	(Icf::add_ehframe_links): New method.
	(Icf::find_identical_sections): Pass .eh_frame sections to
	add_ehframe_links(). Increase default iteration count from 2 to 3
	because handling exception info typically requires one extra iteration.
	* icf.h (Icf::extra_identity_list_): New data member with accessor.
	(is_section_foldable_candidate): Include .gcc_except_table sections.
	* options.h: Update documentation for new default ICF iteration count.
	* testsuite/Makefile.am (icf_test_pr21066): New test case.
	* testsuite/Makefile.in: Regenerate.
	* testsuite/icf_test_pr21066.cc: New source file.
	* testsuite/icf_test_pr21066.sh: New test script.
2019-05-11 07:27:10 +08:00
Egeyar Bagcioglu
7ae39e2d40 Check whether symbols with MOVW_.ABS relocations require PLT entries (aarch64).
2019-02-19  Egeyar Bagcioglu  <egeyar.bagcioglu@oracle.com>

gold/
     PR gold/23870
     * aarch64.cc (Target_aarch64::Scan::global): Check if a symbol with
     R_AARCH64_MOVW_.ABS_* relocations requires a PLT entry.
     * testsuite/Makefile.am: Add aarch64_pr23870 test case.
     * testsuite/Makefile.in: Regenerate.
     * testsuite/aarch64_pr23870_bar.c: New file.
     * testsuite/aarch64_pr23870_foo.c: New file.
     * testsuite/aarch64_pr23870_main.S: New file.
2019-02-19 16:13:24 -08:00
Nick Clifton
e486594504 Updated French translation for ld/ and gold/ subdirectories 2019-02-12 13:22:42 +00:00