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1247 Commits

Author SHA1 Message Date
Kazu Hirata
1bc5dc8712 * gas/m68k/all.exp: Skip fmoveml on fido. 2007-05-04 15:45:21 +00:00
H.J. Lu
bfb568882d 2007-05-03 H.J. Lu <hongjiu.lu@intel.com> 
PR gas/4460
	* gas/i386/gotpc.s: Add a new test.
	* gas/i386/reloc64.s: Likewise.

	* gas/i386/gotpc.d: Updated.
	* gas/i386/reloc64.d: Likewise.
 2007-05-04 00:44:36 +00:00
H.J. Lu
20592a94ff gas/ 
2007-05-03  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (match_template): Don't explicitly check
	suffix for crc32 in Intel mode.
	(process_suffix): Issue an error for crc32 if the operand size
	is ambiguous.

gas/testsuite/

2007-05-03  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/crc32-intel.d: Updated.
	* gas/i386/crc32.d: Likewise.
	* gas/i386/sse4_2.d: Likewise.
	* gas/i386/x86-64-crc32-intel.d: Likewise.
	* gas/i386/x86-64-crc32.d: Likewise.
	* gas/i386/x86-64-sse4_2.d: Likewise.

	* gas/i386/crc32.s: Remove crc32 instructions with ambiguous
	operand size and suffix in crc32 instructions in Intel mode.
	* gas/i386/x86-64-crc32.s: Likewise.

	* gas/i386/sse4_2.s: Remove crc32 instructions with ambiguous
	operand size.
	* gas/i386/x86-64-sse4_2.s: Likewise.

	* gas/i386/i386.exp: Run inval-crc32 and x86-64-inval-crc32.

	* gas/i386/inval-crc32.l: New.
	* gas/i386/inval-crc32.s: Likewise.
	* gas/i386/x86-64-inval-crc32.l: Likewise.
	* gas/i386/x86-64-inval-crc32.s: Likewise.

opcodes/

2007-05-03  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (CRC32_Fixup): Don't print suffix in Intel mode.

	* i386-opc.c (i386_optab): Remove IgnoreSize and correct operand
	type for crc32.
 2007-05-03 21:07:16 +00:00
H.J. Lu
9344ff2951 gas/config/ 
2007-05-01  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (match_template): Check suffix for crc32 in
	Intel mdoe.
	(process_suffix): Default the suffix of 8bit crc32 to
	BYTE_MNEM_SUFFIX.
	(check_byte_reg): Skip check for 8bit crc32.

gas/testsuite/

2007-05-01  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/crc32-intel.d: New file.
	* gas/i386/crc32.d:Likewise.
	* gas/i386/crc32.s:Likewise.
	* gas/i386/x86-64-crc32-intel.d:Likewise.
	* gas/i386/x86-64-crc32.d:Likewise.
	* gas/i386/x86-64-crc32.s:Likewise.

	* gas/i386/i386.exp: Run crc32, crc32-intel, x86-64-crc32
	and x86-64-crc32-intel.

opcodes/

2007-05-01  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (CRC32_Fixup): Properly handle Intel mode and
	check data size prefix in 16bit mode.

	* i386-opc.c (i386_optab): Default crc32 to non-8bit and
	support Intel mode.
 2007-05-01 12:59:24 +00:00
H.J. Lu
5d6696482a gas/testsuite/ 
2007-04-26  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/4430
	* gas/i386/amd.d: Updated.
	* gas/i386/immed32.d: Likewise.
	* gas/i386/intel.d: Likewise.
	* gas/i386/intel16.d: Likewise.
	* gas/i386/intelok.d: Likewise.
	* gas/i386/jump16.d: Likewise.
	* gas/i386/naked.d: Likewise.
	* gas/i386/opcode-suffix.d: Likewise.
	* gas/i386/opcode.d: Likewise.
	* gas/i386/prescott.d: Likewise.
	* gas/i386/ssemmx2.d: Likewise.
	* gas/i386/tlsd.d: Likewise.
	* gas/i386/tlspic.d: Likewise.
	* gas/i386/x86-64-addr32.d: Likewise.
	* gas/i386/x86-64-prescott.d: Likewise.
	* gas/i386/x86-64-rip.d: Likewise.
	* gas/i386/x86_64.d: Likewise.

ld/testsuite/

2007-04-26  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/4430
	* ld-i386/tlsbin.dd: Updated.
	* ld-i386/tlsbindesc.dd: Likewise
	* ld-i386/tlsdesc.dd: Likewise
	* ld-i386/tlsgdesc.dd: Likewise
	* ld-i386/tlsnopic.dd: Likewise
	* ld-i386/tlspic.dd: Likewise
	* ld-x86-64/tlsbin.dd: Likewise
	* ld-x86-64/tlsbindesc.dd: Likewise
	* ld-x86-64/tlsdesc.dd: Likewise
	* ld-x86-64/tlsgdesc.dd: Likewise
	* ld-x86-64/tlspic.dd: Likewise

opcodes/

2007-04-26  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/4430
	* i386-dis.c (print_displacement): New.
	(OP_E): Call print_displacement instead of print_operand_value
	to output displacement when either base or index exist.  Print
	the explicit zero displacement in 16bit mode.
 2007-04-27 04:22:02 +00:00
H.J. Lu
185b11630d gas/testsuite/ 
2007-04-26  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/4429
	* gas/i386/i386.exp: Run "x86-64-addr32-intel" and
	"x86-64-rip-intel".

	* gas/i386/intelok.d: Updated.

	* gas/i386/x86-64-addr32-intel.d: New file.
	* gas/i386/x86-64-rip-intel.d: Likewise.

opcodes/

2007-04-26  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/4429
	* i386-dis.c (print_insn): Also swap the order of op_riprel
	when swapping op_index.  Break when the RIP relative address
	is printed.
	(OP_E): Properly handle RIP relative addressing and print the
	explicit zero displacement for Intel mode.
 2007-04-26 18:15:47 +00:00
Martin Schwidefsky
dacc8b01fd 2007-04-24 Andreas Krebbel <krebbel1@de.ibm.com> 
* opcodes/s390-opc.c (MASK_SSF_RRDRD): Fourth nybble belongs to the
	opcode.
	* opcodes/s390-opc.txt (pfpo, ectg, csst): New z9-ec instructions added.


2007-04-24  Andreas Krebbel  <krebbel1@de.ibm.com>

	* gas/s390/zarch-z9-ec.d: Add pfpo, ectg and csst.
	* gas/s390/zarch-z9-ec.s: Likewise.
 2007-04-24 14:49:47 +00:00
Nathan Sidwell
9a2e615a9f gas/testsuite/ 
* gas/m68k/br-isaa.s: New.
	* gas/m68k/br-isaa.d: New.
	* gas/m68k/br-isab.s: New.
	* gas/m68k/br-isab.d: New.
	* gas/m68k/br-isac.s: New.
	* gas/m68k/br-isac.d: New.
	* gas/m68k/all.exp: Adjust.

	gas/
	* config/tc-m68k.c (mcf54455_ctrl): New.
	(HAVE_LONG_DISP, HAVE_LONG_CALL, HAVE_LONG_COND): New.
	(m68k_archs): Add isac.
	(m68k_cpus): Add 54455 family.
	(m68k_ip): Split Bg into Bb, Bs, Bg.
	(m68k_elf_final_processing): Add ISA_C.
	* doc/c-m68k.texi (M680x0 Options): Add isac.

	include/opcode/
	* m68k.h (mcfisa_c): New.
	(mcfusp, mcf_mask): Adjust.

	bfd/
	* archures.c (bfd_mach_mcf_isa_c, bfd_mach_mcf_isa_c_mac,
	bfd_mach_mcf_isa_c_emac): New.
	* elf32-m68k.c (ISAC_PLT_ENTRY_SIZE, elf_isac_plt0_entry,
	elf_isac_plt_entry, elf_isac_plt_info): New.
	(elf32_m68k_object_p): Add ISA_C.
	(elf32_m68k_print_private_bfd_data): Print ISA_C.
	(elf32_m68k_get_plt_info): Detect ISA_C.
	* cpu-m68k.c (arch_info): Add ISAC.
	(m68k_arch_features): Likewise,
	(bfd_m68k_compatible): ISAs B & C are not compatible.

	opcodes/
	* m68k-opc.c: Mark mcfisa_c instructions.
 2007-04-23 07:51:33 +00:00
Richard Earnshaw
5f69fa6d84 * gas/arm/arch4t.d: Convert to unified syntax. 
* gas/arm/archv6.d: Likewise.
	* gas/arm/archv6t2.d: Likewise.
	* gas/arm/arch3.d: Likewise.
	* gas/arm/arch7dm.d: Likewise.
	* gas/arm/arch7t.d: Likewise.
	* gas/arm/archv1.d: Likewise.
	* gas/arm/copro.d: Likewise.
	* gas/arm/inst.d: Likewise.
	* gas/arm/macro1.d: Likewise.
	* gas/arm/tcompat.d: Likewise.
	* gas/arm/wince_inst.d: Likewise.
	* gas/arm/xscale.d: Likewise.

	* gas/arm/thumb.d: White space cleanup.
	* gas/arm/thumb2_relax.d: Likewise.
	* gas/arm/thumb32.d: Likewise.
 2007-04-21 19:45:05 +00:00
Nathan Sidwell
7833670643 gas/ 
* config/m68k-parse.h (RAMBAR_ALT): New.
	* config/tc-m68k.c (mcf5206_ctrl, mcf5307_ctrl): New.
	(mcf_ctrl, mcf5208_ctrl, mcf5210a_ctrl, mcf5213_ctrl, mcf52235_ctrl,
	mcf5225_ctrl, mcf5235_ctrl, mcf5271_ctrl, mcf5275_ctrl,
	mcf5282_ctrl, mcf5329_ctrl, mcf5373_ctrl, mcfv4e_ctrl,
	mcf5475_ctrl, mcf5485_ctrl): Add RAMBAR synonym for
	RAMBAR1.
	(mcf5272_ctrl): Add RAMBAR0, replace add RAMBAR with RAMBAR_ALT.
	(m68k_cpus): Adjust 5206, 5206e & 5307 entries.
	(m68k_ip) <Case J>: Detect when RAMBAR_ALT should be used.  Add it
	to control register mapping.

	gas/testsuite/
	* gas/m68k/ctrl-1.d, gas/m68k/ctrl-1.s: New.
	* gas/m68k/ctrl-2.d, gas/m68k/ctrl-2.s: New.
	* gas/m68k/all.exp: Add them.

	opcodes/
	* m68k-dis.c (print_insn_arg): Show c04 as rambar0 and c05 as
	rambar1.
 2007-04-20 14:09:00 +00:00
Alan Modra
c5c2803a66 * gas/ppc/range64.s: New. 
* gas/ppc/range64.l: New.
	* gas/ppc/range.s: New.
	* gas/ppc/range.l: New.
	* gas/ppc/ppc.exp (run_list_test): New.  Use to run new tests.
 2007-04-20 13:42:48 +00:00
Richard Earnshaw
90723616dd * gas/arm/mapshort.s: Add a small .data section. 
* gas/arm/mapshort-eabi.d: Check the data section doesn't confuse
	disassembly.
	* gas/arm/mapshort-elf.d: Likewise.
 2007-04-19 23:59:45 +00:00
Paul Brook
076d447c31 2007-04-19 Paul Brook <paul@codesourcery.com> 
gas/testsuite/
	* gas/arm/thumb1_unified.d: New test.
	* gas/arm/thumb1_unified.s: New test.

	gas/
	* config/tc-arm.c (md_assemble): Only allow 16-bit instructions on
	Thumb-1.  Add sanity check for bogus relaxations.
 2007-04-19 17:08:21 +00:00
Alan Modra
ec25e08f41 * gas/ppc/booke.s: Add tlbsx, tlbsxe. 
* gas/ppc/booke.d: Update.
 2007-04-18 23:58:12 +00:00
H.J. Lu
381d071fc5 gas/ 
2007-04-18  H.J. Lu <hongjiu.lu@intel.com>

	* config/tc-i386.c (cpu_arch): Add .sse4.2 and .sse4.
	(match_template): Handle operand size for crc32 in SSE4.2.
	(process_suffix): Handle operand type for crc32 in SSE4.2.
	(output_insn): Support SSE4.2.

gas/testsuite/

2007-04-18  H.J. Lu <hongjiu.lu@intel.com>

	* gas/i386/i386.exp: Add sse4.2 and x86-64-sse4.2.

	* gas/i386/sse4_2.d: New file.
	* gas/i386/sse4_2.s: Likewise.
	* gas/i386/x86-64-sse4_2.d: Likewise.
	* gas/i386/x86-64-sse4_2.s: Likewise.

opcodes/

2007-04-18  H.J. Lu <hongjiu.lu@intel.com>

	* i386-dis.c (CRC32_Fixup): New.
	(PREGRP85, PREGRP86, PREGRP87, PREGRP88, PREGRP89, PREGRP90,
	 PREGRP91): New.
	(threebyte_0x38_uses_DATA_prefix): Updated for SSE4.2.
	(threebyte_0x3a_uses_DATA_prefix): Likewise.
	(prefix_user_table): Add PREGRP85, PREGRP86, PREGRP87,
	PREGRP88, PREGRP89, PREGRP90 and PREGRP91.
	(three_byte_table): Likewise.

	* i386-opc.c (i386_optab): Add SSE4.2 opcodes.

	* gas/config/tc-i386.h (CpuSSE4_2): New.
	(CpuSSE4): Likewise.
	(CpuUnknownFlags): Add CpuSSE4_2.
 2007-04-18 16:15:55 +00:00
H.J. Lu
42903f7f59 gas/ 
2007-04-18  H.J. Lu <hongjiu.lu@intel.com>

	* config/tc-i386.c (cpu_arch): Add .sse4.1.
	(process_operands): Adjust implicit operand for blendvpd,
	blendvps and pblendvb in SSE4.1.
	(output_insn): Support SSE4.1.

gas/testsuite/

2007-04-18  H.J. Lu <hongjiu.lu@intel.com>

	* gas/i386/i386.exp: Add sse4.1 and x86-64-sse4.1.

	* gas/i386/sse4_1.d: New file.
	* gas/i386/sse4_1.s: Likewise.
	* gas/i386/x86-64-sse4_1.d: Likewise.
	* gas/i386/x86-64-sse4_1.s: Likewise.

opcodes/

2007-04-18  H.J. Lu <hongjiu.lu@intel.com>

	* i386-dis.c (XMM_Fixup): New.
	(Edqb): New.
	(Edqd): New.
	(XMM0): New.
	(dqb_mode): New.
	(dqd_mode): New.
	(PREGRP39 ... PREGRP85): New.
	(threebyte_0x38_uses_DATA_prefix): Updated for SSE4.
	(threebyte_0x3a_uses_DATA_prefix): Likewise.
	(prefix_user_table): Add PREGRP39 ... PREGRP85.
	(three_byte_table): Likewise.
	(putop): Handle 'K'.
	(intel_operand_size): Handle dqb_mode, dqd_mode):
	(OP_E): Likewise.
	(OP_G): Likewise.

	* i386-opc.c (i386_optab): Add SSE4.1 opcodes.

	* i386-opc.h (CpuSSE4_1): New.
	(CpuUnknownFlags): Add CpuSSE4_1.
	(regKludge): Update comment.
 2007-04-18 16:13:15 +00:00
Paul Brook
026d3abbb2 2007-04-18 Paul Brook <paul@codesourcery.com> 
gas/testsuite/
	* gas/arm/thumb2_add.s: Add rsb #0 test.
	* gas/arm/thumb2_add.d: Update expected output.

	gas/
	* config/tc-arm.c (do_t_rsb): Use 16-bit encoding when possible.
 2007-04-18 13:49:34 +00:00
Paul Brook
3b8d421e14 2007-04-04 Paul Brook <paul@codesourcery.com> 
gas/
	* config/tc-arm.c (do_neon_ext): Enforce immediate range.
	(insns): Use I15 for vext.

	gas/testsute/
	* gas/arm/neon-cov.s: Add new vext test.
	* gas/arm/neon-cov.d: Ditto.
 2007-04-04 19:21:24 +00:00
Christian Groessler
46a1babec9 * gas/z8k/calr.d: Fix for 64bit bfd. 
* gas/z8k/djnz.d: Likewise.
	* gas/z8k/inout.d: Likewise.
	* gas/z8k/jmp-cc.d: Likewise.
	* gas/z8k/jr-back.d: Likewise.
	* gas/z8k/jr-forw.d: Likewise.
	* gas/z8k/reglabel.d: Likewise.
	* gas/z8k/ctrl-names.d: Fix name.  Fix for 64bit bfd.
	* gas/z8k/ret-cc.d: Likewise.
 2007-03-31 22:28:06 +00:00
Alan Modra
728d1ad9b4 * gas/i386/nops-3.s: Don't use .align. 2007-03-31 03:22:38 +00:00
Paul Brook
3c707909b2 2007-03-30 Paul Brook <paul@codesourcery.com> 
gas/
	* config/tc-arm.c (encode_thumb2_ldmstm): New function.
	(do_t_ldmstm): Generate 16-bit push/pop.  Use encode_thumb2_ldmstm.
	(do_t_push_pop):  Use encode_thumb2_ldmstm.

	gas/testsuite/
	* gas/arm/thumb2_ldmstm.d: New test.
	* gas/arm/thumb2_ldmstm.s: New test.
 2007-03-30 14:51:25 +00:00
H.J. Lu
831480e942 Fix year. 2007-03-27 22:45:19 +00:00
Alan Modra
f24f8f707c New test 2007-03-27 08:34:53 +00:00
Julian Brown
30e27cd023 * gas/arm/neon-const.s: Use FP syntax for 0/-0. 
* gas/arm/vfp-neon-syntax-inc.s: Likewise, for 1.
	* gas/arm/neon-cov.s: Use float syntax for FP immediate.
 2007-03-26 14:43:08 +00:00
Paul Brook
22121af151 2007-03-24 Paul Brook <paul@codesourcery.com> 
Mark Shinwell  <shinwell@codesourcery.com>

	gas/
	* config/tc-arm.c (operand_parse_code): Add OP_oRRw.
	(parse_operands): Don't expect comma if first operand missing.
	Handle OP_oRRw.
	(do_srs): Encode register number, checking it is r13.  Update comment.
	(insns): Update SRS entries to take a register.

	gas/testsuite/
	* gas/arm/archv6.s: Add new SRS tests.
	* gas/arm/archv6.d: Update expected output.
	* gas/arm/thumb32.s: Add new SRS tests.
	* gas/arm/thumb32.d: Update expected output.
	* gas/arm/srs-t2.d: New.
	* gas/arm/srs-t2.l: New.
	* gas/arm/srs-t2.s: New.
	* gas/arm/srs-arm.d: New.
	* gas/arm/srs-arm.l: New.
	* gas/arm/srs-arm.s: New.

	opcodes/
	* arm-dis.c (arm_opcodes): Print SRS base register.
 2007-03-24 21:29:45 +00:00
Paul Brook
b67020158a 2007-03-24 Paul Brook <paul@codesourcery.com> 
Mark Shinwell  <shinwell@codesourcery.com>

	gas/
	* config/tc-arm.c (operand_parse_code): Add OP_oRRw.
	(parse_operands): Don't expect comma if first operand missing.
	Handle OP_oRRw.
	(do_srs): Encode register number, checking it is r13.  Update comment.
	(insns): Update SRS entries to take a register.

	gas/testsuite/
	* gas/arm/archv6.s: Add new SRS tests.
	* gas/arm/archv6.d: Update expected output.
	* gas/arm/thumb32.s: Add new SRS tests.
	* gas/arm/thumb32.d: Update expected output.
	* gas/arm/srs-t2.d: New.
	* gas/arm/srs-t2.l: New.
	* gas/arm/srs-t2.s: New.
	* gas/arm/srs-arm.d: New.
	* gas/arm/srs-arm.l: New.
	* gas/arm/srs-arm.s: New.

	opcodes/
	* arm-dis.c (arm_opcodes): Print SRS base register.
 2007-03-24 01:29:00 +00:00
H.J. Lu
0003779b5d gas/ 
2003-03-23  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (md_begin): Allow '.' in mnemonic.

gas/testsuite/

2003-03-23  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/rex.s: Add tests for rex.WRXB.
	* gas/i386/rex.d: Updated.

	* gas/i386/rex.d: Replace rex64XYZ with rex.WRXB.
	* gas/i386/x86-64-io-intel.d : Likewise.
	* gas/i386/x86-64-io-suffix.d: Likewise.
	* gas/i386/x86-64-io.d: Likewise.
	* gas/i386/x86-64-opcode.d: Likewise.

opcodes/

2003-03-23  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (prefix_name): Replace rex64XYZ with rex.WRXB.

	* i386-opc.c (i386_optab): Add rex.wrxb.
 2007-03-23 16:17:21 +00:00
H.J. Lu
8b38ad713b gas/ 
2003-03-21  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/4218
	* config/tc-i386.c (match_template): Properly handle 64bit mode
	"xchg %eax, %eax".

gas/testsuite/

2003-03-21  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/4218
	* gas/i386/nops.s: Add testcases for nop r/m.
	* gas/i386/x86-64-nops.s: Likewise.

	* gas/i386/x86-64-opcode.s: Add testcases for xchg with %ax,
	%eax and %rax.

	* gas/i386/nops.d: Updated.
	* gas/i386/x86-64-nops.d: Likewise.
	* gas/i386/x86-64-opcode.d: Likewise.

opcodes/

2003-03-21  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/4218
	* i386-dis.c (PREGRP38): New.
	(dis386): Use PREGRP38 for 0x90.
	(prefix_user_table): Add PREGRP38.
	(print_insn): Set uses_REPZ_prefix to 1 for pause.
	(NOP_Fixup1): Properly handle REX bits.
	(NOP_Fixup2): Likewise.

	* i386-opc.c (i386_optab): Allow %eax with xchg in 64bit.
	Allow register with nop.
 2007-03-21 20:45:14 +00:00
H.J. Lu
c0f91ba6d9 2003-03-21 H.J. Lu <hongjiu.lu@intel.com> 
* gas/i386/i386.exp: Run nops-3.

	* gas/i386/nops-3.d: New file.
	* gas/i386/nops-3.s: Likewise.
 2007-03-21 19:33:06 +00:00
Mark Shinwell
cb2eed6375 gas/testsuite/ 
* gas/arm/mul-overlap.s: Don't use %type.
	* gas/arm/mul-overlap.l: Update line numbers.
	* gas/arm/mul-overlap-v6.s: Don't use %type.
 2007-03-20 13:01:47 +00:00
Mark Shinwell
8fb9d7b9aa gas/ 
* config/tc-arm.c (do_mul): Don't warn about overlapping
	Rd and Rm operands when assembling for v6 or above.
	Correctly capitalize register names in the messages.
	(do_mlas): Likewise.  Delete spurious blank line.

	gas/testsuite/
	* gas/arm/mul-overlap.s: New.
	* gas/arm/mul-overlap.d: New.
	* gas/arm/mul-overlap.l: New.
	* gas/arm/mul-overlap-v6.s: New.
	* gas/arm/mul-overlap-v6.d: New.
 2007-03-18 16:21:27 +00:00
Daniel Jacobowitz
794ba86ab2 gas/ 
* config/tc-arm.c (arm_copy_symbol_attributes): New.
	* config/tc-arm.h (arm_copy_symbol_attributes): Declare.
	(TC_COPY_SYMBOL_ATTRIBUTES): Define.
	* gas/symbols.c (copy_symbol_attributes): Use
	TC_COPY_SYMBOL_ATTRIBUTES.

	gas/testsuite/
	* gas/arm/thumbver.d, gas/arm/thumbver.s: New test.
 2007-03-15 12:11:50 +00:00
Paul Brook
155257ea59 2007-03-14 Paul Brook <paul@codesourcery.com> 
gas/
	* config/tc-arm.c (T16_32_TAB): Fix dec_sp encoding.

	gas/testsuite/
	* gas/arm/thumb2_add.d: Add tests using sp.
	* gas/arm/thumb2_add.s: Ditto.
 2007-03-14 21:12:13 +00:00
H.J. Lu
5e9ed83f75 * gas/all/gas.exp: Run relax. 2007-03-14 13:39:54 +00:00
Alan Modra
cd0c2fe2c3 PR 4029 
* gas/all/relax.s: New.
	* gas/all/relax.d: New.
	* gas/all/gas.exp: Run it.
 2007-03-14 11:04:12 +00:00
Hans-Peter Nilsson
3894944c55 * gas/mmix/comment-1.d, gas/mmix/bspec-1.d, gas/mmix/bspec-2.d: 
Adjust for change in readelf output.
 2007-03-11 11:22:52 +00:00
Martin Schwidefsky
b5639b37c5 2007-03-06 Andreas Krebbel <krebbel1@de.ibm.com> 
* opcodes/s390-opc.c (INSTR_RRE_FR, INSTR_RRF_F0FF2, INSTR_RRF_F0FR,
	INSTR_RRF_UUFF, INSTR_RRF_0UFF, INSTR_RRF_FFFU,	INSTR_RRR_F0FF): New
	instruction formats added.
	(MASK_RRE_FR, MASK_RRF_F0FF2, MASK_RRF_F0FR, MASK_RRF_UUFF,
	MASK_RRF_0UFF, MASK_RRF_FFFU, MASK_RRR_F0FF): New instruction format
	masks added.
	* opcodes/s390-opc.txt (lpdfr - tgxt): Decimal floating point
	instructions added.
	* opcodes/s390-mkopc.c (s390_opcode_cpu_val): S390_OPCODE_Z9_EC added.
	(main): z9-ec cpu type option added.
	* include/opcode/s390.h (s390_opcode_cpu_val): S390_OPCODE_Z9_EC added.

2007-03-06  Andreas Krebbel  <krebbel1@de.ibm.com>

	* config/tc-s390.c (md_parse_option): z9-ec option added.

2007-03-06  Andreas Krebbel  <krebbel1@de.ibm.com>

	* gas/s390/zarch-z9-ec.d: New file.
	* gas/s390/zarch-z9-ec.s: New file.
	* gas/s390/s390.exp: Run the z9-ec testcases.
 2007-03-06 13:19:08 +00:00
H.J. Lu
412cc54eb9 2007-03-05 H.J. Lu <hongjiu.lu@intel.com> 
PR gas/3918
	* lib/gas-defs.exp (gas_started): New variable. Initialized to
	0.
	(gas_start): Set gas_started to 1.
	(gas_finish): Skip if gas_started is 0.  Reset gas_started to 0.
 2007-03-06 02:08:25 +00:00
Paul Brook
bddb0493ac 2007-03-02 Paul Brook <paul@codesourcery.com> 
gas/
	* config/tc-arm.c (relax_immediate): Always return positive values.
	(relaxed_symbol_addr): New function.
	(relax_adr, relax_branch): Use it.
	(arm_relax_frag): Pass strect argument.  Adjust infinite loop check.

	gas/testsuite/
	* gas/arm/relax_branch_align.d: New test.
	* gas/arm/relax_branch_align.s: New test.
 2007-03-02 18:22:59 +00:00
Paul Brook
5e77afaabd 2007-03-02 Paul Brook <paul@codesourcery.com> 
gas/
	* config/tc-arm.c (relax_immediate): Always return positive values.
	(relaxed_symbol_addr): New function.
	(relax_adr, relax_branch): Use it.
	(arm_relax_frag): Pass stretch argument.  Adjust infinite loop check.

	gas/testsuite/
	* gas/arm/relax_branch_align.d: New test.
	* gas/arm/relax_branch_align.s: New test.
 2007-03-02 18:22:34 +00:00
Nick Clifton
c5d07591f7 PR gas/3797 
* config/tc-d10v.c (do_assemble): Do not generate error messages, just return -1 whenever a problem is encoun$
 (md_assemble): If do_assemble returns -1 generate a non-fatal error message and return.
* gas/lns/lns.exp: Do not run the lns-common test for the d10v port.
* gas/d10v/address-002.l: Update expected assembler output.
* gas/d10v/address-003.l, gas/d10v/address-004.l,
  gas/d10v/address-005.l, gas/d10v/address-006.l,
  gas/d10v/address-007.l, gas/d10v/address-008.l,
  gas/d10v/address-009.l, gas/d10v/address-010.l,
  gas/d10v/address-011.l, gas/d10v/address-012.l,
  gas/d10v/address-013.l, gas/d10v/address-014.l,
  gas/d10v/address-015.l, gas/d10v/address-016.l,
  gas/d10v/address-017.l, gas/d10v/address-018.l,
  gas/d10v/address-019.l, gas/d10v/address-020.l,
  gas/d10v/address-021.l, gas/d10v/address-022.l,
  gas/d10v/address-023.l, gas/d10v/address-024.l,
  gas/d10v/address-025.l, gas/d10v/address-026.l,
  gas/d10v/address-027.l, gas/d10v/address-030.l,
  gas/d10v/address-031.l, gas/d10v/address-032.l,
  gas/d10v/address-033.l, gas/d10v/address-034.l,
  gas/d10v/address-035.l, gas/d10v/address-036.l,
  gas/d10v/address-037.l, gas/d10v/address-038.l,
  gas/d10v/address-039.l, gas/d10v/address-040.l,
  gas/d10v/address-041.l: Likewise.
 2007-02-28 18:38:51 +00:00
Nick Clifton
aa32346d62 PR 3729: Fix unexpected failures in ARM GAS testsuite results. 2007-02-28 14:39:16 +00:00
DJ Delorie
b2e818b70d * s390-opc.c (INSTR_SS_L2RDRD): New. 
(MASK_SS_L2RDRD): New.
* s390-opc.txt (pka): Use it.

* gas/s390/esa-g5.s: Adjust for corrected PKA syntax.
* gas/s390/esa-g5.d: Adjust for corrected PKA syntax.
 2007-02-22 21:01:59 +00:00
Thiemo Seufer
8b082fb134 [ gas/ChangeLog ] 
* config/tc-mips.c (mips_set_options, mips_opts, file_ase_dspr2,
	ISA_SUPPORTS_DSPR2_ASE, MIPS_CPU_ASE_DSPR2): Add DSP R2 ASE support.
	(macro_build): Add case '2'.
	(macro): Expand M_BALIGN to nop, packrl.ph or balign.
	(validate_mips_insn): Add support for balign instruction.
	(mips_ip): Handle DSP R2 instructions. Support balign instruction.
	(OPTION_DSPR2, OPTION_NO_DSPR2, OPTION_COMPAT_ARCH_BASE,
	md_parse_option, mips_after_parse_args): Add -mdspr2 and -mno-dspr2
	command line options.
	(s_mipsset): Add support for .set dspr2 and .set nodspr2 directives.
	(md_show_usage): Add -mdspr2 and -mno-dspr2 help output.
	* doc/c-mips.texi, doc/as.texinfo: Document -mdspr2, -mno-dspr2,
	.set dspr2, .set nodspr2.

	[ gas/testsuite/ChangeLog ]
	* gas/mips/mips32-dspr2.s, gas/mips/mips32-dspr2.d: New test for
	DSP R2.
	* gas/mips/mips.exp: Run new test.

	[ include/opcode/Changelog ]
	* mips.h (OP_SH_BP, OP_MASK_BP): Add support for balign instruction.
	(INSN_DSPR2): Add flag for DSP R2 instructions.
	(M_BALIGN): New macro.

	[ opcodes/ChangeLog ]
	* mips-dis.c (mips_arch_choices): Add DSP R2 support.
	(print_insn_args): Add support for balign instruction.
	* mips-opc.c (D33): New shortcut for DSP R2 instructions.
	(mips_builtin_opcodes): Add DSP R2 instructions.

	[ sim/mips/ChangeLog ]
	* Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
	* configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
	Add dsp2 to sim_igen_machine.
	* configure: Regenerate.
	* dsp.igen (do_ph_op): Add MUL support when op = 2.
	(do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
	(mulq_rs.ph): Use do_ph_mulq.
	(MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
	* mips.igen: Add dsp2 model and include dsp2.igen.
	(MFHI, MFLO, MTHI, MTLO): Extend these instructions for
	for *mips32r2, *mips64r2, *dsp.
	(MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
	for *mips32r2, *mips64r2, *dsp2.
	* dsp2.igen: New file for MIPS DSP REV 2 ASE.

	[ sim/testsuite/sim/mips/ChangeLog ]
	* basic.exp: Run the dsp2 test.
	* utils-dsp.inc (dspckacc_astio, dspck_tsimm): New macro.
	* mips32-dsp2.s: New test.
 2007-02-20 13:28:56 +00:00
Martin Schwidefsky
929e4d1a15 2007-02-19 Andreas Krebbel <krebbel1@de.ibm.com> 
* s390-opc.c (INSTR_RRF_U0FR, MASK_RRF_U0FR): Removed.
	(INSTR_RRF_U0RF, MASK_RRF_U0RF): Added.
	* s390-opc.txt (cfxbr, cfdbr, cfebr, cgebr, cgdbr, cgxbr, cger, cgdr,
	cgxr, cfxr, cfdr, cfer): Instruction type set to INSTR_RRF_U0RF.

2007-02-19  Andreas Krebbel  <krebbel1@de.ibm.com>

        * gas/s390/esa-g5.d (cfxbr, cfebr, cfdbr): Exchanged floating
	point and fixed point operands.
	* gas/s390/esa-g5.s: Likewise.
	* gas/s390/zarch-z900.d (cfdr, cfer, cfxr, cgdbr, cgebr, cgxbr,
	cgdr, cger, cgxr): Likewise.
	* gas/s390/zarch-z900.s: Likewise.
 2007-02-19 17:46:11 +00:00
H.J. Lu
fda592e836 gas/testsuite/ 
2007-02-11  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/4027
	* gas/i386/opcode.s: Add more tests for "test".
	* i386/opcode-intel.d: Updated.
	* gas/i386/opcode-suffix.d: Likewise.
	* gas/i386/opcode.d: Likewise.

include/opcode/

2007-02-11  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/4027
	* i386.h (i386_optab): Put the real "test" before the pseudo
	one.
 2007-02-12 04:51:40 +00:00
Nick Clifton
7b5030c061 PR gas/3810 gas/3800 
* gas/elf/elf.exp: Expect the redef test to fail on targets which do not
  convert fixups against ordinary symbols into relocs against section symbols.
* gas/all/gas.exp: Likewise.
 2007-02-06 15:13:26 +00:00
Dave Brolley
280d71bf40 Support for Toshiba MeP and for complex relocations. 2007-02-05 20:10:25 +00:00
H.J. Lu
9e5a05682c Fix year. 2007-02-05 19:49:22 +00:00
H.J. Lu
81d8aae182 2076-02-04 H.J. Lu <hongjiu.lu@intel.com> 
PR gas/3961
	* gas/i386/secrel.d: Support 64bit host.
 2007-02-05 02:36:47 +00:00