Commit Graph

16954 Commits

Author SHA1 Message Date
Jeff Law
a0a36aa085 * dis-asm.h (print_insn_v850): Declare. 1996-08-31 19:26:47 +00:00
Jeff Law
529418ddc4 * v850-dis.c: New file. Skeleton for disassembler support.
* Makefile.in Remove v850 references, they're not needed here
        and they weren't being sanitized away.
        * configure.in: Add v850-dis.o when building v850 toolchains.
        * configure: Rebuilt.
        * disassemble.c (disassembler): Call v850 disassembler.
1996-08-31 19:22:11 +00:00
Jeff Law
ba39d3dde1 * v850-dis.c: New file. Skeleton for disassembler support.
* Makefile.in Remove v850 references, they're not needed here
        and they weren't being sanitized away.
        * configure.in: Add v850-dis.o when building v850 toolchains.
        * configure: Rebuilt.
        * disassemble.c (disassembler): Call v850 disassembler.
Skeleton support for V850 disassembler.
1996-08-31 19:20:28 +00:00
Jeff Law
2d56269edf * config/tc-v850.c (md_apply_fix3): Do simple byte, short and
word fixups too.
Fixes "difference between forward references".
1996-08-31 18:36:19 +00:00
Jeff Law
b219416478 * v850-opc.c (insert_d8_7, extract_d8_7): New functions.
(insert_d8_6, extract_d8_6): New functions.
        (v850_operands): Rename D7S to D7; operand for D7 is unsigned.
        Rename D8 to D8_7, use {insert,extract}_d8_7 routines.
        Add D8_6.
        (IF4A, IF4B): Use "D7" instead of "D7S".
        (IF4C, IF4D): Use "D8_7" instead of "D8".
        (IF4E, IF4F): New.  Use "D8_6".
        (v850_opcodes): Use IF4A/IF4B for sld.b/sst.b.  Use IF4C/IF4D for
        sld.h/sst.h.  Use IF4E/IF4F for sld.w/sst.w.
So we can assemble sst/sld instructions correctly.
1996-08-31 18:23:02 +00:00
Jeff Law
c6b9c13532 * v850-opc.c (insert_d16_15, extract_d16_15): New functions.
(v850_operands): Change D16 to D16_15, use special insert/extract
        routines.  New new D16 that uses the generic insert/extract code.
        (IF7A, IF7B): Use D16_15.
        (IF7C, IF7D): New.  Use D16.
        (v850_opcodes): Use IF7C and IF7D for ld.b and st.b.
1996-08-31 17:43:28 +00:00
Jeff Law
fb8c25a3e4 * v850-opc.c (insert_d9, insert_d22): Slightly improve error
message.  Issue an error if the branch offset is odd.
1996-08-31 17:23:49 +00:00
Jeff Law
237b5c4c9a * elf32-v850.c (enum reloc_type): Add R_V850_{32,16,8}.
(elf_v850_howto_table): Add support for R_V850_{32,16,8}.
        (v850_reloc_map): Add translation from BFD_RELOC_{32,16,8}
        to R_V850_{32,16,8}.
So we don't get "reloc XXX not supported" messages anymore.
1996-08-31 16:24:18 +00:00
Jeff Law
69ae4b82dc * v850-opc.c: Add notes about needing special insert/extract
for all the load/store insns, except "ld.b" and "st.b".
So we don't forget!
1996-08-31 07:32:01 +00:00
Jeff Law
574b9cb3d3 * v850-opc.c (insert_d22, extract_d22): New functions.
(v850_operands): Use insert_d22 and extract_d22 for
        D22 operands.
        (insert_d9): Fix range check.
1996-08-31 07:28:22 +00:00
Jeff Law
6cff464b3a * gas/v850/basic.exp (do_branch): Check offsets in branch insns.
(do_jumps): Likewise.
Now that we can resolve known branch targets.
1996-08-31 07:26:35 +00:00
Jeff Law
74dd0c0786 * config/tc-v850.c (md_apply_fix3): Use little endian get/put
routines to fetch/store the updated instruction from/to memory.
        (v850_insert_operand): If the operand has a specialized insert
        routine, call it.
Getting fixups closer.  At least br <target> works now.
1996-08-31 05:52:38 +00:00
Jeff Law
7ab4a84a3a * emulparms/v850.sh: Entry symbol is "_start", tweak
ctor/dtor support.
1996-08-31 04:31:18 +00:00
Jeff Law
82feb39ed1 Opps. Forgot to commit this a few days ago. 1996-08-31 02:49:05 +00:00
J.T. Conklin
c84615bc23 * config/tc-v850.c (reg_name_search): Align calling convention to
be like identical function found in tc-ppc.c.
(get_reloc): Removed.
(v850_reloc_prefix): New function, parse lo(), hi() and hi0().
(md_assemble): emit fixups.
(md_pcrel_from): renamed from md_pcrel_from_section, emit proper
displacement.
(md_apply_fix3): handle fixups/relocs.
* config/tc-v850.h (MD_PCREL_FROM_SECTION): Removed definition.
1996-08-31 01:42:46 +00:00
J.T. Conklin
01b49cb35b * elf32-v850.c (reloc_type): Add R_V850_HI16_S.
(elf_v850_howto_table): Add info for HI16_S reloc.
(v850_reloc_map): Add HI_16_S reloc.
* reloc.c: Define BFD_RELOC_V850_* relocs.
1996-08-31 01:32:13 +00:00
J.T. Conklin
d44b697b78 * v850-opc.c (v850_operands): Add V850_OPERAND_SIGNED flag
and set bits field to D9 and D22 operands.
1996-08-31 01:04:39 +00:00
Ian Lance Taylor
efd48a6a97 * configure.tgt (sh-*-elf*): New target.
* emulparams/shelf.sh: New file.
	* emulparams/shlelf.sh: New file.
	* Makefile.in (ALL_EMULATIONS): Add eshelf.o and eshlelf.o.
	(eshelf.c, eshlelf.c): New targets.
	* scripttempl/elf.sc: If EMBEDDED is defined, then don't add
	SIZEOF_HEADERS to TEXT_START_ADDR.  Expand CTOR_START and CTOR_END
	around .ctors, and DTOR_START and DTOR_END around .dtors.  Expand
	OTHER_RELOCATING_SECTIONS if RELOCATING.
1996-08-30 22:36:45 +00:00
Ian Lance Taylor
0f616818c0 Add SH ELF support.
* configure.in (sh-*-elf*): New target.
	* config/tc-sh.h (TARGET_ARCH): Define.
	(WORKING_DOT_WORD): Define.
 	(TC_COFF_FIX2RTYPE): Only define if OBJ_COFF.
	(BFD_ARCH, COFF_MAGIC, TC_COUNT_RELOC): Likewise.
	(TC_RELOC_MANGLE, tc_coff_symbol_emit_hook): Likewise.
	(DO_NOT_STRIP, NEED_FX_R_TYPE, TC_KEEP_FX_OFFSET): Likewise.
	(TC_COFF_SIZEMACHDEP, tc_frob_file): Likewise.
	(SUB_SEGMENT_ALIGN): Likewise.
	(RELOC_32): Don't define.
	(tc_frob_file_before_adjust): Define if BFD_ASSEMBLER.
	(target_big_endian): Declare if OBJ_ELF.
	(TARGET_FORMAT): Define if OBJ_ELF.
	* config/tc-sh.c: Use BFD reloc codes instead of SH COFF reloc
	numbers throughout.
	(tc_crawl_symbol_chain): Only define if OBJ_COFF.
	(tc_headers_hook, tc_coff_sizemachdep): Likewise.
	(struct sh_count_relocs): Define.
	(sh_count_relocs): New static function, broken out of
	sh_frob_file.  Add BFD_ASSEMBLER code.
	(sh_frob_section): Likewise.
	(sh_frob_file): Call sh_frob_section.
	(md_convert_frag): If BFD_ASSEMBLER, change type of headers, and
	call section_symbol rather than seg_info (seg)->dot.
	(md_section_align): Add OBJ_ELF version.
	(SWITCH_TABLE_CONS): Define.
	(SWITCH_TABLE): Use SWITCH_TABLE_CONS.
	(md_apply_fix): Change parameter types if BFD_ASSEMBLER.  Only
	handle fx_r_type == 0 if not BFD_ASSEMBLER.  Return 0 if
	BFD_ASSEMBLER.
	(struct reloc_map): Define if not BFD_ASSEMBLER.
	(coff_reloc_map): Likewise.
	(sh_coff_reloc_mangle): Use coff_reloc_map to convert fx_r_type.
	(tc_gen_reloc): New function if BFD_ASSEMBLER.
	* write.c (write_relocs): Ifdef out fx_where test which triggers
	inappropriately for SH ELF.
	(write_object_file): Call tc_frob_file_before_adjust and
	obj_frob_file_before_adjust if they are defined.

	* write.c (write_object_file): Use BFD_RELOC_16, not
	BFD_RELOC_NONE, when calling fix_new_exp for a broken word.
1996-08-30 22:29:42 +00:00
Ian Lance Taylor
c86158e591 Add SH ELF support.
* elf32-sh.c: New file.
	* elf.c (prep_headers): Handle bfd_arch_sh.
	* elfcode.h (write_relocs): Handle absolute symbol.
	* elf-bfd.h (_bfd_elf32_link_read_relocs): Declare.
	(_bfd_elf64_link_read_relocs): Declare.
	* elflink.h (NAME(_bfd_elf,link_read_relocs)): Rename from
	elf_link_read_relocs.  Make globally visible.  Change all
	callers.
	(elf_link_input_bfd): Get external symbols from cache in
	symtab_hdr->contents.  Get contents from cache in
	elf_section_data.
	* elfxx-target.h (bfD_elfNN_bfd_relax_section): Only define if not
	already defined.
	* reloc.c: Define BFD_RELOC_SH_* relocs.
	* libbfd-in.h (_bfd_sh_align_load_span): Declare.
	* coff-sh.c (sh_insns_conflict): Fix a return value.
	(_bfd_sh_align_load_span): New globally visible function, broken
	out of sh_align_load.
	(sh_align_load): Call _bfd_sh_align_load_span.
	(sh_swap_insns): Change relocs parameter to PTR.
	* bfd-in2.h, libbfd.h: Rebuild.
	* targets.c (bfd_elf32_sh_vec): Declare.
	(bfd_elf32_shl_vec): Declare.
	* config.bfd (sh-*-elf*): New target.
	* configure.in (bfd_elf32_sh_vec): New target vector.
	(bfd_elf32_shl_vec): New target vector.
	* configure: Rebuild.
	* Makefile.in: Rebuild dependencies.
 	(BFD32_BACKENDS): Add elf32-sh.o.
	(BFD32_BACKENDS_CFILES): Add elf32-sh.c.

	* elf.c (map_sections_to_segments): Check that LMA does not skip a
	page before checking D_PAGED.
1996-08-30 22:09:51 +00:00
Jeff Law
787d66bb4d * simops.c: Fix "not1" and "set1". 1996-08-30 21:55:26 +00:00
Martin Hunt
20dbcd5c31 Fri Aug 30 14:47:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
* config/tc-d10v.c (find_opcode): Fix problem with calculating
	branch sizes in across sections.
1996-08-30 21:50:52 +00:00
Jeff Law
3046d87986 * simops.c: Don't forget to initialize temp for
"ld.h" and "ld.w"
1996-08-30 20:15:51 +00:00
Jeff Law
1a393e50be * gas/v850/misc.s: Tweak register numbers for better testing.
* gas/v850/basic.exp (misc_tests): Corresponding changes.
1996-08-30 19:59:06 +00:00
Jeff Law
e9ebb36451 * v850-opc.c (v850_operands): Define SR2 operand.
(v850_opcodes): "ldsr" uses R1,SR2.
ldsr is kinda weird.
1996-08-30 19:44:42 +00:00
Jeff Law
ba853302f2 * interp.c: Remove various debugging printfs. 1996-08-30 16:42:49 +00:00
Jeff Law
0e4ccc58f2 * simops.c: Fix satadd, satsub boundary case handling. 1996-08-30 16:41:39 +00:00
Jeff Law
83fc3bac9f * interp.c (hash): Fix.
* interp.c (do_format_8): Get operands correctly and
        call the target function.
        * simops.c: Rough cut at "clr1", "not1", "set1", and "tst1".
1996-08-30 16:35:10 +00:00
Ian Lance Taylor
76a61985c1 * gmon.h: Replace #elif with #else/#endif. 1996-08-30 16:19:15 +00:00
Ian Lance Taylor
492cfc71b8 * ihex.c (ihex_scan): Removed unnecessary extbase variable.
(ihex_write_object_contents): Remove extbase; always use segbase
	instead.
1996-08-30 15:52:40 +00:00
Jackie Smith Cashion
5132850605 Fri Aug 30 15:07:14 1996 James G. Smith <jsmith@cygnus.co.uk>
* remote-mips.c: Provide support for CAIRO target board.
	(cairo_open, cairo_ops): Added.
	(mips_monitor_type): MON_CAIRO Added.
	(mips_enter_debug, mips_exit_debug, mips_initialize,
 	mips_fetch_registers, common_breakpoint, mips_load,
 	_initialize_remote_mips): Updated.

Add simple support for NEC CAIRO Vr4300 development board.
1996-08-30 14:15:27 +00:00
Jeff Law
05631de266 * config/tc-850.c (md_assemble): Handle hi() correctly. Handle
hi0() too.
Bugfix.
1996-08-30 06:44:44 +00:00
Jeff Law
1f17971dee * gas/v850/hilo.s: New testfile.
* gas/v850/basic.exp: Run hilo tests.
1996-08-30 06:40:44 +00:00
Jeff Law
3cb6bf7818 * interp.c (do_format_4): Get operands correctly and
call the target function.
        * simops.c: Rough cut at "sld.b", "sld.h", "sld.w", "sst.b",
        "sst.h", and "sst.w".
1996-08-30 05:49:07 +00:00
Jeff Law
28647e4c0c * v850_sim.h: The V850 doesn't have split I&D spaces. Change
accordingly.  Remove many unused definitions.
        * interp.c: The V850 doesn't have split I&D spaces.  Change
        accordingly.
        (get_longlong, get_longword, get_word): Deleted.
        (write_longlong, write_longword, write_word): Deleted.
        (get_operands): Deleted.
        (get_byte, get_half, get_word): New functions.
        (put_byte, put_half, put_word): New functions.
        * simops.c: Remove unused functions.  Rough cut at
        "ld.b", "ld.h", "ld.w", "st.b", "st.h", "st.w" insns.
1996-08-30 05:41:10 +00:00
Jeff Law
614f1c68ed * v850_sim.h (struct _state): Remove "psw" field. Add
"sregs" field.
        (PSW): Remove bogus definition.
        * simops.c: Change condition code handling to use the psw
        register within the sregs array.  Handle "ldsr" and "stsr".
1996-08-30 05:09:08 +00:00
Jeff Law
dca41ba76b * simops.c: Handle "satadd", "satsub", "satsubi", "satsubr". 1996-08-30 04:59:02 +00:00
Jeff Law
e9b6cbaca5 * interp.c (do_format_5): Get operands correctly and
call the target function.
        (sim_resume): Don't do a PC update for format 5 instructions.
        * simops.c: Handle "jarl" and "jmp" instructions.
1996-08-30 04:27:48 +00:00
Jeff Law
3095b8dfc5 * simops.c: Fix minor typos. Handle "cmp", "setf", "tst"
"di", and "ei" instructions correctly.
1996-08-30 04:11:32 +00:00
Jeff Law
2108e86459 * interp.c (do_format_3): Get operands correctly and call
the target function.
        * simops.c: Handle bCC instructions.
1996-08-30 03:48:13 +00:00
Jeff Law
35404c7d07 * simops.c: Add condition code handling to shift insns.
Fix minor typos in condition code handling for other insns.
1996-08-30 03:23:36 +00:00
Jeff Law
aabce0f46c * Makefile.in: Fix typo.
* simops.c: Add condition code handling to "sub" "subr" and
        "divh" instructions.
1996-08-30 03:07:24 +00:00
Jeff Law
0ef0eba580 * interp.c (hash): Update to be more accurate.
(lookup_hash): Call hash rather than computing the hash
        code here.
        (do_format_1_2): Handle format 1 and format 2 instructions.
        Get operands correctly and call the target function.
        (do_format_6): Get operands correctly and call the target
        function.
        (do_formats_9_10): Rough cut so shift ops will work.
        (sim_resume): Tweak to deal with format 1 and format 2
        handling in a single funtion.  Don't update the PC
        for format 3 insns.  Fix typos.
        * simops.c: Slightly reorganize.  Add condition code handling
        to "add", "addi", "and", "andi", "or", "ori", "xor", "xori"
        and "not" instructions.
        * v850_sim.h (reg_t): Registers are 32bits.
        (_state): The V850 has 32 general registers.  Add a 32bit
        psw and pc register too.  Add accessor macros
Fixing lots of stuff.  Starting to add condition code support.  Basically
check pointing the work to date.
1996-08-29 23:39:23 +00:00
Michael Meissner
7fa565a6d3 Recognize i586-dg-dgux and use generic System V config file to nop ranlib 1996-08-29 22:45:33 +00:00
Jeff Law
775533747d * simops.c: Add shift support. 1996-08-29 22:29:41 +00:00
Jeff Law
fb8eb42bd6 Fix typos in multiply and divide code. 1996-08-29 22:05:15 +00:00
Michael Meissner
ba5f27cd57 gdbserver/configure does not exist 1996-08-29 21:43:31 +00:00
Geoffrey Noer
22dd55c2d6 sanitize change 1996-08-29 21:42:15 +00:00
Michael Meissner
26c543ea67 Recognize i686 as pentium pro 1996-08-29 21:42:11 +00:00
Michael Meissner
3d5aa9924a Recognize i686-*-* for pentium pro 1996-08-29 21:28:01 +00:00