base-plus-offset relocs to the linker.
* config/tc-mmix.c: Tweak and fix typos in comments.
(allocate_undefined_gregs_in_linker): New variable.
(OPTION_LINKER_ALLOCATED_GREGS): New option macro.
(md_longopts): Add --linker-allocated-gregs.
(md_parse_option) <case 'x'>: Imply --linker-allocated-gregs.
<case OPTION_LINKER_ALLOCATED_GREGS>: New.
(md_show_usage): Update text for -x. Add text for
--linker-allocated-gregs.
(tc_gen_reloc): Derive default value for addend from val and
baddsy. Use addsec and bfd_is_abs_section in more places. Don't
emit error for BFD_RELOC_MMIX_BASE_PLUS_OFFSET without suitable
GREG if allocate_undefined_gregs_in_linker.
* doc/as.texinfo (Overview) <Target MMIX options>: Add
--linker-allocated-gregs.
* doc/c-mmix.texi (MMIX-Opts): Add blurb about
--linker-allocated-gregs. Mention that it's implied by -x.
(MMIX-Pseudos) <GREG>: Mention when and how a GREG can be omitted.
(MMIX-mmixal): Clarify dated comparison and location of MMIXware.
* config/tc-mmix.h (md_parse_name): Use ISUPPER, not isupper.
From Steve Ellcey <sje@cup.hp.com>:
* libtool.m4 (HPUX_IA64_MODE): Set to 32 or 64 based on ABI.
(lt_cv_deplibs_check_method, lt_cv_file_magic_cmd,
lt_cv_file_magic_test_file): Set to appropriate values for HP-UX
IA64.
* ltcf-c.sh (archive_cmds, hardcode_*): Ditto.
* ltconfig (shlibpath_*, dynamic_linker, library_names_spec,
soname_spec, sys_lib_search_path_spec): Ditto.
Various configure scripts regenerated.
do_mia, do_mar and do_mra respectively.
(do_mav_*): Renamed from do_c_*.
(mav_reg_required_here, mav_parse_offset): Renamed from
cirrus_reg_required_here and cirrus_parse_offset respectively.
(MAV_MODE?): Renamed from CIRRUS_MODE?.
* config/tc-arm.c (ARM_CEXT_XSCALE): Replaces ARM_EXT_XSCALE. All
uses changed.
(ARM_CEXT_MAVERICK): Similarly.
(ARM_ANY): Now means any core instruction.
(CPU_DEFAULT): Default to ARM_ANY.
(uses_apcs_26, atcps, support_interwork, uses_apcs_float)
(pic_code): Declare for all object types. Make type int.
(legacy_cpu, legacy_fpu, mcpu_cpu_opt, mcpu_fpu_opt, march_cpu_opt)
(march_fpu_opt, mfpu_opt): Declare.
(md_longopts): Tidy up conditional definitions.
(arm_opts, arm_cpus, arm_archs, arm_fpus, arm_extensions)
(arm_long_opts): New tables.
(arm_parse_cpu, arm_parse_arch, arm_parse_fpu): New functions.
(arm_parse_extension): New function.
(md_parse_option): Rewrite using new table-driven system.
(md_show_usage): Use new table-driven system.
(md_begin): Calculate cpu_variant from command line option data.
* doc/as.texinfo (ARM ISA options): Docuement new ARM-specific
command-line options.
* doc/c-arm.texi: Likewise.
Testsuite:
* gas/arm/vfp1.d: Use new command-line options.
* gas/arm/vfp1xD.d: Likewise.
* gas/arm/arm.exp (vfp-bad): Likewise.
* gas/arm/maverick.d: Likewise.
matched before the shorter ones.
(my_getSmallParser): Fix handling of nested parentheses in
percent_op's. Code cleanup.
(my_getPercentOp): New function, code from my_getSmallParser.
(my_getSmallExpression): Fix handling of closing parentheses.
Code cleanup. Better comments.
arm/fpa-monadic.s, arm/fpa-monadic.d, arm/fpa-dyadic.s,
arm/fpa-dyadic.d: New tests.
* gas/arm/le-fpconst.d (objdump): pass --section=.text
* gas/arm/arm.exp: Add new tests. Run le-fpconst test on elf targets.
* tc-arm.h (md_operand): Delete define.
* tc-arm.c (in_my_get_expression): New static variable.
(my_get_expression): Set and clear it.
(md_operand): New function. If called from my_get_expression
put the error in inst.error.
(output_inst): Now takes argument of instruction being assembled.
Print it out with any error message.
(do_ldst, do_ldstv4, thumb_load_store): Fault attempt to use a store
with '=' syntax.
(end_of_line): Don't update inst.error if it is already set.
op that can be translated into a mvn instruction.
* gas/arm/ldconst.s gas/arm/ldconst.d: New files. Test ldr with
immediate pseudo-operations.
* gas/arm/arm.exp: Run it.
(int_register, cp_register, fp_register): Delete.
(reg_table): Delete. Replaced with ...
(rn_table, cp_table, cn_table, fn_table, mav_mvf_table)
(mav_mvd_table, mav_mvfx_table, mav_mvdx_table, mav_mvax_table)
(mav_dspsc_table): ... one table per register set.
(arm_reg_hsh): Delete.
(struct reg_map): New structure.
(all_reg_maps): New array.
(enum arm_reg_type): New enums.
(build_reg_hsh): New function.
(insert_reg_alias): Use hash table passed by caller. Adjust all
callers.
(create_register_alias): New function, split out from ...
(md_assemble): ... here.
(md_begin): Build new register hash tables.
(arm_reg_parse): New argument for the hash table to search. Adjust all
callers.
(arm_reg_parse_any): New function.
(co_proc_number): Look up the processor number in the processor hash
table.
(cirrus_regtype): Delete.
(cirrus_register, cirrus_mvf_register, cirrus_mvd_register)
(cirrus_mvfx_register, cirrus_mvdx_register, cirrus_mvax_register)
(ARM_EXT_MAVERICKsc_register): Delete.
(do_c_binops_1, do_c_binops_2, do_c_binops_3): Delete.
(do_c_binops_1[a-o], do_c_binops_2[a-c], do_c_binops_3[a-d]): New
functions.
(do_c_triple_4, do_c_triple_5): Delete.
(do_c_triple_4[ab], do_c_triple_5[a-h]): New functions.
(do_c_quad_6): Delete.
(do_c_quad_6[ab]): New functions.
(do_c_binops, do_c_triple, do_c_quad, do_c_shift, do_c_ldst): Rework
arguments to use new register parsing methods.
(cirrus_reg_required_here): Likewise.
(insns): Reclassify cirrus maverick worker functions.
(cirrus_valid_reg): Delete.
