One part of PR cli/19551 is that the mini debug info objfile reuses the
name of the main objfile from which it comes. This can be seen because
gdb claims to be reading symbols from the same file two times, like:
Reading symbols from /bin/gdb...Reading symbols from /bin/gdb...(no debugging symbols found)...done.
I think this would be less confusing if the minidebug objfile were given
a different name. That is what this patch implements. It also arranges
for the minidebug objfile to be marked OBJF_NOT_FILENAME.
After this patch the output looks like:
Reading symbols from /bin/gdb...Reading symbols from .gnu_debugdata for /usr/libexec/gdb...(no debugging symbols found)...done.
Tested by the buildbot.
gdb/ChangeLog
2018-05-16 Tom Tromey <tom@tromey.com>
PR cli/19551:
* symfile-add-flags.h (enum symfile_add_flags)
<SYMFILE_NOT_FILENAME>: New constant.
* symfile.c (read_symbols): Use SYMFILE_NOT_FILENAME. Get
objfile name from BFD.
(symbol_file_add_with_addrs): Check SYMFILE_NOT_FILENAME.
* minidebug.c (find_separate_debug_file_in_section): Put
".gnu_debugdata" into BFD's file name.
https://sourceware.org/ml/binutils/2013-05/msg00271.html was supposed
to banish "file format is ambiguous" errors for ELF. It didn't,
because the code supposedly detecting formats that implement
match_priority didn't work. That was due to not placing all matching
targets into the vector of matching targets. ELF objects should all
match the generic ELF target (priority 2), plus one or more machine
specific targets (priority 1), and perhaps a single machine specific
target with OS/ABI set (priority 0, best match). So the armel object
in the testcase actually matches elf32-littlearm,
elf32-littlearm-symbian, and elf32-littlearm-vxworks (all priority 1),
and elf32-little (priority 2). As the PR reported, elf32-little
wasn't seen as matching. Fixing that part of the problem wasn't too
difficult but matching the generic ELF target as well as the ARM ELF
targets resulted in ARM testsuite failures.
These proved to be the annoying reordering of stubs that occurs from
time to time due to the stub names containing the section id.
Matching another target causes more sections to be created in
elf_object_p. If section ids change, stub names change, which results
in different hashing and can therefore result in different hash table
traversal and stub creation order. That particular problem is fixed
by resetting section_id to the initial state before attempting each
target match, and taking a snapshot of its value after a successful
match.
PR 22458
* format.c (struct bfd_preserve): Add section_id.
(bfd_preserve_save, bfd_preserve_restore): Save and restore
_bfd_section_id.
(bfd_reinit): Set _bfd_section_id.
(bfd_check_format_matches): Put all matches of any priority into
matching_vector. Save initial section id and start each attempted
match at that section id.
* libbfd-in.h (_bfd_section_id): Declare.
* section.c (_bfd_section_id): Rename from section_id and make
global. Adjust uses.
(bfd_get_next_section_id): Delete.
* elf64-ppc.c (ppc64_elf_setup_section_lists): Replace use of
bfd_get_section_id with _bfd_section_id.
* libbfd.h: Regenerate.
* bfd-in2.h: Regenerate.
This patch corrects the disassembly masks for by element dot product
instructions. The bit 10 was wrong and supposed to be 1.
This caused incorrect disassembly of instructions in the unallocated space to
disassemble as dot product instructions.
No encoding errors can arrise from this issue.
opcodes/
PR binutils/23109
* aarch64-tbl.h (aarch64_opcode_table): Correct sdot and udot.
* aarch64-dis-2.c: Regenerate.
This patch adds constraints for read and write only system registers with the
msr and mrs instructions. The code will treat having both flags set and none
set as the same. These flags add constraints that must be matched up. e.g. a
system register with a READ only flag set, can only be used with mrs. If The
constraint fails a warning is emitted.
Examples of the warnings generated:
test.s: Assembler messages:
test.s:5: Warning: specified register cannot be written to at operand 1 -- `msr dbgdtrrx_el0,x3'
test.s:7: Warning: specified register cannot be read from at operand 2 -- `mrs x3,dbgdtrtx_el0'
test.s:8: Warning: specified register cannot be written to at operand 1 -- `msr midr_el1,x3'
and disassembly notes:
0000000000000000 <main>:
0: d5130503 msr dbgdtrtx_el0, x3
4: d5130503 msr dbgdtrtx_el0, x3
8: d5330503 mrs x3, dbgdtrrx_el0
c: d5330503 mrs x3, dbgdtrrx_el0
10: d5180003 msr midr_el1, x3 ; note: writing to a read-only register.
Note that because dbgdtrrx_el0 and dbgdtrtx_el0 have the same encoding, during
disassembly the constraints are use to disambiguate between the two. An exact
constraint match is always prefered over partial ones if available.
As always the warnings can be suppressed with -w and also be made errors using
warnings as errors.
binutils/
PR binutils/21446
* doc/binutils.texi (-M): Document AArch64 options.
gas/
PR binutils/21446
* testsuite/gas/aarch64/illegal-sysreg-2.s: Fix pmbidr_el1 test.
* testsuite/gas/aarch64/illegal-sysreg-2.l: Likewise.
* testsuite/gas/aarch64/illegal-sysreg-2.d: Likewise.
* testsuite/gas/aarch64/sysreg-diagnostic.s: New.
* testsuite/gas/aarch64/sysreg-diagnostic.l: New.
* testsuite/gas/aarch64/sysreg-diagnostic.d: New.
include/
PR binutils/21446
* opcode/aarch64.h (F_SYS_READ, F_SYS_WRITE): New.
opcodes/
PR binutils/21446
* aarch64-asm.c (opintl.h): Include.
(aarch64_ins_sysreg): Enforce read/write constraints.
* aarch64-dis.c (aarch64_ext_sysreg): Likewise.
* aarch64-opc.h (F_DEPRECATED, F_ARCHEXT, F_HASXT): Moved here.
(F_REG_READ, F_REG_WRITE): New.
* aarch64-opc.c (aarch64_print_operand): Generate notes for
AARCH64_OPND_SYSREG.
(F_DEPRECATED, F_ARCHEXT, F_HASXT): Move to aarch64-opc.h.
(aarch64_sys_regs): Add constraints to currentel, midr_el1, ctr_el0,
mpidr_el1, revidr_el1, aidr_el1, dczid_el0, id_dfr0_el1, id_pfr0_el1,
id_pfr1_el1, id_afr0_el1, id_mmfr0_el1, id_mmfr1_el1, id_mmfr2_el1,
id_mmfr3_el1, id_mmfr4_el1, id_isar0_el1, id_isar1_el1, id_isar2_el1,
id_isar3_el1, id_isar4_el1, id_isar5_el1, mvfr0_el1, mvfr1_el1,
mvfr2_el1, ccsidr_el1, id_aa64pfr0_el1, id_aa64pfr1_el1,
id_aa64dfr0_el1, id_aa64dfr1_el1, id_aa64isar0_el1, id_aa64isar1_el1,
id_aa64mmfr0_el1, id_aa64mmfr1_el1, id_aa64mmfr2_el1, id_aa64afr0_el1,
id_aa64afr0_el1, id_aa64afr1_el1, id_aa64zfr0_el1, clidr_el1,
csselr_el1, vsesr_el2, erridr_el1, erxfr_el1, rvbar_el1, rvbar_el2,
rvbar_el3, isr_el1, tpidrro_el0, cntfrq_el0, cntpct_el0, cntvct_el0,
mdccsr_el0, dbgdtrrx_el0, dbgdtrtx_el0, osdtrrx_el1, osdtrtx_el1,
mdrar_el1, oslar_el1, oslsr_el1, dbgauthstatus_el1, pmbidr_el1,
pmsidr_el1, pmswinc_el0, pmceid0_el0, pmceid1_el0.
* aarch64-tbl.h (aarch64_opcode_table): Add constraints to
msr (F_SYS_WRITE), mrs (F_SYS_READ).
This patch adds a new platform option "notes" that can be used to indicate if
disassembly notes should be placed in the disassembly as comments.
These notes can contain information about a failing constraint such as reading
from a write-only register. The disassembly will not be blocked because of this
but -M notes will emit a comment saying that the operation is not allowed.
For assembly this patch adds a new non-fatal status for errors. This is
essentially a warning. The reason for not creating an actual warning type is
that this causes the interaction between the ordering of warnings and errors to
be problematic. Currently the error buffer is almost always filled because of
the way operands are matched during assembly. An earlier template may have put
an error there that would only be displayed if no other template matches or
generates a higher priority error. But by definition a warning is lower
priority than a warning, so the error (which is incorrect if another template
matched) will supersede the warning. By treating warnings as errors and only
later relaxing the severity this relationship keeps working and the existing
reporting infrastructure can be re-used.
binutils/
PR binutils/21446
* doc/binutils.texi (-M): Document AArch64 options.
* NEWS: Document notes and warnings.
gas/
PR binutils/21446
* config/tc-aarch64.c (print_operands): Indicate no notes.
(output_operand_error_record): Support non-fatal errors.
(output_operand_error_report, warn_unpredictable_ldst, md_assemble):
Likewise.
include/
PR binutils/21446
* opcode/aarch64.h (aarch64_operand_error): Add non_fatal.
(aarch64_print_operand): Support notes.
opcodes/
PR binutils/21446
* aarch64-dis.c (no_notes: New.
(parse_aarch64_dis_option): Support notes.
(aarch64_decode_insn, print_operands): Likewise.
(print_aarch64_disassembler_options): Document notes.
* aarch64-opc.c (aarch64_print_operand): Support notes.
This patch if the first patch in a series to add the ability to add constraints
to system registers that an instruction must adhere to in order for the register
to be usable with that instruction.
These constraints can also be used to disambiguate between registers with the
same encoding during disassembly.
This patch adds a new flags entry in the sysreg structures and ensures it is
filled in and read out during assembly/disassembly. It also adds the ability for
the assemble and disassemble functions to be able to gracefully fail and re-use
the existing error reporting infrastructure.
The return type of these functions are changed to a boolean to denote success or
failure and the error structure is passed around to them. This requires
aarch64-gen changes so a lot of the changes here are just mechanical.
gas/
PR binutils/21446
* config/tc-aarch64.c (parse_sys_reg): Return register flags.
(parse_operands): Fill in register flags.
gdb/
PR binutils/21446
* aarch64-tdep.c (aarch64_analyze_prologue,
aarch64_software_single_step, aarch64_displaced_step_copy_insn):
Indicate not interested in errors.
include/
PR binutils/21446
* opcode/aarch64.h (aarch64_opnd_info): Change sysreg to struct.
(aarch64_decode_insn): Accept error struct.
opcodes/
PR binutils/21446
* aarch64-asm.h (aarch64_insert_operand, aarch64_##x): Return boolean
and take error struct.
* aarch64-asm.c (aarch64_ext_regno, aarch64_ins_reglane,
aarch64_ins_reglist, aarch64_ins_ldst_reglist,
aarch64_ins_ldst_reglist_r, aarch64_ins_ldst_elemlist,
aarch64_ins_advsimd_imm_shift, aarch64_ins_imm, aarch64_ins_imm_half,
aarch64_ins_advsimd_imm_modified, aarch64_ins_fpimm,
aarch64_ins_imm_rotate1, aarch64_ins_imm_rotate2, aarch64_ins_fbits,
aarch64_ins_aimm, aarch64_ins_limm_1, aarch64_ins_limm,
aarch64_ins_inv_limm, aarch64_ins_ft, aarch64_ins_addr_simple,
aarch64_ins_addr_regoff, aarch64_ins_addr_offset, aarch64_ins_addr_simm,
aarch64_ins_addr_simm10, aarch64_ins_addr_uimm12,
aarch64_ins_simd_addr_post, aarch64_ins_cond, aarch64_ins_sysreg,
aarch64_ins_pstatefield, aarch64_ins_sysins_op, aarch64_ins_barrier,
aarch64_ins_prfop, aarch64_ins_hint, aarch64_ins_reg_extended,
aarch64_ins_reg_shifted, aarch64_ins_sve_addr_ri_s4xvl,
aarch64_ins_sve_addr_ri_s6xvl, aarch64_ins_sve_addr_ri_s9xvl,
aarch64_ins_sve_addr_ri_s4, aarch64_ins_sve_addr_ri_u6,
aarch64_ins_sve_addr_rr_lsl, aarch64_ins_sve_addr_rz_xtw,
aarch64_ins_sve_addr_zi_u5, aarch64_ext_sve_addr_zz,
aarch64_ins_sve_addr_zz_lsl, aarch64_ins_sve_addr_zz_sxtw,
aarch64_ins_sve_addr_zz_uxtw, aarch64_ins_sve_aimm,
aarch64_ins_sve_asimm, aarch64_ins_sve_index, aarch64_ins_sve_limm_mov,
aarch64_ins_sve_quad_index, aarch64_ins_sve_reglist,
aarch64_ins_sve_scale, aarch64_ins_sve_shlimm, aarch64_ins_sve_shrimm,
aarch64_ins_sve_float_half_one, aarch64_ins_sve_float_half_two,
aarch64_ins_sve_float_zero_one, aarch64_opcode_encode): Likewise.
* aarch64-dis.h (aarch64_extract_operand, aarch64_##x): Likewise.
* aarch64-dis.c (aarch64_ext_regno, aarch64_ext_reglane,
aarch64_ext_reglist, aarch64_ext_ldst_reglist,
aarch64_ext_ldst_reglist_r, aarch64_ext_ldst_elemlist,
aarch64_ext_advsimd_imm_shift, aarch64_ext_imm, aarch64_ext_imm_half,
aarch64_ext_advsimd_imm_modified, aarch64_ext_fpimm,
aarch64_ext_imm_rotate1, aarch64_ext_imm_rotate2, aarch64_ext_fbits,
aarch64_ext_aimm, aarch64_ext_limm_1, aarch64_ext_limm, decode_limm,
aarch64_ext_inv_limm, aarch64_ext_ft, aarch64_ext_addr_simple,
aarch64_ext_addr_regoff, aarch64_ext_addr_offset, aarch64_ext_addr_simm,
aarch64_ext_addr_simm10, aarch64_ext_addr_uimm12,
aarch64_ext_simd_addr_post, aarch64_ext_cond, aarch64_ext_sysreg,
aarch64_ext_pstatefield, aarch64_ext_sysins_op, aarch64_ext_barrier,
aarch64_ext_prfop, aarch64_ext_hint, aarch64_ext_reg_extended,
aarch64_ext_reg_shifted, aarch64_ext_sve_addr_ri_s4xvl,
aarch64_ext_sve_addr_ri_s6xvl, aarch64_ext_sve_addr_ri_s9xvl,
aarch64_ext_sve_addr_ri_s4, aarch64_ext_sve_addr_ri_u6,
aarch64_ext_sve_addr_rr_lsl, aarch64_ext_sve_addr_rz_xtw,
aarch64_ext_sve_addr_zi_u5, aarch64_ext_sve_addr_zz,
aarch64_ext_sve_addr_zz_lsl, aarch64_ext_sve_addr_zz_sxtw,
aarch64_ext_sve_addr_zz_uxtw, aarch64_ext_sve_aimm,
aarch64_ext_sve_asimm, aarch64_ext_sve_index, aarch64_ext_sve_limm_mov,
aarch64_ext_sve_quad_index, aarch64_ext_sve_reglist,
aarch64_ext_sve_scale, aarch64_ext_sve_shlimm, aarch64_ext_sve_shrimm,
aarch64_ext_sve_float_half_one, aarch64_ext_sve_float_half_two,
aarch64_ext_sve_float_zero_one, aarch64_opcode_decode): Likewise.
(determine_disassembling_preference, aarch64_decode_insn,
print_insn_aarch64_word, print_insn_data): Take errors struct.
(print_insn_aarch64): Use errors.
* aarch64-asm-2.c: Regenerate.
* aarch64-dis-2.c: Regenerate.
* aarch64-gen.c (print_operand_inserter): Use errors and change type to
boolean in aarch64_insert_operan.
(print_operand_extractor): Likewise.
* aarch64-opc.c (aarch64_print_operand): Use sysreg struct.
With native MIPS/Linux targets the $zero register is inaccessible, with
its supposed context slot provided by the OS occupied by the $restart
register. The PTRACE_GETREGS path takes care of it by artificially
supplying the hardwired contents of $zero in `mips_supply_gregset' or
`mips64_supply_gregset', as applicable, however the PTRACE_PEEKUSER
fallback does not, making the register unavailable, e.g.:
(gdb) info registers
zero at v0 v1 a0 a1 a2 a3
R0 <unavl> 00000001 00000001 d2f1a9fc 00000000 00000000 00417158 00417150
t0 t1 t2 t3 t4 t5 t6 t7
R8 00000004 00000000 fffffff8 00000000 00000000 00000000 00000001 00000007
s0 s1 s2 s3 s4 s5 s6 s7
R16 00000000 00405e30 00000000 00500000 00000000 0052ec08 00000000 00000000
t8 t9 k0 k1 gp sp s8 ra
R24 00000000 00417008 00000000 00000000 0041e220 7fff4ce0 7fff4ce0 00405d0c
status lo hi badvaddr cause pc
<unavl> 00441cf1 00000017 00417004 00800024 00405d10
fcsr fir restart
00800000 00f30000 00000000
(gdb)
or (under certain circumstances):
(gdb) stepi
Register 0 is not available
(gdb)
This is specifically because `mips_linux_register_addr' and
`mips64_linux_register_addr', both correctly return -1 for
MIPS_ZERO_REGNUM, and therefore `linux_nat_trad_target::fetch_registers'
faithfully marks this register as unavailable.
Supply this register artificially then in the PTRACE_PEEKUSER case as
well, correcting this issue.
gdb/
* mips-linux-nat.c (mips_linux_nat_target::fetch_registers):
Supply the MIPS_ZERO_REGNUM register.
Make the `mask_address_var' variable static, it is not used outside
mips-tdep.c and having no target name embedded within it causes a risk
of a namespace clash.
gdb/
* mips-tdep.c (mask_address_var): Make variable static.
Fix a commit f90183d7e3 ("Get GDBserver pid on remote target") bug and
correctly handle the case where the PID of `gdbserver' could not have
been retrieved. If that happens, $server_pid is unset causing:
FAIL: gdb.server/server-kill.exp: p server_pid
ERROR: tcl error sourcing .../gdb/testsuite/gdb.server/server-kill.exp.
ERROR: can't read "server_pid": no such variable
while executing
"if {$server_pid == "" } {
return -1
}"
(file ".../gdb/testsuite/gdb.server/server-kill.exp" line 49)
invoked from within
"source .../gdb/testsuite/gdb.server/server-kill.exp"
("uplevel" body line 1)
invoked from within
"uplevel #0 source .../gdb/testsuite/gdb.server/server-kill.exp"
invoked from within
"catch "uplevel #0 source $test_file_name""
Verify that the variable exists then rather than trying to access it.
gdb/testsuite/
* gdb.server/server-kill.exp: Verify whether `server_pid' exists
rather then trying to access it in determining whether the PID
of `gdbserver' could have been retrieved.
2018-05-15 Christophe Guillon <christophe.guillon@st.com>
* coffcode.h (coff_bigobj_swap_aux_in): Make sure that all fields
of the aux structure are initialised.
Change-Id: I81be255ac6611afbe00995fac550e98e6a07e5df
bfd * targets.c: Wrap nfp_elf64_vec in BFD64 ifdef.
include * opcode/nfp.h: Use uint64_t instead of bfd_vma.
opcodes * nfp-dis.c: Use uint64_t for instruction variables, not bfd_vma.
Also use the correct rel strip-13 variant for more ARM targets.
* testsuite/lib/binutils-common.exp (is_elf_format): Add chorus,
cloudabi, fuchsia, kaos and nto. Merge netbsdelf* into *elf*,
and *uclinux* into *linux*.
* testsuite/binutils-all/objcopy.exp: Accept armeb for rel
strip-13 test, exclude arm-vxworks and arm-windiss.
It turns out that a dwarf2_cu can remain allocated after psymtab
expansion is done, and so it makes sense to clear rust_unions when
done processing it.
Tested on x86-64 Fedora 27.
2018-05-14 Tom Tromey <tom@tromey.com>
* dwarf2read.c (rust_union_quirks): Clear rust_unions.
gas * write.c (maybe_generate_build_notes): Generate notes on a
per-code-section basis. Skip linkonce sections.
ld * testsuite/ld-elf/notes.exp: New file: Run new test.
* testsuite/ld-elf/note1_1.s: New file: Source file for test.
* testsuite/ld-elf/note1_2.s: New file: Source file for test.
* testsuite/ld-elf/note1.r: New file: Expected readelf output.
If IFUNC symbol is defined in position-dependent executable, we should
change it to the normal function and set its address to its PLT entry
which should be resolved by R_*_IRELATIVE at run-time. All external
references should be resolved to its PLT in executable.
bfd/
PR ld/23169
* elf-ifunc.c (_bfd_elf_allocate_ifunc_dyn_relocs): Don't issue
an error on IFUNC pointer defined in PDE.
* elf32-i386.c (elf_i386_finish_dynamic_symbol): Call
_bfd_x86_elf_link_fixup_ifunc_symbol.
* elf64-x86-64.c (elf_x86_64_finish_dynamic_symbol): Likewise.
* elfxx-x86.c (_bfd_x86_elf_link_fixup_ifunc_symbol): New
function.
* elfxx-x86.h (_bfd_x86_elf_link_fixup_ifunc_symbol): New.
ld/
PR ld/23169
* testsuite/ld-ifunc/ifunc-9-i386.d: New file.
* testsuite/ld-ifunc/ifunc-9-x86-64.d: Likewise.
* testsuite/ld-ifunc/pr23169a.c: Likewise.
* testsuite/ld-ifunc/pr23169a.rd: Likewise.
* testsuite/ld-ifunc/pr23169b.c: Likewise.
* testsuite/ld-ifunc/pr23169b.c: Likewise.
* testsuite/ld-ifunc/pr23169c.rd: Likewise.
* testsuite/ld-ifunc/pr23169c.rd: Likewise.
* testsuite/ld-ifunc/ifunc-9-x86.d: Removed.
* testsuite/ld-ifunc/ifunc.exp: Run PR ld/23169 tests.
__bss_start, _end and _edata are defined by linker to mark regions
within executables and shared libraries. All references within
executables should be locally resolved.
This patch doesn't change how their references within shared libraries
are resolved.
bfd/
PR ld/23162
* elfxx-x86.c (elf_x86_linker_defined): New function.
(_bfd_x86_elf_link_check_relocs): Use it to mark __bss_start,
_end and _edata locally defined within executables.
ld/
PR ld/23162
* testsuite/ld-elf/pr23162.map: New file.
* testsuite/ld-elf/pr23162.rd: Likewise.
* testsuite/ld-elf/pr23162a.c: Likewise.
* testsuite/ld-elf/pr23162b.c: Likewise.
* testsuite/ld-elf/shared.exp: Run PR ld/23162 tests.
Rather than just silencing the gcc-8 warnings, I decided to rewrite
the buffer handling in the two functions where gcc was warning.
The rest of the file could do with the same treatment.
* config/tc-score.c (s3_do_macro_bcmp): Don't use fixed size
buffers.
(s3_do_macro_bcmpz): Likewise.
Sections may well belong in multiple segments. The testcase in the PR
saw an allocated section being assigned to an ABIFLAGS segment, then
not being assigned to a LOAD segment because it had already been
handled. To fix that particular problem this patch sets and tests
segment_mark only for LOAD segments. I kept the segment_mark test for
LOAD segments because I think there may otherwise be a problem with
zero size sections.
A few other problems showed up with the testcase. Some targets align
.dynamic, resulting in the test failing with "section .dynamic lma
0x800000c0 adjusted to 0x800000cc" and similar messages. I've tried
to handle that with some more hacks to the segment lma, which do the
right thing for the testcase, but may well fail in other situations.
I've also removed the tests of segment lma (p_paddr) and code involved
in deciding that an adjusted segment no longer covers the file or
program headers. Those test can't be correct in the face of objcopy
--change-section-lma. It may be necessary to reinstate the tests but
do them modulo page size, but we'll see how this goes.
PR 20659
bfd/
* elf.c (rewrite_elf_program_header): Use segment_mark only for
PT_LOAD headers. Delete first_matching_lma and first_suggested_lma.
Instead make matching_lma and suggested_lma pointers to the
sections. Align section vma and lma calculated from segment.
Don't clear includes_phdrs or includes_filehdr based on p_paddr
test. Try to handle alignment padding before first section by
adjusting new segment lma down. Adjust PT_PHDR map p_paddr.
ld/
* testsuite/ld-elf/changelma.d,
* testsuite/ld-elf/changelma.lnk,
* testsuite/ld-elf/changelma.s: New test.
In commit:
commit 8ee22052f6
Author: Andrew Burgess <andrew.burgess@embecosm.com>
Date: Thu May 3 17:46:14 2018 +0100
gdb/x86: Handle kernels using compact xsave format
in two places FXSAVE_ADDR was used instead of FXSAVE_MXCSR_ADDR to get
the address of the mxcsr register within the xsave buffer. This will
mean we are potentially accessing the wrong location within the xsave
buffer.
There are no tests included with this patch. The first mistake would
only trigger an issue if/when the user tries to manually set the mxcsr
register to a value that matches the random (value off stack) value
that is in the xsave buffer, in this case the change by the user will
go unnoticed by GDB, and the default value of mxcsr will be preserved.
The second mistake only happens on the code path where all x87
registers are being written out of the register cache. I'm not sure
how to trigger that code path.
gdb/ChangeLog:
* i387-tdep.c (i387_collect_xsave): Use FXSAVE_MXCSR_ADDR not
FXSAVE_ADDR for the mxcsr register.
gdb_target definitions were removed from configure.tgt in 2007, before
xtensa port was merged. Remove it from the xtensa target as well.
gdb/
2018-05-11 Max Filippov <jcmvbkbc@gmail.com>
* configure.tgt (xtensa*-*-linux*): Drop gdb_target definition.
This gets rid of the core_ops global, and replaces it with
heap-allocated core_target instances. In practice, there will only be
one such instance, though that will change further ahead as more
pieces of multi-target support are merged.
Notice that this replaces one heap-allocated object for another, the
number of allocations is the same. Specifically, currently we
heap-allocate the 'core_data' object, which holds the core's section
table. With this patch, that object is made a field of the
core_target class, and no longer allocated separately.
Note that this bit:
- /* Looks semi-reasonable. Toss the old core file and work on the
- new. */
-
- unpush_target (&core_ops);
does not need a replacement, because by the time we get here, the
target_preopen call at the top of core_target_open has already
unpushed any previous target.
gdb/ChangeLog:
2018-05-11 Pedro Alves <palves@redhat.com>
* corelow.c (core_target) <core_target>: No longer inline.
Initialize m_core_gdbarch, m_core_vec and build the section table
here.
<~core_target>: New.
<core_gdbarch, get_core_register_section>: New methods.
<m_core_section_table, m_core_vec, m_core_gdbarch>: New fields,
factored out from ...
<core_data, core_vec, core_gdbarch>: ... these deleted globals.
(core_ops): Delete.
(sniff_core_bfd): Add gdbarch parameter.
(core_close): Delete, merged into ...
(core_target::close): ... here. Delete self.
(core_close_cleanup): Delete.
(core_target_open): Allocate a core_target on the heap. Use a
unique_ptr instead of a cleanup. Bits moved into the core_target
ctor. Adjust to use core_target methods instead of globals.
(get_core_register_section): Rename to ...
(core_target::get_core_register_section): ... this and adjust.
(struct get_core_registers_cb_data): New.
(get_core_registers_cb): Use it. Use bool.
(core_target::fetch_registers, core_target::files_info)
(core_target::xfer_partial, core_target::read_description)
(core_target::pid_to, core_target::thread_name): Adjust to
reference class fields instead of globals.
* target.h (struct target_ops_deleter, target_ops_up): New.
(previously called 'core_target', but since renamed because
'core_target' is the name of the target_ops class now.)
This eliminates the "the_core_target" global, as preparation for being
able to have more than one core loaded. When we get there, we will
instantiate one core_target object per core instead.
Essentially, this replaces the reference to the_core_target in
core_file_command by a reference to core_bfd, which is per
program_space.
Currently, core_file_command calls 'the_core_target->detach()' even if
the core target is not open and pushed on the target stack. If it is
indeed not open, then the practical effect is that
core_target::detach() prints "No core file now.". That is preserved
by printing that directly from within core_file_command if not
debugging a core.
gdb/ChangeLog:
2018-05-11 Pedro Alves <palves@redhat.com>
* corefile.c (core_file_command): Move to corelow.c.
* corelow.c (the_core_target): Delete.
(core_file_command): Moved from corefile.c. Check exec_bfd
instead of the_core_target. Use target_detach instead of calling
into the_core_target directly.
(maybe_say_no_core_file_now): New.
(core_target::detach): Use it.
(_initialize_corelow): Remove references to the_core_target.
* gdbcore.h (the_core_target): Delete.
This moves the core_bfd global to be a field of the program space. It
then replaces core_bfd with a macro to avoid a massive patch -- the
same approach taken for various other program space fields.
This is a basic transformation for multi-target work.
2018-05-11 Tom Tromey <tromey@redhat.com>
Pedro Alves <tromey@redhat.com>
* corefile.c (core_bfd): Remove.
* gdbcore.h (core_bfd): Now a macro.
* progspace.h (struct program_space) <cbfd>: New field.
This removes the remaining cleanups from mdebugread.c, replacing them
with gdb::def_vector.
Tested by the buildbot, though I doubt this exercises mdebugread.
gdb/ChangeLog
2018-05-11 Tom Tromey <tom@tromey.com>
* mdebugread.c (parse_partial_symbols, psymtab_to_symtab_1): Use
gdb::def_vector.
The floating point context structure on x86 LynxOS-178 is not
the same as on LynxOS 5.x. As a consequence, trying to print
the return value of a function returning a float, for instance,
yields incorrect results.
This patch fixes the issue by providing an updated definition
for LynxOS-178 (the reason why we cannot access the actual definition
provided by the system still remains true).
gdb/gdbserver/ChangeLog:
* lynx-i386-low.c (LYNXOS_178): New macro.
[LYNXOS_178] (usr_fcontext_t): Provide a definition that matches
the layout on LynxOS-178.
(lynx_i386_fill_fpregset, lynx_i386_store_fpregset): Do not
handle floating point registers that are not supported by
LynxOS-178.
Simon pointed out that gdb would not build with clang, due to the
addition of -Wimplicit-fallthrough. This patch fixes the problem by
using -Wimplicit-fallthrough=3 -- this does not work with clang,
bypassing the issue.
Tested by rebuilding with both gcc and clang; and also by verifying
that -Wimplicit-fallthrough=3 is used in the gcc build.
I will file a follow-up bug to convert the fall-through comments to a
form that can be used by both clang and gcc.
gdb/ChangeLog
2018-05-10 Tom Tromey <tom@tromey.com>
* configure: Rebuild.
* warning.m4 (AM_GDB_WARNINGS): Use -Wimplicit-fallthrough=3.
gdb/gdbserver/ChangeLog
2018-05-10 Tom Tromey <tom@tromey.com>
* configure: Rebuild.
This patch makes it possible to use an integer immediate with the fmov instructions
allowing you to simply write fmov d0, #2 instead of needing fmov d0, #2.0.
The parse double function already know to deal with this so we just need to list the
restriction put in place in parser.
The is considered a QoL improvement for hand assembly writers and allows more
code portability between assembler.
gas/
* config/tc-aarch64.c (parse_aarch64_imm_float): Remove restrictions.
* testsuite/gas/aarch64/diagnostic.s: Move fmov int test to..
* testsuite/gas/aarch64/fpmov.s: Here.
* testsuite/gas/aarch64/fpmov.d: Update results with fmov.
* testsuite/gas/aarch64/diagnostic.l: Remove fmov values.
* testsuite/gas/aarch64/sve-invalid.s: Update test files.
* testsuite/gas/aarch64/sve-invalid.l: Likewise
This patch fixes the case where you want to use an integer value the
floating point immediate to a VFP vmov instruction such as
vmovmi.f32 s27, #11.
If the immediate is not a float we convert it and copy it's representation
into the imm field and then carry on validating as if we originally entered
a floating point immediate.
The is considered a QoL improvement for hand assembly writers and allows more
code portability between assembler.
gas/
* gas/config/tc-arm.c (do_neon_mov): Allow integer literal for float
immediate.
* testsuite/gas/arm/vfp-mov-enc.s: New.
* testsuite/gas/arm/vfp-mov-enc.d: New.
On Windows, starting a new process with GDBserver seems to work,
in the sense that the program does get started, and GDBserver
confirms that it is listening for GDB to connect. However, as soon as
GDB establishes the connection with GDBserver, and starts discussing
with it, GDBserver crashes, with a SEGV.
This SEGV occurs in remote-utils.c::prepare_resume_reply...
| regp = current_target_desc ()->expedite_regs;
| [...]
| while (*regp)
... because, in our case, REGP is NULL.
This patches fixes the issues by adding a parameter to init_target_desc,
in order to make sure that we always provide the list of registers when
we initialize a target description.
gdb/ChangeLog:
PR server/23158:
* regformats/regdat.sh: Adjust script, following the addition
of the new expedite_regs parameter to init_target_desc.
gdb/gdbserver/ChangeLog:
PR server/23158:
* tdesc.h (init_target_desc) <expedite_regs>: New parameter.
* tdesc.c (init_target_desc) <expedite_regs>: New parameter.
Use it to set the expedite_regs field in the given tdesc.
* x86-tdesc.h: New file.
* linux-aarch64-tdesc.c (aarch64_linux_read_description):
Adjust following the addition of the new expedite_regs parameter
to init_target_desc.
* linux-tic6x-low.c (tic6x_read_description): Likewise.
* linux-x86-tdesc.c: #include "x86-tdesc.h".
(i386_linux_read_description, amd64_linux_read_description):
Adjust following the addition of the new expedite_regs parameter
to init_target_desc.
* lynx-i386-low.c: #include "x86-tdesc.h".
(lynx_i386_arch_setup): Adjust following the addition of the new
expedite_regs parameter to init_target_desc.
* nto-x86-low.c: #include "x86-tdesc.h".
(nto_x86_arch_setup): Adjust following the addition of the new
expedite_regs parameter to init_target_desc.
* win32-i386-low.c: #include "x86-tdesc.h".
(i386_arch_setup): Adjust following the addition of the new
expedite_regs parameter to init_target_desc.
Trying to start a program with GDBserver on Windows yields
the following error:
$ gdbserver.exe --once :4444 simple_main.exe
Killing process(es): 5008
No program to debug
Exiting
The error itself comes from the following code shortly after
create_inferior gets called (in server.c::main):
/* Wait till we are at first instruction in program. */
create_inferior (program_path.get (), program_args);
[...]
if (last_status.kind == TARGET_WAITKIND_EXITED
|| last_status.kind == TARGET_WAITKIND_SIGNALLED)
was_running = 0;
else
was_running = 1;
if (!was_running && !multi_mode)
error ("No program to debug");
What happens is that the "last_status" global starts initialized
as zeroes, which means last_status.kind == TARGET_WAITKIND_EXITED,
and we expect create_inferior to be waiting for the inferior to
start until reaching the SIGTRAP, and to set the "last_status"
global to match that last event we received.
I suspect this is an unintended side-effect of the following change...
commit 2090129c36
Date: Thu Dec 22 21:11:11 2016 -0500
Subject: Share fork_inferior et al with gdbserver
... which removes some code in server.c that was responsible for
starting the inferior in a functin that was named start_inferior,
and looked like this:
signal_pid = create_inferior (new_argv[0], &new_argv[0]);
[...]
/* Wait till we are at 1st instruction in program, return new pid
(assuming success). */
last_ptid = mywait (pid_to_ptid (signal_pid), &last_status, 0, 0);
The code has been transitioned to using fork_inferior, but sadly,
only for the targets that support it. On Windows, the calls to wait
setting "last_status" simply disappeared.
This patch adds it back in the Windows-specific implementation of
create_inferior.
gdb/gdbserver/ChangeLog:
PR server/23158:
* win32-low.c (win32_create_inferior): Add call to my_wait
setting last_status global.
Trying to start GDBserver on Windows currently yields the following
error...
$ gdbserver.exe --once :4444 simple_main.exe
glob could not process pattern '(null)'.
Exiting
... after which GDB terminates with a nonzero status.
This is because create_process in win32-low.c calls gdb_tilde_expand
with the result of a call to get_inferior_cwd without verifying that
the returned directory is not NULL:
| static BOOL
| create_process (const char *program, char *args,
| DWORD flags, PROCESS_INFORMATION *pi)
| {
| const char *inferior_cwd = get_inferior_cwd ();
| std::string expanded_infcwd = gdb_tilde_expand (inferior_cwd);
This patch avoids this by only calling gdb_tilde_expand when
INFERIOR_CWD is not NULL, which is similar to what is done on
GNU/Linux for instance.
gdb/gdbserver/ChangeLog:
PR server/23158:
* win32-low.c (create_process): Only call gdb_tilde_expand if
inferior_cwd is not NULL.
This patch fixes tagged pointer support for AArch64 GDB. Linux kernel
debugging failure was reported after tagged pointer support was committed.
After a discussion around best path forward to manage tagged pointers
on GDB side we are going to disable tagged pointers support for
aarch64-none-elf-gdb because for non-linux applications we cant be
sure if tagged pointers will be used by MMU or not.
Also for aarch64-linux-gdb we are going to sign extend user-space
address after clearing tag bits. This will help debug both kernel
and user-space addresses based on information from linux kernel
documentation given below:
According to AArch64 memory map:
https://www.kernel.org/doc/Documentation/arm64/memory.txt
"User addresses have bits 63:48 set to 0 while the kernel addresses have
the same bits set to 1."
According to AArch64 tagged pointers document:
https://www.kernel.org/doc/Documentation/arm64/tagged-pointers.txt
The kernel configures the translation tables so that translations made
via TTBR0 (i.e. userspace mappings) have the top byte (bits 63:56) of
the virtual address ignored by the translation hardware. This frees up
this byte for application use.
Running gdb testsuite after applying this patch introduces no regressions
and tagged pointer test cases still pass.
gdb/ChangeLog:
2018-05-10 Omair Javaid <omair.javaid@linaro.org>
PR gdb/23127
* aarch64-linux-tdep.c (aarch64_linux_init_abi): Add call to
set_gdbarch_significant_addr_bit.
* aarch64-tdep.c (aarch64_gdbarch_init): Remove call to
set_gdbarch_significant_addr_bit.
* utils.c (address_significant): Update to sign extend addr.
Gold resolves GOT-relative relocs relative to the GOT base +
0x8000 when the GOT is larger than 0x8000. However, previously
the _GLOBAL_OFFSET_TABLE_ symbol was set to GOT base + 0x8000
when the .got.plt was larger than 0x8000. This patch makes both
checks use the size of the .got section so that they agree when
to add 0x8000.
Not all literals need to be moved in the presence of
--text-section-literals or --auto-litpools, but only those created by
.literal pseudo op or generated as a result of relaxation. Attempts to
move other literals may result in abnormal termination of the assembler
due to the following assertion failure:
Internal error in xg_find_litpool at gas/config/tc-xtensa.c:11209.
The same assertion may also be triggered by attempting to assign literal
pools to literals in .init and .fini sections; don't try to do that.
gas/
2018-05-09 Max Filippov <jcmvbkbc@gmail.com>
* config/tc-xtensa.c (xtensa_is_init_fini): New function.
(xtensa_move_literals): Only attempt to assign literal pool to
literals with tc_frag_data.is_literal mark and not in .init or
.fini sections.
Join nested 'if' conditions to simplify function structure.
(xtensa_switch_to_non_abs_literal_fragment): Use
xtensa_is_init_fini to test for .init/.fini sections.
* testsuite/gas/xtensa/all.exp (auto-litpools-3)
(auto-litpools-4, text-section-literals-1): New tests.
* testsuite/gas/xtensa/auto-litpools-3.d: New test results.
* testsuite/gas/xtensa/auto-litpools-3.s: New test source.
* testsuite/gas/xtensa/auto-litpools-4.d: New test results.
* testsuite/gas/xtensa/auto-litpools-4.s: New test source.
* testsuite/gas/xtensa/text-section-literals-1.d: New test results.
* testsuite/gas/xtensa/text-section-literals-1.s: New test source.
xtensa GDB may be used with both bare-metal and linux-based
applications. In case of bare-metal application gdbserver is able to
provide information about all CPU registers: both unprivileged and
privileged. In case of linux-based application only a small subset of
privileged state is available. Currently xtensa GDB only expects
unprivileged registers in 'g' packets and it fails to communicate with
server that sends both privileged and unprivileged registers.
Allow bare-metal xtensa GDB to deal with both privileged and
unprivileged registers by initializing tdep->num_regs with the total
number of target CPU registers. Keep linux-based xtensa GDB
functionality as is by copying tdep->num_nopriv_regs to tdep->num_regs.
gdb/
2018-05-09 Max Filippov <jcmvbkbc@gmail.com>
* xtensa-linux-tdep.c (xtensa-tdep.h): New include.
(xtensa_linux_init_abi): Limit tdep->num_regs by
tdep->num_nopriv_regs.
* xtensa-tdep.c (xtensa_derive_tdep): Calculate
tdep->num_nopriv_regs and only copy it to tdep->num_regs if it's
not initialized.
