Commit Graph

195 Commits

Author SHA1 Message Date
Andrew Cagney
c8cca39f98 Import current --enable-gdb-build-warnings. 2002-06-16 16:33:35 +00:00
Andrew Cagney
3c25f8c7b0 Move include/callback.h and include/remote-sim.h to include/gdb/.
Update accordingly.
2002-06-09 15:45:54 +00:00
Jim Blandy
ff88f59d5a *** empty log message *** 2001-05-07 06:10:25 +00:00
Jim Blandy
be5fcb106b * mn10300.igen: Doc fixes. 2001-05-07 04:52:00 +00:00
Alexandre Oliva
cc274e7c27 * Makefile.in (idecode.o, op_utils.o, semantics.o, simops.o):
Depend on targ-vals.h.
2001-04-26 19:23:16 +00:00
J.T. Conklin
d4424adaef * Makefile.in (simops.o): Add simops.h to dependency list. 2001-04-15 19:57:10 +00:00
Alexandre Oliva
5425ca992e * am33.igen: Warning clean-up.
(movm): Initialize PC and mask.
(mov, movbu, movhu): Set srcreg2 from RI0.
(bsch): Initialize c.
(sat16_cmp): Actually do the comparison.
(mov_llt): Do not overwrite dstreg with uninitialized variable.
2000-08-09 18:42:04 +00:00
Nick Clifton
ceec355905 minor formatting tweaks to aid syncronisation 2000-05-29 19:05:41 +00:00
Andrew Cagney
eb2d80b469 Change profiling so that it is enabled by default. Re-generate everything. 2000-05-24 04:39:50 +00:00
Alexandre Oliva
e33c036475 * am33.igen: Fix leading comments of SP-relative offset insns that
referred to other registers.  Make their offsets unsigned.
2000-05-22 20:34:09 +00:00
Alexandre Oliva
24a39d88a2 * mn10300_sim.h (genericAdd, genericSub, genericCmp, genericOr,
genericXor, genericBtst): Use `unsigned32'.
* op_utils.c: Likewise.
* mn10300.igen, am33.igen: Use `unsigned32', `signed32',
`unsigned64' or `signed64' where type width is relevant.
2000-05-18 22:56:28 +00:00
Alexandre Oliva
bfa8561f01 * am33.igen (inc4 Rn): Use genericAdd so as to modify flags. 2000-04-25 09:48:40 +00:00
Alexandre Oliva
d8e7020fd6 * am33.igen: Make SP-relative offsets unsigned. Add `*am33' for
some instructions that were missing it.
2000-04-09 09:04:54 +00:00
Frank Ch. Eigler
a9e3a73989 * build fix
2000-03-03  Alexandre Oliva  <oliva@lsd.ic.unicamp.br>

	* Makefile.in (IGEN_INSN): Added am33.igen.
2000-03-03 23:25:10 +00:00
Jason Molenda
c2d11a7da0 import gdb-1999-12-06 snapshot 1999-12-07 03:56:43 +00:00
Stan Shebs
d4f3574e77 import gdb-1999-09-08 snapshot 1999-09-09 00:02:17 +00:00
Jason Molenda
adf40b2e16 import gdb-1999-07-19 snapshot 1999-07-19 23:30:11 +00:00
Stan Shebs
cd0fc7c3eb import gdb-1999-05-10 1999-05-11 13:35:55 +00:00
Stan Shebs
7a292a7adf import gdb-19990422 snapshot 1999-04-26 18:34:20 +00:00
Stan Shebs
c906108c21 Initial creation of sourceware repository 1999-04-16 01:35:26 +00:00
Stan Shebs
071ea11e85 Initial creation of sourceware repository 1999-04-16 01:34:07 +00:00
Jeff Law
1ec21625d0 am33 is now kept with --keep-cygnus. 1999-01-26 14:02:27 +00:00
Frank Ch. Eigler
0e854a2019 * Removing last known memories of tx3904 and am30 sanitization. 1999-01-07 13:06:14 +00:00
Frank Ch. Eigler
9b27cf7bbb * eCos->devo merge; am30 sanitization tags removed
1998-12-29  Frank Ch. Eigler  <fche@cygnus.com>
	* Makefile.in (WITH_COMMON_OBJS): Build also dv-sockser.o.
	* interp.c (sim_open): Add stub mn103002 cache control memory regions.
	Set OPERATING_ENVIRONMENT on "stdeval1" board.
	(mn10300_core_signal): New function to intercept memory errors.
	(program_interrupt): New function to dispatch to exception vector
	(mn10300_exception_*): New functions to snapshot pre/post exception
	state.
	* sim-main.h (SIM_CORE_SIGNAL): Define hook - call mn10300_core_signal.
	(SIM_ENGINE_HALT_HOOK): Do nothing.
	(SIM_CPU_EXCEPTION*): Define hooks to call mn10300_cpu_exception*().
	(_sim_cpu): Add exc_* fields to store register value snapshots.
	* dv-mn103ser.c (*): Support dv-sockser backend for UART I/O.
	Various endianness and warning fixes.
	* mn10300.igen (illegal): Call program_interrupt on error.
	(break): Call program_interrupt on breakpoint
	Several changes from <janczyn@cygnus.com> and <cagney@cygnus.com>
	merged in:
	* dv-mn103int.c (mn103int_ioctl): New function for NMI
	generation. (mn103int_finish): Install it as ioctl handler.
	* dv-mn103tim.c: Support timer 6 specially.  Endianness fixes.
1998-12-30 12:17:10 +00:00
Joyce Janczyn
cf83964e6f Regress yesterday's change to jmp instn implementation in mn10300.igen. 1998-08-26 13:37:56 +00:00
Joyce Janczyn
ef4d20e915 Regress yesterday's change to jmp instruction -- it has deceiving syntax.
Also tidy up some code to match documentation and fix div, divu by 0.
1998-08-26 13:31:38 +00:00
Joyce Janczyn
59587664ab * mn10300.igen (OP_F0F4): Need to load contents of register AN0
for jmp.
1998-08-25 20:49:35 +00:00
Joyce Janczyn
c1802bfd60 * sim-main.h (SIM_HANDLES_LMA): Define SIM_HANDLES_LMA. 1998-08-24 15:52:43 +00:00
Jeff Law
3e20223154 * am33.igen: Detect cases where two operands must not match in
non-DSP instructions.
1998-07-27 18:05:43 +00:00
Joyce Janczyn
a2f93b6758 Fri Jul 24 18:15:21 1998 Joyce Janczyn <janczyn@cygnus.com>
* op_utils.c (do_syscall): Rewrite to use common/syscall.c.
	(syscall_read_mem, syscall_write_mem): New functions for syscall
	callbacks.
	* mn10300_sim.h: Add prototypes for syscall_read_mem and
	syscall_write_mem.
	* mn10300.igen: Change C++ style comments to C style comments.
	Check for divide by zero in div and divu ops.
1998-07-24 22:22:35 +00:00
Jeff Law
6d254a2d5f * am33.igen (translate_xreg): New function. Use it as needed. 1998-07-24 18:50:12 +00:00
Jeff Law
4b6651c925 * am33.igen: Add some missing instructions.
Missed a few last week... Grrr.
1998-07-23 16:31:41 +00:00
Jeff Law
6ae1456eb5 * am33.igen: Autoincrement loads/store fixes. 1998-07-23 16:06:50 +00:00
Jeff Law
0a78550778 * am33.igen: Add most am33 DSP instructions. 1998-07-21 15:50:14 +00:00
Jeff Law
4b987239ea Fix goof. 1998-07-14 03:59:11 +00:00
Jeff Law
080ee2ba75 * am33.igen: Fix Z bit for remaining addc/subc instructions.
Do not sign extend immediate for mov imm,XRn.
        More random mul, mac & div fixes.
        Remove some unused variables.
        Sign extend 24bit displacement in memory addresses.
Whee, more fixes.
1998-07-09 19:41:47 +00:00
Jeff Law
4e86afb85f * mn10300.igen: Fix Z bit for addc and subc instructions.
Minor fixes in multiply/divide patterns.

start-sanitize-am33
        * am33.igen: Fix Z bit for addc Rm,Rn and subc Rm,Rn.  Various
        fixes to 2 register multiply, divide and mac instructions.  Set
        Z,N correctly for sat16.  Sign extend 24 bit immediate for add,
        and sub instructions.

        * am33.igen: Add remaining non-DSP instructions.
end-sanitize-am33
1998-07-09 19:04:22 +00:00
Jeff Law
1f0ba346eb * am33.igen: Add remaining non-DSP instructions.
Lots of work still remains.  PSW handing is probably broken badly and the
mul/mac classes of instructions are probably not handled correctly.
1998-07-09 16:09:24 +00:00
Jeff Law
9c55817e66 * am33.igen (translate_rreg): New function. Use it as appropriate. 1998-07-09 00:24:57 +00:00
Jeff Law
377e53bb6b * am33.igen: More am33 instructions. Fix "div". 1998-07-08 22:33:35 +00:00
Jeff Law
d2b02ab22d * mn10300.igen: Add am33 support. 1998-07-06 22:02:02 +00:00
Jeff Law
135431cd7e * Makefile.in: Use multi-sim to support both a mn10300 and am33
simulator.
1998-07-06 21:57:22 +00:00
Jeff Law
3e75ff7efd * am33.igen: Add many more am33 instructions. 1998-07-06 21:41:06 +00:00
Jeff Law
ee61616c43 Tweak. 1998-07-01 23:15:55 +00:00
Jeff Law
0f7d73858c * am33.igen: New file with some am33 support.
Checking in work-to-date.
1998-07-01 23:13:14 +00:00
Jeff Law
de2adf7070 * mn10300_sim.h (FETCH24): Define.
* mn10300_sim.h: Add defines for some registers found on the AM33.
1998-07-01 23:11:59 +00:00
Jeff Law
a6cbaa652a * mn10300_sim.h: Include bfd.h
(struct state): Add more room for processor specific registers.
start-sanitize-am33
        (REG_E0): Define.
end-sanitize-am33
1998-06-30 17:28:54 +00:00
Joyce Janczyn
5eb78d70cc Thu Jun 25 10:12:03 1998 Joyce Janczyn <janczyn@cygnus.com>
* dv-mn103tim.c: Include sim-assert.h
	* dv-mn103ser.c (do_polling_event): Check for incoming data on
	serial line and schedule next polling event.
	(read_status_reg): schedule events to check for incoming data on
	serial line and issue interrupt if necessary.
1998-06-25 14:17:47 +00:00
Joyce Janczyn
0df90cd8e4 Fri Jun 19 11:59:26 1998 Joyce Janczyn <janczyn@cygnus.com>
* interp.c (board): Rename am32 to stdeval1 as this is the name
	consistently used to refer to the mn1030002 board.
1998-06-19 16:02:51 +00:00
Joyce Janczyn
f0ce242fcd Thu June 18 14:37:14 1998 Joyce Janczyn <janczyn@cygnus.com>
* interp.c (sim_open): Fix typo in address of EXTMD register
	(0x34000280, not 0x3400280).
1998-06-18 18:43:11 +00:00