Alan Modra
211dc24b87
Remove sh5 and sh64 support
...
include/
* dis-asm.h: Remove sh5 and sh64 support.
bfd/
* Makefile.am: Remove sh5 and sh64 support.
* archures.c: Likewise.
* config.bfd: Likewise.
* configure.ac: Likewise.
* cpu-sh.c: Likewise.
* elf32-sh-relocs.h: Likewise.
* elf32-sh.c: Likewise.
* targets.c: Likewise.
* elf32-sh64-com.c: Delete.
* elf32-sh64.c: Delete.
* elf32-sh64.h: Delete.
* elf64-sh64.c: Delete.
* Makefile.in: Regenerate.
* bfd-in2.h: Regenerate.
* configure: Regenerate.
* po/SRC-POTFILES.in: Regenerate.
opcodes/
* Makefile.am: Remove sh5 and sh64 support.
* configure.ac: Likewise.
* disassemble.c: Likewise.
* disassemble.h: Likewise.
* sh-dis.c: Likewise.
* sh64-dis.c: Delete.
* sh64-opc.c: Delete.
* sh64-opc.h: Delete.
* Makefile.in: Regenerate.
* configure: Regenerate.
* po/POTFILES.in: Regenerate.
bintuils/
* testsuite/binutils-all/objcopy.exp: Remove sh5 and sh64 support.
gas/
* Makefile.am: Remove sh5 and sh64 support.
* config/tc-sh.c: Likewise.
* configure.tgt: Likewise.
* doc/Makefile.am: Likewise.
* doc/as.texinfo: Likewise.
* testsuite/gas/cfi/cfi.exp: Likewise.
* testsuite/gas/sh/basic.exp: Likewise.
* config/tc-sh64.c: Delete.
* config/tc-sh64.h: Delete.
* doc/c-sh64.texi: Delete.
* testsuite/gas/sh/sh64/abi-32.d: Delete.
* testsuite/gas/sh/sh64/abi-32.s: Delete.
* testsuite/gas/sh/sh64/abi-64.d: Delete.
* testsuite/gas/sh/sh64/abi-64.s: Delete.
* testsuite/gas/sh/sh64/basic-1.d: Delete.
* testsuite/gas/sh/sh64/basic-1.s: Delete.
* testsuite/gas/sh/sh64/case-1.d: Delete.
* testsuite/gas/sh/sh64/case-1.s: Delete.
* testsuite/gas/sh/sh64/case-noexp-1.d: Delete.
* testsuite/gas/sh/sh64/crange1-1.d: Delete.
* testsuite/gas/sh/sh64/crange1-2.d: Delete.
* testsuite/gas/sh/sh64/crange1.s: Delete.
* testsuite/gas/sh/sh64/crange2-1.d: Delete.
* testsuite/gas/sh/sh64/crange2-2.d: Delete.
* testsuite/gas/sh/sh64/crange2-noexp-1.d: Delete.
* testsuite/gas/sh/sh64/crange2.s: Delete.
* testsuite/gas/sh/sh64/crange3-1.d: Delete.
* testsuite/gas/sh/sh64/crange3.s: Delete.
* testsuite/gas/sh/sh64/crange4-1.d: Delete.
* testsuite/gas/sh/sh64/crange4.s: Delete.
* testsuite/gas/sh/sh64/crange5-1.d: Delete.
* testsuite/gas/sh/sh64/crange5.s: Delete.
* testsuite/gas/sh/sh64/creg-1.d: Delete.
* testsuite/gas/sh/sh64/creg-1.s: Delete.
* testsuite/gas/sh/sh64/creg-2.d: Delete.
* testsuite/gas/sh/sh64/creg-2.s: Delete.
* testsuite/gas/sh/sh64/datal-1.s: Delete.
* testsuite/gas/sh/sh64/datal-2.d: Delete.
* testsuite/gas/sh/sh64/datal-2.s: Delete.
* testsuite/gas/sh/sh64/datal-3.s: Delete.
* testsuite/gas/sh/sh64/datal32-1.d: Delete.
* testsuite/gas/sh/sh64/datal32-3.d: Delete.
* testsuite/gas/sh/sh64/datal64-1.d: Delete.
* testsuite/gas/sh/sh64/datal64-3.d: Delete.
* testsuite/gas/sh/sh64/eh-1.d: Delete.
* testsuite/gas/sh/sh64/eh-1.s: Delete.
* testsuite/gas/sh/sh64/endian-1.d: Delete.
* testsuite/gas/sh/sh64/endian-1.s: Delete.
* testsuite/gas/sh/sh64/endian-2.d: Delete.
* testsuite/gas/sh/sh64/endian-2.s: Delete.
* testsuite/gas/sh/sh64/err-1.s: Delete.
* testsuite/gas/sh/sh64/err-2.s: Delete.
* testsuite/gas/sh/sh64/err-3.s: Delete.
* testsuite/gas/sh/sh64/err-4.s: Delete.
* testsuite/gas/sh/sh64/err-abi-32.s: Delete.
* testsuite/gas/sh/sh64/err-abi-64.s: Delete.
* testsuite/gas/sh/sh64/err-dsp.s: Delete.
* testsuite/gas/sh/sh64/err-movi-noexp-1.s: Delete.
* testsuite/gas/sh/sh64/err-noexp-cmd1.s: Delete.
* testsuite/gas/sh/sh64/err-pt-1.s: Delete.
* testsuite/gas/sh/sh64/err-pt32-cmd1.s: Delete.
* testsuite/gas/sh/sh64/err-pt32-cmd2.s: Delete.
* testsuite/gas/sh/sh64/err-pt32-cmd3.s: Delete.
* testsuite/gas/sh/sh64/err-ptb-1.s: Delete.
* testsuite/gas/sh/sh64/err-ptb-2.s: Delete.
* testsuite/gas/sh/sh64/err.exp: Delete.
* testsuite/gas/sh/sh64/immexpr1.s: Delete.
* testsuite/gas/sh/sh64/immexpr2.s: Delete.
* testsuite/gas/sh/sh64/immexpr32-1.d: Delete.
* testsuite/gas/sh/sh64/immexpr32-2.d: Delete.
* testsuite/gas/sh/sh64/immexpr64-1.d: Delete.
* testsuite/gas/sh/sh64/immexpr64-2.d: Delete.
* testsuite/gas/sh/sh64/lineno.d: Delete.
* testsuite/gas/sh/sh64/lineno.s: Delete.
* testsuite/gas/sh/sh64/localcom-1.d: Delete.
* testsuite/gas/sh/sh64/localcom-1.s: Delete.
* testsuite/gas/sh/sh64/mix-1.d: Delete.
* testsuite/gas/sh/sh64/mix-1.s: Delete.
* testsuite/gas/sh/sh64/mix-noexp-1.d: Delete.
* testsuite/gas/sh/sh64/movi-1.s: Delete.
* testsuite/gas/sh/sh64/movi-2.s: Delete.
* testsuite/gas/sh/sh64/movi-3.d: Delete.
* testsuite/gas/sh/sh64/movi-3.s: Delete.
* testsuite/gas/sh/sh64/movi32-1.d: Delete.
* testsuite/gas/sh/sh64/movi32-2.d: Delete.
* testsuite/gas/sh/sh64/movi32-noexp-2.d: Delete.
* testsuite/gas/sh/sh64/movi64-1.d: Delete.
* testsuite/gas/sh/sh64/movi64-2.d: Delete.
* testsuite/gas/sh/sh64/movi64-2.s: Delete.
* testsuite/gas/sh/sh64/movi64-3.d: Delete.
* testsuite/gas/sh/sh64/movi64-noexp-2.d: Delete.
* testsuite/gas/sh/sh64/pt-1.d: Delete.
* testsuite/gas/sh/sh64/pt-1.s: Delete.
* testsuite/gas/sh/sh64/pt-2.s: Delete.
* testsuite/gas/sh/sh64/pt-noexp-1.d: Delete.
* testsuite/gas/sh/sh64/pt32-1.d: Delete.
* testsuite/gas/sh/sh64/pt32-noexp-2.d: Delete.
* testsuite/gas/sh/sh64/pt64-1.d: Delete.
* testsuite/gas/sh/sh64/pt64-32-1.d: Delete.
* testsuite/gas/sh/sh64/pt64-32-2.d: Delete.
* testsuite/gas/sh/sh64/pt64-noexp-2.d: Delete.
* testsuite/gas/sh/sh64/ptc-1.s: Delete.
* testsuite/gas/sh/sh64/ptc32-1.d: Delete.
* testsuite/gas/sh/sh64/ptc32-noexp-1.d: Delete.
* testsuite/gas/sh/sh64/ptc64-1.d: Delete.
* testsuite/gas/sh/sh64/ptc64-32-1.d: Delete.
* testsuite/gas/sh/sh64/ptc64-noexp-1.d: Delete.
* testsuite/gas/sh/sh64/ptext-1.s: Delete.
* testsuite/gas/sh/sh64/ptext32-1.d: Delete.
* testsuite/gas/sh/sh64/ptext32-noexp-1.d: Delete.
* testsuite/gas/sh/sh64/ptext64-1.d: Delete.
* testsuite/gas/sh/sh64/ptext64-32-1.d: Delete.
* testsuite/gas/sh/sh64/ptext64-noexp-1.d: Delete.
* testsuite/gas/sh/sh64/rel-1.s: Delete.
* testsuite/gas/sh/sh64/rel-2.s: Delete.
* testsuite/gas/sh/sh64/rel-3.s: Delete.
* testsuite/gas/sh/sh64/rel-4.s: Delete.
* testsuite/gas/sh/sh64/rel-5.s: Delete.
* testsuite/gas/sh/sh64/rel32-1.d: Delete.
* testsuite/gas/sh/sh64/rel32-2.d: Delete.
* testsuite/gas/sh/sh64/rel32-3.d: Delete.
* testsuite/gas/sh/sh64/rel32-4.d: Delete.
* testsuite/gas/sh/sh64/rel32-5.d: Delete.
* testsuite/gas/sh/sh64/rel64-1.d: Delete.
* testsuite/gas/sh/sh64/rel64-2.d: Delete.
* testsuite/gas/sh/sh64/rel64-3.d: Delete.
* testsuite/gas/sh/sh64/rel64-4.d: Delete.
* testsuite/gas/sh/sh64/rel64-5.d: Delete.
* testsuite/gas/sh/sh64/relax-1.d: Delete.
* testsuite/gas/sh/sh64/relax-1.s: Delete.
* testsuite/gas/sh/sh64/relax-2.d: Delete.
* testsuite/gas/sh/sh64/relax-2.s: Delete.
* testsuite/gas/sh/sh64/relax-3.d: Delete.
* testsuite/gas/sh/sh64/relax-3.s: Delete.
* testsuite/gas/sh/sh64/sh64.exp: Delete.
* testsuite/gas/sh/sh64/shift-1.s: Delete.
* testsuite/gas/sh/sh64/shift-2.s: Delete.
* testsuite/gas/sh/sh64/shift-3.s: Delete.
* testsuite/gas/sh/sh64/shift32-1.d: Delete.
* testsuite/gas/sh/sh64/shift32-3.d: Delete.
* testsuite/gas/sh/sh64/shift32-noexp-3.d: Delete.
* testsuite/gas/sh/sh64/shift64-1.d: Delete.
* testsuite/gas/sh/sh64/shift64-2.d: Delete.
* testsuite/gas/sh/sh64/shift64-3.d: Delete.
* testsuite/gas/sh/sh64/shift64-noexp-3.d: Delete.
* testsuite/gas/sh/sh64/syntax-1.d: Delete.
* testsuite/gas/sh/sh64/syntax-1.s: Delete.
* testsuite/gas/sh/sh64/syntax-2.d: Delete.
* testsuite/gas/sh/sh64/syntax-2.s: Delete.
* testsuite/gas/sh/sh64/ua-1.s: Delete.
* testsuite/gas/sh/sh64/ua32-1.d: Delete.
* testsuite/gas/sh/sh64/ua64-1.d: Delete.
* Makefile.in: Regenerate.
* doc/Makefile.in: Regenerate.
* po/POTFILES.in: Regenerate.
ld/
* Makefile.am: Remove sh5 and sh64 support.
* configure.tgt: Likewise.
* ldlang.c: Likewise.
* testsuite/ld-elfcomm/elfcomm.exp: Likewise.
* testsuite/ld-gc/gc.exp: Likewise.
* testsuite/ld-gc/pr13683.d: Likewise.
* testsuite/ld-scripts/crossref.exp: Likewise.
* testsuite/ld-selective/selective.exp: Likewise.
* testsuite/ld-sh/ld-r-1.d: Likewise.
* testsuite/ld-sh/rd-sh.exp: Likewise.
* testsuite/ld-sh/sh.exp: Likewise.
* testsuite/ld-srec/srec.exp: Likewise.
* testsuite/ld-undefined/undefined.exp: Likewise.
* emulparams/shelf32.sh: Delete.
* emulparams/shelf32_linux.sh: Delete.
* emulparams/shelf32_nbsd.sh: Delete.
* emulparams/shelf64.sh: Delete.
* emulparams/shelf64_nbsd.sh: Delete.
* emulparams/shlelf32.sh: Delete.
* emulparams/shlelf32_linux.sh: Delete.
* emulparams/shlelf32_nbsd.sh: Delete.
* emulparams/shlelf64.sh: Delete.
* emulparams/shlelf64_nbsd.sh: Delete.
* emultempl/sh64elf.em: Delete.
* testsuite/ld-sh/sh64/abi32.sd: Delete.
* testsuite/ld-sh/sh64/abi32.xd: Delete.
* testsuite/ld-sh/sh64/abi64.sd: Delete.
* testsuite/ld-sh/sh64/abi64.xd: Delete.
* testsuite/ld-sh/sh64/abixx-noexp.sd: Delete.
* testsuite/ld-sh/sh64/cmpct1.sd: Delete.
* testsuite/ld-sh/sh64/cmpct1.xd: Delete.
* testsuite/ld-sh/sh64/crange-1.s: Delete.
* testsuite/ld-sh/sh64/crange-2a.s: Delete.
* testsuite/ld-sh/sh64/crange-2b.s: Delete.
* testsuite/ld-sh/sh64/crange-2c.s: Delete.
* testsuite/ld-sh/sh64/crange-2d.s: Delete.
* testsuite/ld-sh/sh64/crange-2e.s: Delete.
* testsuite/ld-sh/sh64/crange-2f.s: Delete.
* testsuite/ld-sh/sh64/crange-2g.s: Delete.
* testsuite/ld-sh/sh64/crange-2h.s: Delete.
* testsuite/ld-sh/sh64/crange-2i.s: Delete.
* testsuite/ld-sh/sh64/crange1.rd: Delete.
* testsuite/ld-sh/sh64/crange2.rd: Delete.
* testsuite/ld-sh/sh64/crange3-cmpct.rd: Delete.
* testsuite/ld-sh/sh64/crange3-media.rd: Delete.
* testsuite/ld-sh/sh64/crange3.dd: Delete.
* testsuite/ld-sh/sh64/crange3.rd: Delete.
* testsuite/ld-sh/sh64/crangerel1.rd: Delete.
* testsuite/ld-sh/sh64/crangerel2.rd: Delete.
* testsuite/ld-sh/sh64/dlsection-1.s: Delete.
* testsuite/ld-sh/sh64/dlsection.sd: Delete.
* testsuite/ld-sh/sh64/endian.dbd: Delete.
* testsuite/ld-sh/sh64/endian.dld: Delete.
* testsuite/ld-sh/sh64/endian.ld: Delete.
* testsuite/ld-sh/sh64/endian.s: Delete.
* testsuite/ld-sh/sh64/endian.sbd: Delete.
* testsuite/ld-sh/sh64/endian.sld: Delete.
* testsuite/ld-sh/sh64/gotplt.d: Delete.
* testsuite/ld-sh/sh64/gotplt.map: Delete.
* testsuite/ld-sh/sh64/gotplt.s: Delete.
* testsuite/ld-sh/sh64/init-cmpct.d: Delete.
* testsuite/ld-sh/sh64/init-media.d: Delete.
* testsuite/ld-sh/sh64/init.s: Delete.
* testsuite/ld-sh/sh64/init64.d: Delete.
* testsuite/ld-sh/sh64/mix1-noexp.sd: Delete.
* testsuite/ld-sh/sh64/mix1.sd: Delete.
* testsuite/ld-sh/sh64/mix1.xd: Delete.
* testsuite/ld-sh/sh64/mix2-noexp.sd: Delete.
* testsuite/ld-sh/sh64/mix2.sd: Delete.
* testsuite/ld-sh/sh64/mix2.xd: Delete.
* testsuite/ld-sh/sh64/rd-sh64.exp: Delete.
* testsuite/ld-sh/sh64/rel-1.s: Delete.
* testsuite/ld-sh/sh64/rel-2.s: Delete.
* testsuite/ld-sh/sh64/rel32.xd: Delete.
* testsuite/ld-sh/sh64/rel64.xd: Delete.
* testsuite/ld-sh/sh64/relax.exp: Delete.
* testsuite/ld-sh/sh64/relax1.s: Delete.
* testsuite/ld-sh/sh64/relax2.s: Delete.
* testsuite/ld-sh/sh64/relax3.s: Delete.
* testsuite/ld-sh/sh64/relax4.s: Delete.
* testsuite/ld-sh/sh64/reldl-1.s: Delete.
* testsuite/ld-sh/sh64/reldl-2.s: Delete.
* testsuite/ld-sh/sh64/reldl32.rd: Delete.
* testsuite/ld-sh/sh64/reldl64.rd: Delete.
* testsuite/ld-sh/sh64/relfail.exp: Delete.
* testsuite/ld-sh/sh64/relfail.s: Delete.
* testsuite/ld-sh/sh64/sh64-1.s: Delete.
* testsuite/ld-sh/sh64/sh64-2.s: Delete.
* testsuite/ld-sh/sh64/sh64.exp: Delete.
* testsuite/ld-sh/sh64/shcmp-1.s: Delete.
* testsuite/ld-sh/sh64/shdl-1.s: Delete.
* testsuite/ld-sh/sh64/shdl-2.s: Delete.
* testsuite/ld-sh/sh64/shdl32.xd: Delete.
* testsuite/ld-sh/sh64/shdl64.sd: Delete.
* testsuite/ld-sh/sh64/shdl64.xd: Delete.
* testsuite/ld-sh/sh64/shmix-1.s: Delete.
* testsuite/ld-sh/sh64/shmix-2.s: Delete.
* testsuite/ld-sh/sh64/shmix-3.s: Delete.
* testsuite/ld-sh/sh64/stobin-0-dso.d: Delete.
* testsuite/ld-sh/sh64/stobin-1.d: Delete.
* testsuite/ld-sh/sh64/stobin.s: Delete.
* testsuite/ld-sh/sh64/stolib.s: Delete.
* Makefile.in: Regenerate.
* po/BLD-POTFILES.in: Regenerate.
2018-04-16 15:29:39 +09:30
Alan Modra
219d1afa89
Update year range in copyright notice of binutils files
2018-01-03 17:49:56 +10:30
Ravi Bangoria
0f6329bd7f
binutils/objdump: Fix disassemble for huge elf sections
...
When elf section size is beyond unsigned int max value, objdump fails
to disassemble from that section. Ex on PowerPC,
$ objdump -h /proc/kcore
Idx Name Size VMA
4 load2 100000000 c000000000000000
Here, size of load2 section is 0x100000000. Also note that, 0xc00....
address range is kernel space for PowerPC. Now let's try to disassemble
do_sys_open() using /proc/kcore.
$ cat /proc/kallsyms | grep -A1 -w do_sys_open
c00000000036c000 T do_sys_open
c00000000036c2d0 T SyS_open
Before patch:
$ objdump -d --start-address=0xc00000000036c000 --stop-address=0xc00000000036c2d0 /proc/kcore
/proc/kcore: file format elf64-powerpcle
Disassembly of section load2:
c00000000036c000 <load2+0x36c000>:
c00000000036c000: Address 0xc00000000036c000 is out of bounds.
Fix this by changing type of 'buffer_length' from unsigned int to
size_t. After patch:
$ objdump -d --start-address=0xc00000000036c000 --stop-address=0xc00000000036c2d0 /proc/kcore
/proc/kcore: file format elf64-powerpcle
Disassembly of section load2:
c00000000036c000 <load2+0x36c000>:
c00000000036c000: fc 00 4c 3c addis r2,r12,252
c00000000036c004: 00 53 42 38 addi r2,r2,21248
c00000000036c008: a6 02 08 7c mflr r0
include/
* dis-asm.h (struct disassemble_info): Change type of buffer_length
field to size_t.
opcodes/
* dis-buf.c (buffer_read_memory): Change type of end_addr_offset,
max_addr_offset and octets variables to size_t.
2017-07-14 22:51:01 +09:30
Yao Qi
6394c60699
Don't use print_insn_XXX in GDB
...
This is a follow-up to
[PATCH 0/6] Unify the disassembler selection in gdb and objdump
https://sourceware.org/ml/binutils/2017-05/msg00192.html
that is, opcodes is able to select the right disassembler, so gdb
doesn't have to select them. Instead, gdb can just use
default_print_insn. As a result, these print_insn_XXX are not used
out of opcodes, so this patch also moves their declarations from
include/dis-asm.h to opcodes/disassemble.h. With this change,
GDB doesn't use any print_insn_XXX directly any more.
gdb:
2017-06-14 Yao Qi <yao.qi@linaro.org>
* aarch64-tdep.c (aarch64_gdb_print_insn): Call
default_print_insn instead of print_insn_aarch64.
* arm-tdep.c (gdb_print_insn_arm): Call
default_print_insn instead of print_insn_big_arm
and print_insn_little_arm.
* i386-tdep.c (i386_print_insn): Call default_print_insn
instead of print_insn_i386.
* ia64-tdep.c (ia64_print_insn): Call
default_print_insn instead of print_insn_ia64.
* mips-tdep.c (gdb_print_insn_mips): Call
default_print_insn instead of print_insn_big_mips
and print_insn_little_mips.
* spu-tdep.c (gdb_print_insn_spu): Call default_print_insn
instead of print_insn_spu.
include:
2017-06-14 Yao Qi <yao.qi@linaro.org>
* dis-asm.h (print_insn_aarch64): Move it to opcodes/disassemble.h.
(print_insn_big_arm, print_insn_big_mips): Likewise.
(print_insn_i386, print_insn_ia64): Likewise.
(print_insn_little_arm, print_insn_little_mips): Likewise.
(print_insn_spu): Likewise.
opcodes:
2017-06-14 Yao Qi <yao.qi@linaro.org>
* aarch64-dis.c: Include disassemble.h instead of dis-asm.h.
* arm-dis.c: Likewise.
* ia64-dis.c: Likewise.
* mips-dis.c: Likewise.
* spu-dis.c: Likewise.
* disassemble.h (print_insn_aarch64): New declaration, moved from
include/dis-asm.h.
(print_insn_big_arm, print_insn_big_mips): Likewise.
(print_insn_i386, print_insn_ia64): Likewise.
(print_insn_little_arm, print_insn_little_mips): Likewise.
2017-06-14 16:29:01 +01:00
Yao Qi
88c1242dc0
Move print_insn_XXX to an opcodes internal header
...
With the changes done in previous patches, print_insn_XXX functions
don't have to be external visible out of opcodes, because both gdb
and objdump select disassemblers through a single interface.
This patch moves these print_insn_XXX declarations from
include/dis-asm.h to opcodes/disassemble.h, which is a new header
added by this patch.
include:
2017-05-24 Yao Qi <yao.qi@linaro.org>
* dis-asm.h: Move some function declarations to
opcodes/disassemble.h.
opcodes:
2017-05-24 Yao Qi <yao.qi@linaro.org>
* alpha-dis.c: Include disassemble.h, don't include
dis-asm.h.
* avr-dis.c, bfin-dis.c, cr16-dis.c: Likewise.
* crx-dis.c, d10v-dis.c, d30v-dis.c: Likewise.
* disassemble.c, dlx-dis.c, epiphany-dis.c: Likewise.
* fr30-dis.c, ft32-dis.c, h8300-dis.c, h8500-dis.c: Likewise.
* hppa-dis.c, i370-dis.c, i386-dis.c: Likewise.
* i860-dis.c, i960-dis.c, ip2k-dis.c: Likewise.
* iq2000-dis.c, lm32-dis.c, m10200-dis.c: Likewise.
* m10300-dis.c, m32r-dis.c, m68hc11-dis.c: Likewise.
* m68k-dis.c, m88k-dis.c, mcore-dis.c: Likewise.
* metag-dis.c, microblaze-dis.c, mmix-dis.c: Likewise.
* moxie-dis.c, msp430-dis.c, mt-dis.c:
* nds32-dis.c, nios2-dis.c, ns32k-dis.c: Likewise.
* or1k-dis.c, pdp11-dis.c, pj-dis.c: Likewise.
* ppc-dis.c, pru-dis.c, riscv-dis.c: Likewise.
* rl78-dis.c, s390-dis.c, score-dis.c: Likewise.
* sh-dis.c, sh64-dis.c, tic30-dis.c: Likewise.
* tic4x-dis.c, tic54x-dis.c, tic6x-dis.c: Likewise.
* tic80-dis.c, tilegx-dis.c, tilepro-dis.c: Likewise.
* v850-dis.c, vax-dis.c, visium-dis.c: Likewise.
* w65-dis.c, wasm32-dis.c, xc16x-dis.c: Likewise.
* xgate-dis.c, xstormy16-dis.c, xtensa-dis.c: Likewise.
* z80-dis.c, z8k-dis.c: Likewise.
* disassemble.h: New file.
2017-05-24 17:23:52 +01:00
Yao Qi
003ca0fd22
Refactor disassembler selection
...
Nowadays, opcodes/disassemble.c:disassembler selects the proper
disassembler according to ABFD only. However, it actually
selects disassemblers according to arch, mach, endianess, and
abfd. This patch adds them to the parameters of disassembler,
so that its caller can still select disassemblers in case that
abfd is NULL (a typical case in GDB).
There isn't any functionality change.
binutils:
2017-05-24 Yao Qi <yao.qi@linaro.org>
* objdump.c (disassemble_data): Caller update.
include:
2017-05-24 Yao Qi <yao.qi@linaro.org>
* dis-asm.h (disassembler): Update declaration.
opcodes:
2017-05-24 Yao Qi <yao.qi@linaro.org>
* disassemble.c (disassembler): Add arguments a, big and mach.
Use them.
sim/common:
2017-05-24 Yao Qi <yao.qi@linaro.org>
* sim-trace.c (trace_disasm): Caller update.
2017-05-24 17:23:52 +01:00
Pip Cet
62ecb94c4a
Add support for disassembling WebAssembly opcodes.
...
include * dis-asm.h: Add prototypes for wasm32 disassembler.
opcodes * Makefile.am: Add wasm32-dis.c.
* configure.ac: Add wasm32-dis.c to wasm32 target.
* disassemble.c: Add wasm32 disassembler code.
* wasm32-dis.c: New file.
* Makefile.in: Regenerate.
* configure: Regenerate.
* po/POTFILES.in: Regenerate.
* po/opcodes.pot: Regenerate.
gas * testsuite/gas/wasm32/allinsn.d: Adjust test for disassembler
changes.
* testsuite/gas/wasm32/disass.d: New test.
* testsuite/gas/wasm32/disass.s: New test.
* testsuite/gas/wasm32/disass-2.d: New test.
* testsuite/gas/wasm32/disass-2.s: New test.
* testsuite/gas/wasm32/reloc.d: Adjust test for changed reloc
names.
* testsuite/gas/wasm32/reloc.s: Update test for changed assembler
syntax.
* testsuite/gas/wasm32/wasm32.exp: Run new tests. Expect allinsn
test to succeed.
2017-04-06 17:20:02 +01:00
Pedro Alves
f995bbe8e6
-Wwrite-strings: Constify struct disassemble_info's disassembler_options field
...
The memory disassemble_info::disassembler_options points to is always
owned by the client. I.e., that field is an non-owning, observing
pointer. Thus const makes sense.
Are the include/ and opcodes/ bits OK?
Tested on x86_64 Fedora 23, built with --enable-targets=all.
include/ChangeLog:
2017-04-05 Pedro Alves <palves@redhat.com>
* dis-asm.h (disassemble_info) <disassembler_options>: Now a
"const char *".
(next_disassembler_option): Constify.
opcodes/ChangeLog:
2017-04-05 Pedro Alves <palves@redhat.com>
* arc-dis.c (parse_option, parse_disassembler_options): Constify.
* arm-dis.c (parse_arm_disassembler_options): Constify.
* ppc-dis.c (powerpc_init_dialect): Constify local.
* vax-dis.c (parse_disassembler_options): Constify.
gdb/ChangeLog:
2017-04-05 Pedro Alves <palves@redhat.com>
* arm-tdep.c (show_disassembly_style_sfunc): Constify local.
* disasm.c (set_disassembler_options): Constify local.
* i386-tdep.c (i386_print_insn): Remove cast and FIXME comment.
2017-04-05 19:21:33 +01:00
Peter Bergner
65b48a8140
GDB: Add support for the new set/show disassembler-options commands.
...
This commit adds support to GDB so that it can modify the disassembler-options
value that is passed to the disassembler, similar to objdump's -M option.
Currently, the only supported targets are ARM, PowerPC and S/390, but
adding support for a new target(s) is not difficult.
include/
* dis-asm.h (disasm_options_t): New typedef.
(parse_arm_disassembler_option): Remove prototype.
(set_arm_regname_option): Likewise.
(get_arm_regnames): Likewise.
(get_arm_regname_num_options): Likewise.
(disassemble_init_s390): New prototype.
(disassembler_options_powerpc): Likewise.
(disassembler_options_arm): Likewise.
(disassembler_options_s390): Likewise.
(remove_whitespace_and_extra_commas): Likewise.
(disassembler_options_cmp): Likewise.
(next_disassembler_option): New inline function.
(FOR_EACH_DISASSEMBLER_OPTION): New macro.
opcodes/
* disassemble.c Include "safe-ctype.h".
(disassemble_init_for_target): Handle s390 init.
(remove_whitespace_and_extra_commas): New function.
(disassembler_options_cmp): Likewise.
* arm-dis.c: Include "libiberty.h".
(NUM_ELEM): Delete.
(regnames): Use long disassembler style names.
Add force-thumb and no-force-thumb options.
(NUM_ARM_REGNAMES): Rename from this...
(NUM_ARM_OPTIONS): ...to this. Use ARRAY_SIZE.
(get_arm_regname_num_options): Delete.
(set_arm_regname_option): Likewise.
(get_arm_regnames): Likewise.
(parse_disassembler_options): Likewise.
(parse_arm_disassembler_option): Rename from this...
(parse_arm_disassembler_options): ...to this. Make static.
Use new FOR_EACH_DISASSEMBLER_OPTION macro to scan over options.
(print_insn): Use parse_arm_disassembler_options.
(disassembler_options_arm): New function.
(print_arm_disassembler_options): Handle updated regnames.
* ppc-dis.c: Include "libiberty.h".
(ppc_opts): Add "32" and "64" entries.
(ppc_parse_cpu): Use ARRAY_SIZE and disassembler_options_cmp.
(powerpc_init_dialect): Add break to switch statement.
Use new FOR_EACH_DISASSEMBLER_OPTION macro.
(disassembler_options_powerpc): New function.
(print_ppc_disassembler_options): Use ARRAY_SIZE.
Remove printing of "32" and "64".
* s390-dis.c: Include "libiberty.h".
(init_flag): Remove unneeded variable.
(struct s390_options_t): New structure type.
(options): New structure.
(init_disasm): Rename from this...
(disassemble_init_s390): ...to this. Add initializations for
current_arch_mask and option_use_insn_len_bits_p. Remove init_flag.
(print_insn_s390): Delete call to init_disasm.
(disassembler_options_s390): New function.
(print_s390_disassembler_options): Print using information from
struct 'options'.
* po/opcodes.pot: Regenerate.
binutils/
* objdump.c (main): Use remove_whitespace_and_extra_commas.
gdb/
* NEWS: Mention new set/show disassembler-options commands.
* doc/gdb.texinfo: Document new set/show disassembler-options commands.
* disasm.c: Include "arch-utils.h", "gdbcmd.h" and "safe-ctype.h".
(prospective_options): New static variable.
(gdb_disassembler::gdb_disassembler): Initialize
m_di.disassembler_options.
(gdb_buffered_insn_length_init_dis): Initilize di->disassembler_options.
(get_disassembler_options): New function.
(set_disassembler_options): Likewise.
(set_disassembler_options_sfunc): Likewise.
(show_disassembler_options_sfunc): Likewise.
(disassembler_options_completer): Likewise.
(_initialize_disasm): Likewise.
* disasm.h (get_disassembler_options): New prototype.
(set_disassembler_options): Likewise.
* gdbarch.sh (gdbarch_disassembler_options): New variable.
(gdbarch_verify_disassembler_options): Likewise.
* gdbarch.c: Regenerate.
* gdbarch.h: Likewise.
* arm-tdep.c (num_disassembly_options): Delete.
(set_disassembly_style): Likewise.
(arm_disassembler_options): New static variable.
(set_disassembly_style_sfunc): Convert short style name into long
option name. Call set_disassembler_options.
(show_disassembly_style_sfunc): New function.
(arm_gdbarch_init): Call set_gdbarch_disassembler_options and
set_gdbarch_verify_disassembler_options.
(_initialize_arm_tdep): Delete regnames variable and update callers.
(arm_disassembler_options): Initialize.
(disasm_options): New variable.
(num_disassembly_options): Rename from this...
(num_disassembly_styles): ...to this. Compute by scanning through
disasm_options.
(valid_disassembly_styles): Initialize using disasm_options.
Remove calls to parse_arm_disassembler_option, get_arm_regnames and
set_arm_regname_option.
Pass show_disassembly_style_sfunc to the "disassembler" setshow command.
* rs6000-tdep.c (powerpc_disassembler_options): New static variable.
(rs6000_gdbarch_init): Call set_gdbarch_disassembler_options and
set_gdbarch_verify_disassembler_options.
* s390-tdep.c (s390_disassembler_options): New static variable.
(s390_gdbarch_init):all set_gdbarch_disassembler_options and
set_gdbarch_verify_disassembler_options.
gdb/testsuite/
* gdb.arch/powerpc-power.exp: Delete test.
* gdb.arch/powerpc-power.s: Likewise.
* gdb.disasm/disassembler-options.exp: New test.
* gdb.arch/powerpc-altivec.exp: Likewise.
* gdb.arch/powerpc-altivec.s: Likewise.
* gdb.arch/powerpc-altivec2.exp: Likewise.
* gdb.arch/powerpc-altivec2.s: Likewise.
* gdb.arch/powerpc-altivec3.exp: Likewise.
* gdb.arch/powerpc-altivec3.s: Likewise.
* gdb.arch/powerpc-power7.exp: Likewise.
* gdb.arch/powerpc-power7.s: Likewise.
* gdb.arch/powerpc-power8.exp: Likewise.
* gdb.arch/powerpc-power8.s: Likewise.
* gdb.arch/powerpc-power9.exp: Likewise.
* gdb.arch/powerpc-power9.s: Likewise.
* gdb.arch/powerpc-vsx.exp: Likewise.
* gdb.arch/powerpc-vsx.s: Likewise.
* gdb.arch/powerpc-vsx2.exp: Likewise.
* gdb.arch/powerpc-vsx2.s: Likewise.
* gdb.arch/powerpc-vsx3.exp: Likewise.
* gdb.arch/powerpc-vsx3.s: Likewise.
* gdb.arch/arm-disassembler-options.exp: Likewise.
* gdb.arch/powerpc-disassembler-options.exp: Likewise.
* gdb.arch/s390-disassembler-options.exp: Likewise.
2017-02-28 12:32:07 -06:00
Alan Modra
2571583aed
Update year range in copyright notice of all files.
2017-01-02 14:08:56 +10:30
Dimitar Dimitrov
889294f6ff
PRU BFD support
...
include/
* elf/common.h: Add PRU ELF.
* elf/pru.h: New file.
* opcode/pru.h: New file.
* dis-asm.h (print_insn_pru): Declare.
bfd/
* archures.c: Add bfd_arch_pru.
* Makefile.am: Add PRU target.
* config.bfd: Ditto.
* configure.ac: Ditto.
* elf-bfd.h (enum elf_target_id): Add PRU_ELF_DATA.
* targets.c: Add pru_elf32_vec.
* reloc.c: Add PRU relocations.
* cpu-pru.c: New file.
* elf32-pru.c: New file.
* Makefile.in: Regenerate.
* configure: Regenerate.
* po/SRC-POTFILES.in: Regenerate.
* bfd-in2.h: Regenerate
* libbfd.h: Regenerate.
Signed-off-by: Dimitar Dimitrov <dimitar@dinux.eu>
2016-12-31 12:02:09 +10:30
Nick Clifton
e23eba971d
Add support for RISC-V architecture.
...
bfd * Makefile.am: Add entries for riscv32-elf and riscv64-elf.
* config.bdf: Likewise.
* configure.ac: Likewise.
* Makefile.in: Regenerate.
* configure: Regenerate.
* archures.c: Add bfd_riscv_arch.
* reloc.c: Add riscv relocs.
* targets.c: Add riscv_elf32_vec and riscv_elf64_vec.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
* elf-bfd.h: Add RISCV_ELF_DATA to enum elf_target_id.
* elfnn-riscv.c: New file.
* elfxx-riscv.c: New file.
* elfxx-riscv.h: New file.
binutils* readelf.c (guess_is_rela): Add EM_RISCV.
(get_machine_name): Likewise.
(dump_relocations): Add support for riscv relocations.
(get_machine_flags): Add support for riscv flags.
(is_32bit_abs_reloc): Add R_RISCV_32.
(is_64bit_abs_reloc): Add R_RISCV_64.
(is_none_reloc): Add R_RISCV_NONE.
* testsuite/binutils-all/objdump.exp (cpus_expected): Add riscv.
Expect the debug_ranges test to fail.
gas * Makefile.am: Add riscv files.
* Makefile.in: Regenerate.
* NEWS: Mention the support for this architecture.
* configure.in: Define a default architecture.
* configure: Regenerate.
* configure.tgt: Add entries for riscv.
* doc/as.texinfo: Likewise.
* testsuite/gas/all/gas.exp: Expect the redef tests to fail.
* testsuite/gas/elf/elf.exp: Expect the groupauto tests to fail.
* config/tc-riscv.c: New file.
* config/tc-riscv.h: New file.
* doc/c-riscv.texi: New file.
* testsuite/gas/riscv: New directory.
* testsuite/gas/riscv/riscv.exp: New file.
* testsuite/gas/riscv/t_insns.d: New file.
* testsuite/gas/riscv/t_insns.s: New file.
ld * Makefile.am: Add riscv files.
* Makefile.in: Regenerate.
* NEWS: Mention the support for this target.
* configure.tgt: Add riscv entries.
* emulparams/elf32lriscv-defs.sh: New file.
* emulparams/elf32lriscv.sh: New file.
* emulparams/elf64lriscv-defs.sh: New file.
* emulparams/elf64lriscv.sh: New file.
* emultempl/riscvelf.em: New file.
opcodes * configure.ac: Add entry for bfd_riscv_arch.
* configure: Regenerate.
* disassemble.c (disassembler): Add support for riscv.
(disassembler_usage): Likewise.
* riscv-dis.c: New file.
* riscv-opc.c: New file.
include * dis-asm.h: Add prototypes for print_insn_riscv and
print_riscv_disassembler_options.
* elf/riscv.h: New file.
* opcode/riscv-opc.h: New file.
* opcode/riscv.h: New file.
2016-11-01 16:45:57 +00:00
Claudiu Zissulescu
37fd5ef3ec
Add support to the ARC disassembler for selecting instruction classes.
...
gas * testsuite/gas/arc/dsp.d: New file.
* testsuite/gas/arc/dsp.s: Likewise.
* testsuite/gas/arc/fpu.d: Likewise.
* testsuite/gas/arc/fpu.s: Likewise.
* testsuite/gas/arc/ext2op.d: Add specific disassembler option.
* testsuite/gas/arc/ext3op.d: Likewise.
* testsuite/gas/arc/tdpfp.d: Likewise.
* testsuite/gas/arc/tfpuda.d: Likewise.
opcodes * arc-dis.c (skipclass): New structure.
(decodelist): New variable.
(is_compatible_p): New function.
(new_element): Likewise.
(skip_class_p): Likewise.
(find_format_from_table): Use skip_class_p function.
(find_format): Decode first the extension instructions.
(print_insn_arc): Select either ARCEM or ARCHS based on elf
e_flags.
(parse_option): New function.
(parse_disassembler_options): Likewise.
(print_arc_disassembler_options): Likewise.
(print_insn_arc): Use parse_disassembler_options function. Proper
select ARCv2 cpu variant.
* disassemble.c (disassembler_usage): Add ARC disassembler
options.
binutils* doc/binutils.texi (objdump): Add ARC disassembler options.
* testsuite/binutils-all/arc/dsp.s: New file.
* testsuite/binutils-all/arc/objdump.exp: Likewise.
include * dis-asm.h: Declare print_arc_disassembler_options.
2016-07-20 17:08:07 +01:00
Alan Modra
6f2750feaf
Copyright update for binutils
2016-01-01 23:00:01 +10:30
Nick Clifton
886a250647
New ARC implementation.
...
bfd * archures.c: Remove support for older ARC. Added support for new
ARC cpus (ARC600, ARC601, ARC700, ARCV2).
* bfd-in2.h: Likewise.
* config.bfd: Likewise.
* cpu-arc.c: Likewise.
* elf32-arc.c: Totally changed file with a refactored
inplementation of the ARC port.
* libbfd.h: Added ARC specific relocation types.
* reloc.c: Likewise.
gas * config/tc-arc.c: Revamped file for ARC support.
* config/tc-arc.h: Likewise.
* doc/as.texinfo: Add new ARC options.
* doc/c-arc.texi: Likewise.
ld * configure.tgt: Added target arc-*-elf* and arc*-*-linux-uclibc*.
* emulparams/arcebelf_prof.sh: New file
* emulparams/arcebelf.sh: Likewise.
* emulparams/arceblinux_prof.sh: Likewise.
* emulparams/arceblinux.sh: Likewise.
* emulparams/arcelf_prof.sh: Likewise.
* emulparams/arcelf.sh: Likewise.
* emulparams/arclinux_prof.sh: Likewise.
* emulparams/arclinux.sh: Likewise.
* emulparams/arcv2elfx.sh: Likewise.
* emulparams/arcv2elf.sh: Likewise.
* emultempl/arclinux.em: Likewise.
* scripttempl/arclinux.sc: Likewise.
* scripttempl/elfarc.sc: Likewise.
* scripttempl/elfarcv2.sc: Likewise
* Makefile.am: Add new ARC emulations.
* Makefile.in: Regenerate.
* NEWS: Mention the new feature.
opcodes * arc-dis.c: Revamped file for ARC support
* arc-dis.h: Likewise.
* arc-ext.c: Likewise.
* arc-ext.h: Likewise.
* arc-opc.c: Likewise.
* arc-fxi.h: New file.
* arc-regs.h: Likewise.
* arc-tbl.h: Likewise.
binutils * readelf.c (get_machine_name): Remove A5 reference. Add ARCompact
and ARCv2.
(get_machine_flags): Handle EM_ARCV2 and EM_ARCOMPACT.
(guess_is_rela): Likewise.
(dump_relocations): Likewise.
(is_32bit_abs_reloc): Likewise.
(is_16bit_abs_reloc): Likewise.
(is_none_reloc): Likewise.
* NEWS: Mention the new feature.
include * dis-asm.h (arc_get_disassembler): Correct declaration.
* arc-reloc.def: Macro file with definition of all relocation
types.
* arc.h: Changed macros for the newly supported ARC cpus. Altered
enum defining the supported relocations.
* common.h: Changed EM_ARC_A5 definition to EM_ARC_COMPACT. Added
macro for EM_ARC_COMPACT2.
* arc-func.h: New file.
* arc.h: Likewise.
2015-10-07 14:20:19 +01:00
Nick Clifton
bdc4de1b24
Stop "objdump -d" from disassembling past a symbolic address.
...
include * dis-asm.h (struct disassemble_info): Add stop_vma field.
binuti * objdump.c (disassemble_bytes): Set the stop_vma field in the
disassemble_info structure when disassembling code sections with
-d.
* doc/binutils.texi (objdump): Document the discrepancy between -d
and -D.
opcodes * dis-buf.c (buffer_read_memory): Fail is stop_vma is set and the
requested region lies beyond it.
* bfin-dis.c (print_insn_bfin): Ignore sysop instructions when
looking for 32-bit insns.
* mcore-dis.c (print_insn_mcore): Disable stop_vma when reading
data.
* sh-dis.c (print_insn_sh): Likewise.
* tic6x-dis.c (print_insn_tic6x): Disable stop_vma when reading
blocks of instructions.
* vax-dis.c (print_insn_vax): Check that the requested address
does not clash with the stop_vma.
tests * gas/arm/backslash-at.s: Add extra .byte directives so that the
foo symbol does not appear to point half way through an
instruction.
* gas/arm/backslash-at.d: Update expected disassembly.
* gas/i386/ilp32/x86-64-opcode-inval-intel.d: Likewise.
* gas/i386/ilp32/x86-64-opcode-inval.d: Likewise.
* gas/i386/x86-64-opcode-inval-intel.d: Likewise.
* gas/i386/x86-64-opcode-inval.d: Likewise.
2015-06-22 16:53:27 +01:00
DJ Delorie
0952813b0b
Make RL78 disassembler and simulator respect ISA for mul/div
...
[gas]
* config/rl78-defs.h (rl78_isa_g10): New.
(rl78_isa_g13): New.
(rl78_isa_g14): New.
* config/rl78-parse.y (ISA_G10): New.
(ISA_G13): New.
(ISA_G14): New.
(MULHU, MULH, MULU, DIVHU, DIVWU, MACHU, MACH): Use them.
* config/tc-rl78.c (rl78_isa_g10): New.
(rl78_isa_g13): New.
(rl78_isa_g14): New.
[gdb]
* rl78-tdep.c (rl78_analyze_prologue): Pass RL78_ISA_DEFAULT to
rl78_decode_opcode
[include]
* dis-asm.h (print_insn_rl78_g10): New.
(print_insn_rl78_g13): New.
(print_insn_rl78_g14): New.
(rl78_get_disassembler): New.
* opcode/rl78.h (RL78_Dis_Isa): New.
(rl78_decode_opcode): Add ISA parameter.
[opcodes]
* disassemble.c (disassembler): Choose suitable disassembler based
on E_ABI.
* rl78-decode.opc (rl78_decode_opcode): Take ISA parameter. Use
it to decode mul/div insns.
* rl78-decode.c: Regenerate.
* rl78-dis.c (print_insn_rl78): Rename to...
(print_insn_rl78_common): ...this, take ISA parameter.
(print_insn_rl78): New.
(print_insn_rl78_g10): New.
(print_insn_rl78_g13): New.
(print_insn_rl78_g14): New.
(rl78_get_disassembler): New.
[sim]
* rl78/cpu.c (g14_multiply): New.
* rl78/cpu.h (g14_multiply): New.
* rl78/load.c (rl78_load): Decode ISA completely.
* rl78/main.c (main): Expand -M to include other ISAs.
* rl78/rl78.c (decode_opcode): Decode based on ISA.
* rl78/trace.c (rl78_disasm_fn): New.
(sim_disasm_init): Reset it.
(sim_disasm_one): Get correct disassembler for ISA.
2015-04-30 15:25:49 -04:00
Alan Modra
3f8107ab38
FT32 initial support
...
FT32 is a new 32-bit RISC core developed by FTDI for embedded applications.
* configure.ac: Add FT32 support.
* configure: Regenerate.
bfd/
* Makefile.am: Add FT32 files.
* archures.c (enum bfd_architecture): Add bfd_arch_ft32.
(bfd_mach_ft32): Define.
(bfd_ft32_arch): Declare.
(bfd_archures_list): Add bfd_ft32_arch.
* config.bfd: Handle FT32.
* configure.ac: Likewise.
* cpu-ft32.c: New file.
* elf32-ft32.c: New file.
* reloc.c (BFD_RELOC_FT32_10, BFD_RELOC_FT32_20, BFD_RELOC_FT32_17,
BFD_RELOC_FT32_18): Define.
* targets.c (_bfd_target_vector): Add ft32_elf32_vec.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
* Makefile.in: Regenerate.
* configure: Regenerate.
* po/SRC-POTFILES.in: Regenerate.
binutils/
* readelf.c: Add FT32 support.
gas/
* Makefile.am: Add FT32 files.
* config/tc-ft32.c: New file.
* config/tc-ft32.h: New file.
* configure.tgt: Add FT32 support.
* Makefile.in: Regenerate.
* po/POTFILES.in: Regenerate.
gas/testsuite/
* gas/ft32/ft32.exp: New file.
* gas/ft32/insn.d: New file.
* gas/ft32/insn.s: New file.
include/
* dis-asm.h (print_insn_ft32): Declare.
include/elf/
* common.h (EM_FT32): Define.
* ft32.h: New file.
include/opcode/
* ft32.h: New file.
ld/
* Makefile.am: Add FT32 files.
* configure.tgt: Handle FT32 target.
* emulparams/elf32ft32.sh: New file.
* scripttempl/ft32.sc: New file.
* Makefile.in: Regenerate.
opcodes/
* Makefile.am: Add FT32 files.
* configure.ac: Handle FT32.
* disassemble.c (disassembler): Call print_insn_ft32.
* ft32-dis.c: New file.
* ft32-opc.c: New file.
* Makefile.in: Regenerate.
* configure: Regenerate.
* po/POTFILES.in: Regenerate.
2015-01-28 16:25:18 +10:30
Alan Modra
b90efa5b79
ChangeLog rotatation and copyright year update
2015-01-02 00:53:45 +10:30
Eric Botcazou
1945cfa59d
Add Visium support to opcodes
...
include/
* dis-asm.h (print_insn_visium): Declare.
include/opcode/
* visium.h: New file.
opcodes/
* configure.ac: Add Visium support.
* configure: Regenerate.
* Makefile.am (TARGET_LIBOPCODES_CFILES): Add visium-dis.c and
visium-opc.c.
* Makefile.in: Regenerate.
* disassemble.c (ARCH_visium): Define if ARCH_all.
(disassembler): Deal with bfd_arch_visium if ARCH_visium.
* visium-dis.c: New file.
* visium-opc.c: Likewise.
* po/POTFILES.in: Regenerate.
2014-12-06 16:25:55 +01:00
Christian Svensson
73589c9dbd
Remove support for the (deprecated) openrisc and or32 configurations and replace
...
with support for the new or1k configuration.
2014-04-22 15:57:47 +01:00
Alan Modra
4b95cf5c0c
Update copyright years
2014-03-05 22:16:15 +10:30
Kuan-Lin Chen
35c081572f
Add support for Andes NDS32:
...
BFD:
* Makefile.am (BFD32_BACKENDS, BFD32_BACKENDS_CFILES): Add nds32
files.
* Makefile.in: Regenerate.
* archures.c (bfd_nds32_arch): Add nds32 target.
* bfd-in2.h: Regenerate.
* config.bfd (nds32*le-*-linux): Add bfd_elf32_nds32lelin_vec
and bfd_elf32_nds32belin_vec.
(nds32*be-*-linux*): Likewise.
(nds32*le-*-*): Add bfd_elf32_nds32le_vec and bfd_elf32_nds32be_vec.
(nds32*be-*-*): Likewise.
* configure.in (bfd_elf32_nds32be_vec): Add elf32-nds32.lo.
(bfd_elf32_nds32le_vec): Likewise.
(bfd_elf32_nds32belin_vec): Likewise.
(bfd_elf32_nds32lelin_vec): Likewise.
* configure: Regenerate.
* cpu-nds32.c: New file for nds32.
* elf-bfd.h: Add NDS32_ELF_DATA.
* elf32-nds32.c: New file for nds32.
* elf32-nds32.h: New file for nds32.
* libbfd.h: Regenerate.
* reloc.c: Add relocations for nds32.
* targets.c (bfd_elf32_nds32be_vec): New declaration for nds32.
(bfd_elf32_nds32le_vec): Likewise.
(bfd_elf32_nds32belin_vec): Likewise.
(bfd_elf32_nds32lelin_vec): Likewise.
BINUTILS:
* readelf.c: Include elf/nds32.h
(guess_is_rela): Add case for EM_NDS32.
(dump_relocations): Add case for EM_NDS32.
(decode_NDS32_machine_flags): New.
(get_machine_flags): Add case for EM_NDS32.
(is_32bit_abs_reloc): Likewise.
(is_16bit_abs_reloc): Likewise.
(process_nds32_specific): New.
(process_arch_specific): Add case for EM_NDS32.
* NEWS: Announce Andes nds32 support.
* MAINTAINERS: Add nds32 maintainers.
TESTSUITE:
* binutils-all/objdump.exp: Add NDS32 cpu.
* binutils-all/readelf.r: Skip extra reloc created by NDS32.
GAS:
* Makefile.am (TARGET_CPU_CFILES): Add config/tc-nds32.c.
(TARGET_CPU_HFILES): Add config/tc-nds32.h.
* Makefile.in: Regenerate.
* configure.in (nds32): Add nds32 target extension config support.
* configure.tgt : Add case for nds32-*-elf* and nds32-*-linux*.
* configure: Regenerate.
* config/tc-nds32.c: New file for nds32.
* config/tc-nds32.h: New file for nds32.
* doc/Makefile.am (CPU_DOCS): Add c-nds32.texi.
* doc/Makefile.in: Regenerate.
* doc/as.texinfo: Add nds32 options.
* doc/all.texi: Set NDS32.
* doc/c-nds32.texi: New file dor nds32 document.
* NEWS: Announce Andes nds32 support.
TESTSUITE:
* gas/all/gas.exp: Add expected failures for NDS32.
* gas/elf/elf.exp: Likewise.
* gas/lns/lns.exp: Use alternate test.
* gas/macros/irp.d: Skip for NDS32.
* gas/macros/macros.exp: Skip some tests for the NDS32.
* gas/macros/rept.d: Skip for NDS32.
* gas/macros/test3.d: Skip for NDS32.
* gas/nds32: New directory.
* gas/nds32/alu-1.s: New test.
* gas/nds32/alu-1.d: Likewise.
* gas/nds32/alu-2.s: Likewise.
* gas/nds32/alu-2.d: Likewise.
* gas/nds32/br-1.d: Likewise.
* gas/nds32/br-1.s: Likewise.
* gas/nds32/br-2.d: Likewise.
* gas/nds32/br-2.s: Likewise.
* gas/nds32/ji-jr.d: Likewise.
* gas/nds32/ji-jr.s: Likewise.
* gas/nds32/ls.d: Likewise.
* gas/nds32/ls.s: Likewise.
* gas/nds32/lsi.d: Likewise.
* gas/nds32/lsi.s: Likewise.
* gas/nds32/to-16bit-v1.d: Likewise.
* gas/nds32/to-16bit-v1.s: Likewise.
* gas/nds32/to-16bit-v2.d: Likewise.
* gas/nds32/to-16bit-v2.s: Likewise.
* gas/nds32/to-16bit-v3.d: Likewise.
* gas/nds32/to-16bit-v3.s: Likewise.
* gas/nds32/nds32.exp: New test driver.
LD:
* Makefile.am (ALL_EMULATION_SOURCES): Add nds32 target.
* Makefile.in: Regenerate.
* configure.tgt: Add case for nds32*le-*-elf*, nds32*be-*-elf*,
nds32*le-*-linux-gnu*, and nds32*be-*-linux-gnu*.
* emulparams/nds32belf.sh: New file for nds32.
* emulparams/nds32belf_linux.sh: Likewise.
* emulparams/nds32belf16m.sh: Likewise.
* emulparams/nds32elf.sh: Likewise.
* emulparams/nds32elf_linux.sh: Likewise.
* emulparams/nds32elf16m.sh: Likewise.
* emultempl/nds32elf.em: Likewise.
* scripttempl/nds32elf.sc}: Likewise.
* gen-doc.texi: Set NDS32.
* ld.texinfo: Set NDS32.
* NEWS: Announce Andes nds32 support.
TESTSUITE:
* lib/ld-lib.exp: Add NDS32 to list of targets that do not support
shared library generation.
* ld-nds32: New directory.
* ld-nds32/branch.d: New test.
* ld-nds32/branch.ld: New test.
* ld-nds32/branch.s: New test.
* ld-nds32/diff.d: New test.
* ld-nds32/diff.ld: New test.
* ld-nds32/diff.s: New test.
* ld-nds32/gp.d: New test.
* ld-nds32/gp.ld: New test.
* ld-nds32/gp.s: New test.
* ld-nds32/imm.d: New test.
* ld-nds32/imm.ld: New test.
* ld-nds32/imm.s: New test.
* ld-nds32/imm_symbol.s: New test.
* ld-nds32/relax_jmp.d: New test.
* ld-nds32/relax_jmp.ld: New test.
* ld-nds32/relax_jmp.s: New test.
* ld-nds32/relax_load_store.d: New test.
* ld-nds32/relax_load_store.ld: New test.
* ld-nds32/relax_load_store.s: New test.
* ld-nds32/nds32.exp: New file.
OPCODES:
* Makefile.am (TARGET_LIBOPCODES_CFILES): Add nds32-asm.c
and nds32-dis.c.
* Makefile.in: Regenerate.
* configure.in: Add case for bfd_nds32_arch.
* configure: Regenerate.
* disassemble.c (ARCH_nds32): Define.
* nds32-asm.c: New file for nds32.
* nds32-asm.h: New file for nds32.
* nds32-dis.c: New file for nds32.
* nds32-opc.h: New file for nds32.
INCLUDE:
* dis-asm.h (print_insn_nds32): Add nds32 target.
* elf/nds32.h: New file for nds32.
* opcode/nds32.h: New file for nds32.
2013-12-13 11:52:32 +00:00
Sandra Loosemore
36591ba149
2013-02-06 Sandra Loosemore <sandra@codesourcery.com>
...
Andrew Jenner <andrew@codesourcery.com>
Based on patches from Altera Corporation.
bfd/
* Makefile.am (ALL_MACHINES): Add cpu-nios2.lo.
(ALL_MACHINES_CFILES): Add cpu-nios2.c.
(BFD_BACKENDS): Add elf32-nios2.lo.
(BFD32_BACKENDS_CFILES): Add elf32-nios2.c.
* Makefile.in: Regenerated.
* configure.in: Add entries for bfd_elf32_bignios2_vec and
bfd_elf32_littlenios2_vec.
* configure: Regenerated.
* config.bfd: Add cases for nios2.
* archures.c (enum bfd_architecture): Add bfd_arch_nios2.
(bfd_mach_nios2): Define.
(bfd_nios2_arch): Declare.
(bfd_archures_list): Add bfd_nios2_arch.
* targets.c (bfd_elf32_bignios2_vec): Declare.
(bfd_elf32_littlenios2_vec): Declare.
(_bfd_target_vector): Add entries for bfd_elf32_bignios2_vec and
bfd_elf32_littlenios2_vec.
* elf-bfd.h (enum elf_target_id): Add NIOS2_ELF_DATA.
* reloc.c (enum bfd_reloc_code_real): Add Nios II relocations.
* bfd-in2.h: Regenerated.
* libbfd.h: Regenerated.
* cpu-nios2.c: New file.
* elf32-nios2.c: New file.
opcodes/
* Makefile.am (TARGET_LIBOPCODES_CFILES): Add nios2-dis.c and
nios2-opc.c.
* Makefile.in: Regenerated.
* configure.in: Add case for bfd_nios2_arch.
* configure: Regenerated.
* disassemble.c (ARCH_nios2): Define.
(disassembler): Add case for bfd_arch_nios2.
* nios2-dis.c: New file.
* nios2-opc.c: New file.
include/
* dis-asm.h (print_insn_big_nios2): Declare.
(print_insn_little_nios2): Declare.
include/elf
* nios2.h: New file.
include/opcode/
* nios2.h: New file.
gas/
* Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
(TARGET_CPU_HFILES): Add config/tc-nios2.h.
* Makefile.in: Regenerated.
* configure.tgt: Add case for nios2*-linux*.
* config/obj-elf.c: Conditionally include elf/nios2.h.
* config/tc-nios2.c: New file.
* config/tc-nios2.h: New file.
* doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
* doc/Makefile.in: Regenerated.
* doc/all.texi: Set NIOSII.
* doc/as.texinfo (Overview): Add Nios II options.
(Machine Dependencies): Include c-nios2.texi.
* doc/c-nios2.texi: New file.
* NEWS: Note Altera Nios II support.
gas/testsuite/
* gas/nios2/add.d: New.
* gas/nios2/add.s: New.
* gas/nios2/align_fill.d: New.
* gas/nios2/align_fill.s: New.
* gas/nios2/align_text.d: New.
* gas/nios2/align_text.s: New.
* gas/nios2/and.d: New.
* gas/nios2/and.s: New.
* gas/nios2/branch.d: New.
* gas/nios2/branch.s: New.
* gas/nios2/break.d: New.
* gas/nios2/break.s: New.
* gas/nios2/bret.d: New.
* gas/nios2/bret.s: New.
* gas/nios2/cache.d: New.
* gas/nios2/cache.s: New.
* gas/nios2/call26.d: New.
* gas/nios2/call26.s: New.
* gas/nios2/call.d: New.
* gas/nios2/call.s: New.
* gas/nios2/cmp.d: New.
* gas/nios2/cmp.s: New.
* gas/nios2/comments.d: New.
* gas/nios2/comments.s: New.
* gas/nios2/complex.d: New.
* gas/nios2/complex.s: New.
* gas/nios2/ctl.d: New.
* gas/nios2/ctl.s: New.
* gas/nios2/custom.d: New.
* gas/nios2/custom.s: New.
* gas/nios2/etbt.d: New.
* gas/nios2/etbt.s: New.
* gas/nios2/flushda.d: New.
* gas/nios2/flushda.s: New.
* gas/nios2/illegal.l: New.
* gas/nios2/illegal.s: New.
* gas/nios2/jmp.d: New.
* gas/nios2/jmp.s: New.
* gas/nios2/ldb.d: New.
* gas/nios2/ldb.s: New.
* gas/nios2/ldh.d: New.
* gas/nios2/ldh.s: New.
* gas/nios2/ldw.d: New.
* gas/nios2/ldw.s: New.
* gas/nios2/lineseparator.d: New.
* gas/nios2/lineseparator.s: New.
* gas/nios2/mov.d: New.
* gas/nios2/movia.d: New.
* gas/nios2/movia.s: New.
* gas/nios2/movi.d: New.
* gas/nios2/movi.s: New.
* gas/nios2/mov.s: New.
* gas/nios2/mul.d: New.
* gas/nios2/mul.s: New.
* gas/nios2/nios2.exp: New.
* gas/nios2/nor.d: New.
* gas/nios2/nor.s: New.
* gas/nios2/or.d: New.
* gas/nios2/or.s: New.
* gas/nios2/ret.d: New.
* gas/nios2/ret.s: New.
* gas/nios2/rol.d: New.
* gas/nios2/rol.s: New.
* gas/nios2/rotate.d: New.
* gas/nios2/rotate.s: New.
* gas/nios2/stb.d: New.
* gas/nios2/stb.s: New.
* gas/nios2/sth.d: New.
* gas/nios2/sth.s: New.
* gas/nios2/stw.d: New.
* gas/nios2/stw.s: New.
* gas/nios2/sub.d: New.
* gas/nios2/sub.s: New.
* gas/nios2/sync.d: New.
* gas/nios2/sync.s: New.
* gas/nios2/trap.d: New.
* gas/nios2/trap.s: New.
* gas/nios2/tret.d: New.
* gas/nios2/tret.s: New.
* gas/nios2/warn_noat.l: New.
* gas/nios2/warn_noat.s: New.
* gas/nios2/warn_nobreak.l: New.
* gas/nios2/warn_nobreak.s: New.
* gas/nios2/xor.d: New.
* gas/nios2/xor.s: New.
ld/
* Makefile.am (enios2elf.c): New rule.
* Makefile.in: Regenerated.
* configure.tgt: Add case for nios2*-*-*.
* emulparams/nios2elf.sh: New file.
* NEWS: Note Altera Nios II support.
ld/testsuite/
* ld-nios2/emit-relocs-1a.s: New.
* ld-nios2/emit-relocs-1b.s: New.
* ld-nios2/emit-relocs-1.d: New.
* ld-nios2/emit-relocs-1.ld: New.
* ld-nios2/gprel.d: New.
* ld-nios2/gprel.s: New.
* ld-nios2/hilo16.d: New.
* ld-nios2/hilo16.s: New.
* ld-nios2/hilo16_symbol.s: New.
* ld-nios2/imm5.d: New.
* ld-nios2/imm5.s: New.
* ld-nios2/imm5_symbol.s: New.
* ld-nios2/nios2.exp: New.
* ld-nios2/pcrel16.d: New.
* ld-nios2/pcrel16_label.s: New.
* ld-nios2/pcrel16.s: New.
* ld-nios2/relax_callr.d: New.
* ld-nios2/relax_callr.ld: New.
* ld-nios2/relax_callr.s: New.
* ld-nios2/relax_cjmp.d: New.
* ld-nios2/relax_cjmp.s: New.
* ld-nios2/relax_jmp.ld: New.
* ld-nios2/relax_section.d: New.
* ld-nios2/relax_section.s: New.
* ld-nios2/relax_ujmp.d: New.
* ld-nios2/relax_ujmp.s: New.
* ld-nios2/reloc.d: New.
* ld-nios2/reloc.s: New.
* ld-nios2/reloc_symbol.s: New.
* ld-nios2/s16.d: New.
* ld-nios2/s16.s: New.
* ld-nios2/s16_symbol.s: New.
* ld-nios2/u16.d: New.
* ld-nios2/u16.s: New.
* ld-nios2/u16_symbol.s: New.
* ld-elf/indirect.exp: Skip on targets that don't support
-shared -fPIC.
* ld-elfcomm/elfcomm.exp: Build with -G0 for nios2.
* ld-plugin/lto.exp: Skip shared library tests on targets that
don't support them. Skip execution tests on non-native targets.
binutils/
* readelf.c: Include elf/nios2.h.
(dump_relocations): Add case for EM_ALTERA_NIOS2.
(get_nios2_dynamic_type): New.
(get_dynamic_type): Add case for EM_ALTERA_NIOS2.
(is_32bit_abs_reloc): Fix EM_ALTERA_NIOS2 case.
(is_16bit_abs_reloc): Likewise.
(is_none_reloc): Add EM_ALTERA_NIOS2 and EM_NIOS32 cases.
* NEWS: Note Altera Nios II support.
* MAINTAINERS: Add Nios II maintainers.
2013-02-06 23:22:26 +00:00
Nick Clifton
a3c629886c
* common.h: Fix case of "Meta".
...
* metag.h: New file.
* dis-asm.h (print_insn_metag): New declaration.
* metag.h: New file.
* Makefile.am: Add Meta.
* Makefile.in: Regenerate.
* configure: Regenerate.
* configure.in: Add Meta.
* disassemble.c: Add Meta support.
* metag-dis.c: New file.
* Makefile.am: Add Meta.
* Makefile.in: Regenerate.
* archures.c (bfd_mach_metag): New.
* bfd-in2.h: Regenerate.
* config.bfd: Add Meta.
* configure: Regenerate.
* configure.in: Add Meta.
* cpu-metag.c: New file.
* elf-bfd.h: Add Meta.
* elf32-metag.c: New file.
* elf32-metag.h: New file.
* libbfd.h: Regenerate.
* reloc.c: Add Meta relocations.
* targets.c: Add Meta.
* Makefile.am: Add Meta.
* Makefile.in: Regenerate.
* config/tc-metag.c: New file.
* config/tc-metag.h: New file.
* configure.tgt: Add Meta.
* doc/Makefile.am: Add Meta.
* doc/Makefile.in: Regenerate.
* doc/all.texi: Add Meta.
* doc/as.texiinfo: Document Meta options.
* doc/c-metag.texi: New file.
* gas/metag/labelarithmetic.d: New file.
* gas/metag/labelarithmetic.s: New file.
* gas/metag/metacore12.d: New file.
* gas/metag/metacore12.s: New file.
* gas/metag/metacore21-invalid.l: New file.
* gas/metag/metacore21-invalid.s: New file.
* gas/metag/metacore21.d: New file.
* gas/metag/metacore21.s: New file.
* gas/metag/metacore21ext.d: New file.
* gas/metag/metacore21ext.s: New file.
* gas/metag/metadsp21-invalid.l: New file.
* gas/metag/metadsp21-invalid.s: New file.
* gas/metag/metadsp21.d: New file.
* gas/metag/metadsp21.s: New file.
* gas/metag/metadsp21ext.d: New file.
* gas/metag/metadsp21ext.s: New file.
* gas/metag/metafpu21.d: New file.
* gas/metag/metafpu21.s: New file.
* gas/metag/metafpu21ext.d: New file.
* gas/metag/metafpu21ext.s: New file.
* gas/metag/metag.exp: New file.
* gas/metag/tls.d: New file.
* gas/metag/tls.s: New file.
* Makefile.am: Add Meta.
* Makefile.in: Regenerate.
* configure.tgt: Add Meta.
* emulparams/elf32metag.sh: New file.
* emultempl/metagelf.em: New file.
* ld-elf/merge.d: Mark Meta as xfail.
* ld-gc/start.d: Skip this test on Meta.
* ld-gc/personality.d: Skip this test on Meta.
* ld-metag/external.s: New file.
* ld-metag/metag.exp: New file.
* ld-metag/pcrel.d: New file.
* ld-metag/pcrel.s: New file.
* ld-metag/shared.d: New file.
* ld-metag/shared.r: New file.
* ld-metag/shared.s: New file.
* ld-metag/stub.d: New file.
* ld-metag/stub.s: New file.
* ld-metag/stub_pic_app.d: New file.
* ld-metag/stub_pic_app.r: New file.
* ld-metag/stub_pic_app.s: New file.
* ld-metag/stub_pic_shared.d: New file.
* ld-metag/stub_pic_shared.s: New file.
* ld-metag/stub_shared.d: New file.
* ld-metag/stub_shared.r: New file.
* ld-metag/stub_shared.s: New file.
* binutils/readelf.c: (guess_is_rela): Add EM_METAG.
(dump_relocations): Add EM_METAG.
(get_machine_name): Correct case for Meta.
(is_32bit_abs_reloc): Add support for Meta ADDR32 reloc.
(is_none_reloc): Add support for Meta NONE reloc.
2013-01-10 09:49:22 +00:00
Nick Clifton
a06ea96464
Add support for 64-bit ARM architecture: AArch64
2012-08-13 14:52:54 +00:00
Nick Clifton
d908c8af5a
PR binutils/13135
...
* arm-dis.c: Add necessary casts for printing integer values.
Use %s when printing string values.
* hppa-dis.c: Likewise.
* m68k-dis.c: Likewise.
* microblaze-dis.c: Likewise.
* mips-dis.c: Likewise.
* ppc-dis.c: Likewise.
* sparc-dis.c: Likewise.
* dis-asm.h (fprintf_ftype): Add ATTRIBUTE_FPTR_PRINTF_2.
2012-07-24 12:56:47 +00:00
Nick Clifton
6927f98292
* config/tc-m68hc11.c: Add S12X and XGATE co-processor support.
...
Add option to offset S12 addresses into XGATE memory space.
Tweak target flags to match other tools. (i.e. -m m68hc11).
* doc/as.texinfo: Mention new options.
* doc/c-m68hc11.texi: Document new options.
* NEWS: Mention new support.
* archures.c: Add bfd_arch_m9s12x and bfd_arch_m9s12xg.
* config.bfd: Likewise.
* cpu-m9s12x.c: New.
* cpu-m9s12xg.c: New.
* elf32-m68hc12.c: Add S12X and XGATE co-processor support.
Add option to offset S12 addresses into XGATE memory space.
Fix carry bug in IMM16 (IMM8 low/high) relocate.
* Makefile.am (ALL_MACHINES): Add cpu-m9s12x and cpu-m9s12xg.
(ALL_MACHINES_CFILES): Likewise.
* reloc.c: Add S12X relocs.
* Makefile.in: Regenerate.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
* gas/m68hc11/insns9s12x.s: New
* gas/m68hc11/insns9s12x.d: New
* gas/m68hc11/hexprefix.s: New
* gas/m68hc11/hexprefix.d: New
* gas/m68hc11/9s12x-exg-sex-tfr.s: New
* gas/m68hc11/9s12x-exg-sex-tfr.d: New
* gas/m68hc11/insns9s12xg.s: New
* gas/m68hc11/insns9s12xg.d: New
* gas/m68hc11/9s12x-mov.s: New
* gas/m68hc11/9s12x-mov.d: New
* gas/m68hc11/m68hc11.exp: Updated
* gas/m68hc11/*.d: Brought in line with changed objdump output.
* gas/all/gas.exp: XFAIL all hc11/12 targets for redef2,3.
* gas/elf/elf.exp: XFAIL all hc11/12 targets for redef.
* gas/elf/dwarf2-1.d: Skip for hc11/12 targets.
* gas/elf/dwarf2-2.d: Likewise.
* ld-m68hc11/xgate-link.s: New.
* ld-m68hc11/xgate-link.d: New.
* ld-m68hc11/xgate-offset.s: New.
* ld-m68hc11/xgate-offset.d: New.
* ld-m68hc11/xgate1.s: New.
* ld-m68hc11/xgate1.d: New.
* ld-m68hc11/xgate2.s: New.
* ld-m68hc11/m68hc11.exp: Updated.
* ld-m68hc11/*.d: Brought in line with changed objdump output.
* ld-gc/gc.exp: Update CFLAGS for m68hc11.
* ld-plugin/plugin.exp: Likewise.
* ld-srec/srec.exp: XFAIL for m68hc11 and m68hc12.
* configure.in: Add S12X and XGATE co-processor support to m68hc11
target.
* disassemble.c: Likewise.
* configure: Regenerate.
* m68hc11-dis.c: Make objdump output more consistent, use hex
instead of decimal and use 0x prefix for hex.
* m68hc11-opc.c: Add S12X and XGATE opcodes.
* dis-asm.h (print_insn_m9s12x): Prototype.
(print_insn_m9s12xg): Prototype.
* m68hc11.h (R_M68HC12_16B, R_M68HC12_PCREL_9, R_M68HC12_PCREL_10)
R_M68HC12_HI8XG, R_M68HC12_LO8XG): New relocations.
(E_M68HC11_XGATE_RAMOFFSET): Define.
* m68hc11.h: Add XGate definitions.
(struct m68hc11_opcode): Add xg_mask field.
2012-05-15 12:55:51 +00:00
Nick Clifton
f6c1a2d592
Add support for Motorola XGATE embedded CPU
2012-05-03 13:12:08 +00:00
Alan Modra
b240011aba
include/
...
* dis-asm.h (disassemble_init_powerpc): Declare.
opcodes/
* disassemble.c (disassemble_init_for_target): Handle ppc init.
* ppc-dis.c (private): New var.
(powerpc_init_dialect): Don't return calloc failure, instead use
private.
(PPC_OPCD_SEGS, PPC_OP_TO_SEG): Define.
(powerpc_opcd_indices): New array.
(disassemble_init_powerpc): New function.
(print_insn_big_powerpc): Don't init dialect here.
(print_insn_little_powerpc): Likewise.
(print_insn_powerpc): Start search using powerpc_opcd_indices.
2012-03-15 12:58:48 +00:00
DJ Delorie
99c513f6ac
[.]
...
* configure.ac (rl78-*-*) New case.
* configure: Regenerate.
[bfd]
* Makefile.am (ALL_MACHINES): Add cpu-rl78.lo.
(ALL_MACHINES_CFILES): Add cpu-rl78.c.
(BFD32_BACKENDS): Add elf32-rl78.lo.
(BFD32_BACKENDS_CFILES): Add elf32-rl78.c.
(Makefile.in): Regenerate.
* archures.c (bfd_architecture): Define bfd_arch_rl78.
(bfd_archures_list): Add bfd_rl78_arch.
* config.bfd: Add rl78-*-elf.
* configure.in: Add bfd_elf32_rl78_vec.
* reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations.
* targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec.
* Makefile.in: Regenerate.
* bfd-in2.h: Regenerate.
* configure: Regenerate.
* libbfd.h: Regenerate.
* cpu-rl78.c: New file.
* elf32-rl78.c: New file.
[binutils]
* readelf.c: Include elf/rl78.h
(guess_is_rela): Handle EM_RL78.
(dump_relocations): Likewise.
(get_machine_name): Likewise.
(is_32bit_abs_reloc): Likewise.
* NEWS: Mention addition of RL78 support.
* MAINTAINERS: Add myself as RL78 port maintainer.
[gas]
* Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c.
(TARGET_CPU_HFILES): Add rc-rl78.h.
(EXTRA_DIST): Add rl78-parse.c and rl78-parse.y.
(rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules.
* Makefile.in: Regenerate.
* configure.in: Add rl78 case.
* configure: Regenerate.
* configure.tgt: Add rl78 case.
* config/rl78-defs.h: New file.
* config/rl78-parse.y: New file.
* config/tc-rl78.c: New file.
* config/tc-rl78.h: New file.
* NEWS: Add Renesas RL78.
* doc/Makefile.am (c-rl78.texi): New.
* doc/Makefile.in: Likewise.
* doc/all.texi: Enable it.
* doc/as.texi: Add it.
[include]
* dis-asm.h (print_insn_rl78): Declare.
[include/elf]
* common.h (EM_RL78, EM_78K0R): New.
* rl78.h: New.
[include/opcode]
* rl78.h: New file.
[ld]
* Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c.
(+eelf32rl78.c): New rule.
* Makefile.in: Regenerate.
* configure.tgt: Add rl78-*-* case.
* emulparams/elf32rl78.sh: New file.
* NEWS: Mention addition of Renesas RL78 support.
[opcodes]
* Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and
rl78-dis.c.
(MAINTAINERCLEANFILES): Add rl78-decode.c.
(rl78-decode.c): New rule, built from rl78-decode.opc and opc2c.
* Makefile.in: Regenerate.
* configure.in: Add bfd_rl78_arch case.
* configure: Regenerate.
* disassemble.c: Define ARCH_rl78.
(disassembler): Add ARCH_rl78 case.
* rl78-decode.c: New file.
* rl78-decode.opc: New file.
* rl78-dis.c: New file.
2011-11-02 03:09:11 +00:00
Nick Clifton
cfb8c0921c
bfd:
...
* Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo .
(ALL_MACHINES_CFILES): Add cpu-epiphany.c .
(BFD32_BACKENDS): Add elf32-epiphany.lo .
(BFD32_BACKENDS_CFILES): Add elf32-epiphany.c .
* Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate.
* archures.c (bfd_arch_epiphany): Add.
(bfd_mach_epiphany16, bfd_mach_epiphany32): Define.
(bfd_epiphany_arch): Declare.
(bfd_archures_list): Add &bfd_epiphany_arch.
* config.bfd (epiphany-*-elf): New target case.
* configure.in (bfd_elf32_epiphany_vec): New target vector case.
* reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation.
(BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise.
(BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise.
(BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise.
* targets.c (bfd_elf32_epiphany_vec): Declare.
(_bfd_target_vector): Add bfd_elf32_epiphany_vec.
* po/SRC-POTFILES.in, po/bfd.pot: Regenerate.
* cpu-epiphany.c, elf32-epiphany.c: New files.
binutils:
* readelf.c (include "elf/epiphany.h")
(guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY.
(get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise.
(is_16bit_abs_reloc, is_none_reloc): Likewise.
* po/binutils.pot: Regenerate.
cpu:
* cpu/epiphany.cpu, cpu/epiphany.opc: New files.
gas:
* NEWS: Mention addition of Adapteva Epiphany support.
* config/tc-epiphany.c, config/tc-epiphany.h: New files.
* Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c .
(TARGET_CPU_HFILES): Add config/tc-epiphany.h .
* Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate.
* configure.in: Also set using_cgen for epiphany.
* configure.tgt: Handle epiphany.
* doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi .
* doc/all.texi: Set EPIPHANY.
* doc/as.texinfo: Add EPIPHANY-specific text.
* doc/c-epiphany.texi: New file.
* po/gas.pot: Regenerate.
gas/testsuite:
* gas/epiphany: New directory.
include:
* dis-asm.h (print_insn_epiphany): Declare.
* elf/epiphany.h: New file.
* elf/common.h (EM_ADAPTEVA_EPIPHANY): Define.
ld:
* NEWS: Mention addition of Adapteva Epiphany support.
* Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c .
(eelf32epiphany.c): New rule.
* Makefile.in: Regenerate.
* configure.tgt: Handle epiphany-*-elf.
* po/ld.pot: Regenerate.
* testsuite/ld-srec/srec.exp: xfail epiphany.
* emulparams/elf32epiphany.sh: New file.
opcodes:
* Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h .
(TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c,
epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c .
(CLEANFILES): Add stamp-epiphany.
(EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it.
(stamp-epiphany): New rule.
* Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate.
* configure.in: Handle bfd_epiphany_arch.
* disassemble.c (ARCH_epiphany): Define.
(disassembler): Handle bfd_arch_epiphany.
* epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files.
* epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise.
* epiphany-opc.h: Likewise.
2011-10-25 11:18:16 +00:00
Nick Clifton
aa137e4d51
* Makefile.am (ALL_MACHINES): Add cpu-tilegx.lo and cpu-tilepro.lo.
...
(ALL_MACHINE_CFILES): Add cpu-tilegx.c and cpu-tilepro.c.
(BFD32_BACKENDS): Add elf32-tilegx.lo, elf32-tilepro.lo,
and elfxx-tilegx.lo.
(BFD32_BACKENDS_CFILES): Add elf32-tilegx.c elf32-tilepro.c, and
elfxx-tilegx.c.
(BFD64_BACKENDS): Add elf64-tilegx.lo.
(BFD64_BACKENDS_CFILES): Add elf64-tilegx.c.
* Makefile.in: Regenerate.
* arctures.c (bfd_architecture): Define bfd_arch_tilepro,
bfd_arch_tilegx, bfd_mach_tilepro, bfd_mach_tilegx.
(bfd_arch_info): Add bfd_tilegx_arch, bfd_tilepro_arch.
(bfd_archures_list): Add bfd_tilegx_arch, bfd_tilepro_arch.
bfd-in2.h: Regenerate.
* config.bfd: Handle tilegx-*-* and tilepro-*-*.
* configure.in: Handle bfd_elf32_tilegx_vec, bfd_elf32_tilepro_vec,
and bfd_elf64_tilegx_vec.
* configure: Regenerate.
* elf-bfd.h (enum elf_target_id): Define TILEGX_ELF_DATA and
TILEPRO_ELF_DATA.
* libbfd.h: Regenerate.
* reloc.c: Add BFD_RELOC_TILEPRO_{COPY, GLOB_DAT, JMP_SLOT,
RELATIVE, BROFF_X1, JOFFLONG_X1, JOFFLONG_X1_PLT, IMM8_X0,
IMM8_Y0, IMM8_X1, IMM8_Y1, DEST_IMM8_X1, MT_IMM15_X1, MF_IMM15_X1,
IMM16_X0, IMM16_X1, IMM16_X0_LO, IMM16_X1_LO, IMM16_X0_HI,
IMM16_X1_HI, IMM16_X0_HA, IMM16_X1_HA, IMM16_X0_PCREL,
IMM16_X1_PCREL, IMM16_X0_LO_PCREL, IMM16_X1_LO_PCREL,
IMM16_X0_HI_PCREL, IMM16_X1_HI_PCREL, IMM16_X0_HA_PCREL,
IMM16_X1_HA_PCREL, IMM16_X0_GOT, IMM16_X1_GOT, IMM16_X0_GOT_LO,
IMM16_X1_GOT_LO, IMM16_X0_GOT_HI, IMM16_X1_GOT_HI,
IMM16_X0_GOT_HA, IMM16_X1_GOT_HA, MMSTART_X0, MMEND_X0,
MMSTART_X1, MMEND_X1, SHAMT_X0, SHAMT_X1, SHAMT_Y0, SHAMT_Y1,
IMM16_X0_TLS_GD, IMM16_X1_TLS_GD, IMM16_X0_TLS_GD_LO,
IMM16_X1_TLS_GD_LO, IMM16_X0_TLS_GD_HI, IMM16_X1_TLS_GD_HI,
IMM16_X0_TLS_GD_HA, IMM16_X1_TLS_GD_HA, IMM16_X0_TLS_IE,
IMM16_X1_TLS_IE, IMM16_X0_TLS_IE_LO, IMM16_X1_TLS_IE_LO,
IMM16_X0_TLS_IE_HI, IMM16_X1_TLS_IE_HI, IMM16_X0_TLS_IE_HA,
IMM16_X1_TLS_IE_HA, TLS_DTPMOD32, TLS_DTPOFF32, TLS_TPOFF32}
Add BFD_RELOC_TILEGX_{HW0, HW1, HW2, HW3, HW0_LAST, HW1_LAST,
HW2_LAST, COPY, GLOB_DAT, JMP_SLOT, RELATIVE, BROFF_X1,
JUMPOFF_X1, JUMPOFF_X1_PLT, IMM8_X0, IMM8_Y0, IMM8_X1, IMM8_Y1,
DEST_IMM8_X1, MT_IMM14_X1, MF_IMM14_X1, MMSTART_X0, MMEND_X0,
SHAMT_X0, SHAMT_X1, SHAMT_Y0, SHAMT_Y1, IMM16_X0_HW0,
IMM16_X1_HW0, IMM16_X0_HW1, IMM16_X1_HW1, IMM16_X0_HW2,
IMM16_X1_HW2, IMM16_X0_HW3, IMM16_X1_HW3, IMM16_X0_HW0_LAST,
IMM16_X1_HW0_LAST, IMM16_X0_HW1_LAST, IMM16_X1_HW1_LAST,
IMM16_X0_HW2_LAST, IMM16_X1_HW2_LAST, IMM16_X0_HW0_PCREL,
IMM16_X1_HW0_PCREL, IMM16_X0_HW1_PCREL, IMM16_X1_HW1_PCREL,
IMM16_X0_HW2_PCREL, IMM16_X1_HW2_PCREL, IMM16_X0_HW3_PCREL,
IMM16_X1_HW3_PCREL, IMM16_X0_HW0_LAST_PCREL,
IMM16_X1_HW0_LAST_PCREL, IMM16_X0_HW1_LAST_PCREL,
IMM16_X1_HW1_LAST_PCREL, IMM16_X0_HW2_LAST_PCREL,
IMM16_X1_HW2_LAST_PCREL, IMM16_X0_HW0_GOT, IMM16_X1_HW0_GOT,
IMM16_X0_HW1_GOT, IMM16_X1_HW1_GOT, IMM16_X0_HW2_GOT,
IMM16_X1_HW2_GOT, IMM16_X0_HW3_GOT, IMM16_X1_HW3_GOT,
IMM16_X0_HW0_LAST_GOT, IMM16_X1_HW0_LAST_GOT,
IMM16_X0_HW1_LAST_GOT, IMM16_X1_HW1_LAST_GOT,
IMM16_X0_HW2_LAST_GOT, IMM16_X1_HW2_LAST_GOT, IMM16_X0_HW0_TLS_GD,
IMM16_X1_HW0_TLS_GD, IMM16_X0_HW1_TLS_GD, IMM16_X1_HW1_TLS_GD,
IMM16_X0_HW2_TLS_GD, IMM16_X1_HW2_TLS_GD, IMM16_X0_HW3_TLS_GD,
IMM16_X1_HW3_TLS_GD, IMM16_X0_HW0_LAST_TLS_GD,
IMM16_X1_HW0_LAST_TLS_GD, IMM16_X0_HW1_LAST_TLS_GD,
IMM16_X1_HW1_LAST_TLS_GD, IMM16_X0_HW2_LAST_TLS_GD,
IMM16_X1_HW2_LAST_TLS_GD, IMM16_X0_HW0_TLS_IE,
IMM16_X1_HW0_TLS_IE, IMM16_X0_HW1_TLS_IE, IMM16_X1_HW1_TLS_IE,
IMM16_X0_HW2_TLS_IE, IMM16_X1_HW2_TLS_IE, IMM16_X0_HW3_TLS_IE,
IMM16_X1_HW3_TLS_IE, IMM16_X0_HW0_LAST_TLS_IE,
IMM16_X1_HW0_LAST_TLS_IE, IMM16_X0_HW1_LAST_TLS_IE,
IMM16_X1_HW1_LAST_TLS_IE, IMM16_X0_HW2_LAST_TLS_IE,
IMM16_X1_HW2_LAST_TLS_IE, TLS_DTPMOD64, TLS_DTPOFF64, TLS_TPOFF64,
TLS_DTPMOD32, TLS_DTPOFF32, TLS_TPOFF32}
* targets.c (bfd_elf32_tilegx_vec): Declare.
(bfd_elf32_tilepro_vec): Declare.
(bfd_elf64_tilegx_vec): Declare.
(bfd_target_vector): Add bfd_elf32_tilegx_vec, bfd_elf32_tilepro_vec,
and bfd_elf64_tilegx_vec.
* cpu-tilegx.c: New file.
* cpu-tilepro.c: New file.
* elf32-tilepro.h: New file.
* elf32-tilepro.c: New file.
* elf32-tilegx.c: New file.
* elf32-tilegx.h: New file.
* elf64-tilegx.c: New file.
* elf64-tilegx.h: New file.
* elfxx-tilegx.c: New file.
* elfxx-tilegx.h: New file.
* Makefile.am (TARGET_CPU_CFILES): Add config/tc-tilegx.c and
config/tc-tilepro.c.
(TARGET_CPU_HFILES): Add config/tc-tilegx.h and
config/tc-tilepro.h.
* Makefile.in: Regenerate.
* configure.tgt (tilepro-*-*): New.
(tilegx-*-*): Likewise.
* config/tc-tilegx.c: New file.
* config/tc-tilegx.h: Likewise.
* config/tc-tilepro.h: Likewise.
* config/tc-tilepro.c: Likewise.
* doc/Makefile.am (CPU_DOCS): Add c-tilegx.texi and
c-tilepro.texi.
* doc/Makefile.in: Regenerate.
* doc/all.texi (TILEGX): Define.
(TILEPRO): Define.
* doc/as.texinfo: Add Tile-Gx and TILEPro documentation. Include
c-tilegx.texi and c-tilepro.texi.
* doc/c-tilegx.texi: New.
* doc/c-tilepro.texi: New.
* gas/tilepro/t_constants.s: New file.
* gas/tilepro/t_constants.d: Likewise.
* gas/tilepro/t_insns.s: Likewise.
* gas/tilepro/tilepro.exp: Likewise.
* gas/tilepro/t_insns.d: Likewise.
* gas/tilegx/tilegx.exp: Likewise.
* gas/tilegx/t_insns.d: Likewise.
* gas/tilegx/t_insns.s: Likewise.
* dis-asm.h (print_insn_tilegx): Declare.
(print_insn_tilepro): Likewise.
* tilegx.h: New file.
* tilepro.h: New file.
* common.h: Add EM_TILEGX.
* tilegx.h: New file.
* tilepro.h: New file.
* Makefile.am (ALL_EMULATION_SOURCES): Add eelf32tilegx.c and
eelf32tilepro.c.
(ALL_64_EMULATION_SOURCES): Add eelf64tilegx.c.
(eelf32tilegx.c): New target.
(eelf32tilepro.c): Likewise.
(eelf64tilegx.c): Likewise.
* Makefile.in: Regenerate.
* configure.tgt: Handle tilegx-*-* and tilepro-*-*.
* emulparams/elf32tilegx.sh: New file.
* emulparams/elf64tilegx.sh: New file.
* emulparams/elf32tilepro.sh: New file.
* ld-elf/eh5.d: Don't run on tile*.
* ld-srec/srec.exp: xfail on tile*.
* ld-tilegx/external.s: New file.
* ld-tilegx/reloc.d: New file.
* ld-tilegx/reloc.s: New file.
* ld-tilegx/tilegx.exp: New file.
* ld-tilepro/external.s: New file.
* ld-tilepro/reloc.d: New file.
* ld-tilepro/reloc.s: New file.
* ld-tilepro/tilepro.exp: New file.
* Makefile.am (TARGET_LIBOPCODES_CFILES): Add tilegx-dis.c,
tilegx-opc.c, tilepro-dis.c, and tilepro-opc.c.
* Makefile.in: Regenerate.
* configure.in: Handle bfd_tilegx_arch and bfd_tilepro_arch.
* configure: Regenerate.
* disassemble.c (disassembler): Add ARCH_tilegx and ARCH_tilepro.
* po/POTFILES.in: Regenerate.
* tilegx-dis.c: New file.
* tilegx-opc.c: New file.
* tilepro-dis.c: New file.
* tilepro-opc.c: New file.
2011-06-13 15:18:54 +00:00
Alan Modra
360cfc9c8b
remove maxq-coff port
2010-06-29 04:17:34 +00:00
Nick Clifton
e4e42b45d5
Upgrade header files to use GPLv3
2010-04-15 10:26:09 +00:00
Joseph Myers
40b365969f
bfd:
...
* Makefile.am (ALL_MACHINES): Add cpu-tic6x.lo.
(ALL_MACHINES_CFILES): Add cpu-tic6x.c.
(BFD32_BACKENDS): Add elf32-tic6x.lo.
(BFD32_BACKENDS_CFILES): Add elf32-tic6x.c.
* Makefile.in: Regenerate.
* archures.c (bfd_arch_tic6x, bfd_tic6x_arch): New.
(bfd_archures_list): Update.
* config.bfd (tic6x-*-elf): New.
* configure.in (bfd_elf32_tic6x_be_vec, bfd_elf32_tic6x_le_vec):
New.
* configure: Regenerate.
* cpu-tic6x.c, elf32-tic6x.c: New.
* reloc.c (BFD_RELOC_C6000_PCR_S21, BFD_RELOC_C6000_PCR_S12,
BFD_RELOC_C6000_PCR_S10, BFD_RELOC_C6000_PCR_S7,
BFD_RELOC_C6000_ABS_S16, BFD_RELOC_C6000_ABS_L16,
BFD_RELOC_C6000_ABS_H16, BFD_RELOC_C6000_SBR_U15_B,
BFD_RELOC_C6000_SBR_U15_H, BFD_RELOC_C6000_SBR_U15_W,
BFD_RELOC_C6000_SBR_S16, BFD_RELOC_C6000_SBR_L16_B,
BFD_RELOC_C6000_SBR_L16_H, BFD_RELOC_C6000_SBR_L16_W,
BFD_RELOC_C6000_SBR_H16_B, BFD_RELOC_C6000_SBR_H16_H,
BFD_RELOC_C6000_SBR_H16_W, BFD_RELOC_C6000_SBR_GOT_U15_W,
BFD_RELOC_C6000_SBR_GOT_L16_W, BFD_RELOC_C6000_SBR_GOT_H16_W,
BFD_RELOC_C6000_DSBT_INDEX, BFD_RELOC_C6000_PREL31,
BFD_RELOC_C6000_COPY, BFD_RELOC_C6000_ALIGN,
BFD_RELOC_C6000_FPHEAD, BFD_RELOC_C6000_NOCMP): New.
* targets.c (bfd_elf32_tic6x_be_vec, bfd_elf32_tic6x_le_vec): New.
(_bfd_target_vector): Update.
* bfd-in2.h, libbfd.h: Regenerate.
binutils:
* MAINTAINERS: Add self as TI C6X maintainer.
* NEWS: Add news entry for TI C6X support.
* readelf.c: Include elf/tic6x.h.
(guess_is_rela): Handle EM_TI_C6000.
(dump_relocations): Likewise.
(get_tic6x_dynamic_type): New.
(get_dynamic_type): Call it.
(get_machine_flags): Handle EF_C6000_REL.
(get_osabi_name): Handle machine-specific values only for relevant
machines. Handle C6X values.
(get_tic6x_segment_type): New.
(get_segment_type): Call it.
(get_tic6x_section_type_name): New.
(get_section_type_name): Call it.
(is_32bit_abs_reloc, is_16bit_abs_reloc, is_none_reloc): Handle
EM_TI_C6000.
gas:
* Makefile.am (TARGET_CPU_CFILES): Add config/tc-tic6x.c.
(TARGET_CPU_HFILES): Add config/tc-tic6x.h.
* Makefile.in: Regenerate.
* NEWS: Add news entry for TI C6X support.
* app.c (do_scrub_chars): Handle "||^" for TI C6X. Handle
TC_PREDICATE_START_CHAR and TC_PREDICATE_END_CHAR. Keep spaces in
operands if TC_KEEP_OPERAND_SPACES.
* configure.tgt (tic6x-*-*): New.
* config/tc-ia64.h (TC_PREDICATE_START_CHAR,
TC_PREDICATE_END_CHAR): Define.
* config/tc-tic6x.c, config/tc-tic6x.h: New.
* doc/Makefile.am (CPU_DOCS): Add c-tic6x.texi.
* doc/Makefile.in: Regenerate.
* doc/all.texi (TIC6X): Define.
* doc/as.texinfo: Add TI C6X documentation. Include c-tic6x.texi.
* doc/c-tic6x.texi: New.
gas/testsuite:
* gas/tic6x: New directory and testcases.
include:
* dis-asm.h (print_insn_tic6x): Declare.
include/elf:
* common.h (ELFOSABI_C6000_ELFABI, ELFOSABI_C6000_LINUX): Define.
* tic6x.h: New.
include/opcode:
* tic6x-control-registers.h, tic6x-insn-formats.h,
tic6x-opcode-table.h, tic6x.h: New.
ld:
* Makefile.am (ALL_EMULATIONS): Add eelf32_tic6x_be.o and
eelf32_tic6x_le.o.
(eelf32_tic6x_be.c, eelf32_tic6x_le.c): New.
* NEWS: Add news entry for TI C6X support.
* configure.tgt (tic6x-*-*): New.
* emulparams/elf32_tic6x_be.sh, emulparams/elf32_tic6x_le.sh: New.
ld/testsuite:
* ld-elf/flags1.d, ld-elf/merge.d: XFAIL for tic6x-*-*.
* ld-elf/sec-to-seg.exp: Set B_test_same_seg to 0 for tic6x-*-*.
* ld-tic6x: New directory and testcases.
opcodes:
* Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c.
* Makefile.in: Regenerate.
* configure.in (bfd_tic6x_arch): New.
* configure: Regenerate.
* disassemble.c (ARCH_tic6x): Define if ARCH_all.
(disassembler): Handle TI C6X.
* tic6x-dis.c: New.
2010-03-25 21:12:36 +00:00
Doug Kwan
e7f8eadb78
2009-12-14 Doug Kwan <dougkwan@google.com>
...
bfd/ChangeLog:
* opncls.c (bfd_opnr_iovec): Rename parameters to avoid shawdowed
variable warnings.
* bfd-in2.h: Regnenerate.
include/ChangeLog:
* bfdlink.h (struct bfd_link_callbacks): Rename function parameters
to avoid shadowed variable warnings.
* dis-asm.h (struct disassemble_info): Ditto.
(disassemble_init_for_target): Ditto.
(init_disassemble_info): Ditto.
2009-12-15 02:02:39 +00:00
Nick Clifton
c7927a3c0e
bfd
...
* Makefile.am (ALL_MACHINES): Add cpu-rx.lo.
(ALL_MACHINES_CFILES): Add cpu-rx.c.
(BFD32_BACKENDS): Add elf32-rx.lo.
(BFD32_BACKENDS_CFILES): Add elf32-rx.c.
* archures.c (bfd_architecture): Add bfd_arch_rx and bfd_mach_rx.
Export bfd_rx_arch.
(bfd_archures_list): Add bfd_rx_arch.
* config.bfd: Add entry for rx-*-elf.
* configure.in: Add entries for bfd_elf32_rx_le_vec and
bfd_elf32_rx_be_vec.
* reloc.c: Add RX relocations.
* targets.c: Add RX target vectors.
* Makefile.in: Regenerate.
* bfd-in2.h: Regenerate.
* configure: Regenerate.
* libbfd.h: Regenerate.
* cpu-rx.c: New file.
* elf32-rx.c: New file.
binutils
* readelf.c: Add support for RX target.
* MAINTAINERS: Add DJ and NickC as maintainers for RX.
gas
* Makefile.am: Add RX target.
* configure.in: Likewise.
* configure.tgt: Likewise.
* read.c (do_repeat_with_expander): New function.
* read.h: Provide a prototype for do_repeat_with_expander.
* doc/Makefile.am: Add RX target documentation.
* doc/all.texi: Likewise.
* doc/as.texinfo: Likewise.
* Makefile.in: Regenerate.
* NEWS: Mention support for RX architecture.
* configure: Regenerate.
* doc/Makefile.in: Regenerate.
* config/rx-defs.h: New file.
* config/rx-parse.y: New file.
* config/tc-rx.h: New file.
* config/tc-rx.c: New file.
* doc/c-rx.texi: New file.
gas/testsuite
* gas/rx: New directory.
* gas/rx/*: New set of test cases.
* gas/elf/section2.e-rx: New expected output file.
* gas/all/gas.exp: Add support for RX target.
* gas/elf/elf.exp: Likewise.
* gas/lns/lns.exp: Likewise.
* gas/macros/macros.exp: Likewise.
include
* dis-asm.h: Add prototype for print_insn_rx.
include/elf
* rx.h: New file.
include/opcode
* rx.h: New file.
ld
* Makefile.am: Add rules to build RX emulation.
* configure.tgt: Likewise.
* NEWS: Mention support for RX architecture.
* Makefile.in: Regenerate.
* emulparams/elf32rx.sh: New file.
* emultempl/rxelf.em: New file.
opcodes
* Makefile.am: Add RX files.
* configure.in: Add support for RX target.
* disassemble.c: Likewise.
* Makefile.in: Regenerate.
* configure: Regenerate.
* opc2c.c: New file.
* rx-decode.c: New file.
* rx-decode.opc: New file.
* rx-dis.c: New file.
2009-09-29 14:17:19 +00:00
Nick Clifton
7ba29e2a41
Add support for Xilinx MicroBlaze processor.
...
* bfd/Makefile.am: Add cpu-microblaze.{lo,c}, elf32-microblaze.{lo,c}.
* bfd/Makefile.in: Same.
* bfd/archures.c: Add bfd_arch_microblaze.
* bfd/bfd-in2.h: Regenerate.
* bfd/config.bfd: Add microblaze target.
* bfd/configure: Add bfd_elf32_microblaze_vec target.
* bfd/configure.in: Same.
* bfd/cpu-microblaze.c: New.
* bfd/elf32-microblaze.c: New.
* bfd/libbfd-in.h: Add prototype _bfd_dwarf2_fixup_section_debug_loc().
* bfd/libbfd.h: Regenerate.
* bfd/reloc.c: Add MICROBLAZE relocations.
* bfd/section.c: Add struct relax_table and relax_count to section.
* bfd/targets.c: Add bfd_elf32_microblaze_vec.
* binutils/MAINTAINERS: Add self as maintainer.
* binutils/readelf.c: Include elf/microblaze.h, add EM_MICROBLAZE &
EM_MICROBLAZE_OLD to guess_is_rela(), dump_relocations(),
get_machine_name().
* config.sub: Add microblaze target.
* configure: Same.
* configure.ac: Same.
* gas/Makefile.am: add microblaze to CPU_TYPES, config/tc-microblaze.c to
TARGET_CPU_CFILES, config/tc-microblaze.h to TARGET_CPU_HFILES, add
DEP_microblaze_elf target.
* gas/Makefile.in: Same.
* gas/config/tc-microblaze.c: Add MicroBlaze assembler.
* gas/config/tc-microblaze.h: Add header for tc-microblaze.c.
* gas/configure: Add microblaze target.
* gas/configure.in: Same.
* gas/configure.tgt: Same.
* gas/doc/Makefile.am: Add c-microblaze.texi to CPU_DOCS.
* gas/doc/Makefile.in: Same.
* gas/doc/all.texi: Set MICROBLAZE.
* gas/doc/as.texinfo: Add MicroBlaze doc links.
* gas/doc/c-microblaze.texi: New MicroBlaze docs.
* include/dis-asm.h: Decl print_insn_microblaze().
* include/elf/common.h: Define EM_MICROBLAZE & EM_MICROBLAZE_OLD.
* include/elf/microblaze.h: New reloc definitions.
* ld/Makefile.am: Add eelf32mb_linux.o, eelf32microblaze.o to
ALL_EMULATIONS, targets.
* ld/Makefile.in: Same.
* ld/configure.tgt: Add microblaze*-linux*, microblaze* targets.
* ld/emulparams/elf32mb_linux.sh: New.
* ld/emulparams/elf32microblaze.sh. New.
* ld/scripttempl/elfmicroblaze.sc: New.
* opcodes/Makefile.am: Add microblaze-opc.h to HFILES, microblaze-dis.c to
CFILES, microblaze-dis.lo to ALL_MACHINES, targets.
* opcodes/Makefile.in: Same.
* opcodes/configure: Add bfd_microblaze_arch target.
* opcodes/configure.in: Same.
* opcodes/disassemble.c: Define ARCH_microblaze, return
print_insn_microblaze().
* opcodes/microblaze-dis.c: New MicroBlaze disassembler.
* opcodes/microblaze-opc.h: New MicroBlaze opcode definitions.
* opcodes/microblaze-opcm.h: New MicroBlaze opcode types.
2009-08-06 17:38:04 +00:00
Nick Clifton
0313a2b8d2
PR 10288
...
* arm-dis.c (print_insn_coprocessor): Check that a user specified
ARM architecture supports the matched instruction.
(print_insn_arm): Likewise.
(select_arm_features): New function. Fills in the fields of an
arm_feature_set structure based on a given arm machine number.
(print_insn): Initialise an arm_feature_set structure.
* objdump.c (disassemble_bytes): Set the
USER_SPECIFIED_MACHINE_TYPE flag in the disassemble_info structure
if the user has invoked the -m switch.
* doc/binutils.texi: Document the additional behaviour of
objdump's -m switch for ARM targets.
* dis-asm.h (USER_SPECIFIED_MACHINE_TYPE): New value for the flags
field of struct disassemble_info.
* gas/arm/align.s: Add labels so that COFF based targets can
correctly locate THUMB code.
* gas/arm/copro.d: Do not pass --architecture switch to objdump.
2009-06-18 10:31:21 +00:00
Nick Clifton
1316c8b37f
PR 10263
...
* arm-dis.c (print_insn): Ignore is_data if the user has requested
the disassembly of data as well as instructions.
* objdump.c (disassemble_bytes): Set the DISASSEMBLE_DATA bit in
the flags field of the disassemble_info structure if the -D switch
is in operation.
* dis-asm.h (struct disassemble_info): New value for the flags
field.
2009-06-15 11:37:26 +00:00
Nick Clifton
20135e4cea
Add new binutils target: moxie
2009-04-16 15:39:48 +00:00
Nick Clifton
84e94c9023
Add LM32 port.
2008-12-23 19:10:25 +00:00
Stan Shebs
6a4fe770bc
2008-07-07 Stan Shebs <stan@codesourcery.com>
...
* dis-asm.h (struct disassemble_info): Add endian_code field.
2008-07-07 18:40:13 +00:00
Andreas Krebbel
112b7c5071
2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com>
...
* s390-dis.c (init_disasm): Evaluate disassembler_options.
(print_s390_disassembler_options): New function.
* disassemble.c (disassembler_usage): Invoke
print_s390_disassembler_options.
2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com>
* dis-asm.h (print_s390_disassembler_options):
Prototype added.
2008-04-10 13:36:43 +00:00
Nick Clifton
3d3d428f04
New port: National Semiconductor's CR16
2007-06-29 14:09:34 +00:00
Dave Brolley
d6eafc3ec4
2007-02-05 Dave Brolley <brolley@redhat.com>
...
* Contribute the following changes:
2001-03-26 Ben Elliston <bje@redhat.com>
* dis-asm.h (print_insn_mep): Declare.
2007-02-05 19:17:10 +00:00
H.J. Lu
f59a29b99f
binutils/
...
2076-02-02 H.J. Lu <hongjiu.lu@intel.com>
* doc/binutils.texi (objdump): Document the new addr64 option
for i386 disassembler.
include/
2076-02-02 H.J. Lu <hongjiu.lu@intel.com>
* dis-asm.h (print_i386_disassembler_options): New.
opcodes/
2076-02-02 H.J. Lu <hongjiu.lu@intel.com>
* disassemble.c (disassembler_usage): Call
print_i386_disassembler_options for i386 disassembler.
* i386-dis.c (print_i386_disassembler_options): New.
(print_insn): Support the new addr64 option.
2007-02-02 15:27:04 +00:00
Paul Brook
2087ad8497
2006-10-30 Paul Brook <paul@codesourcery.com>
...
binutils/
* objdump.c (disassemble_section): Set info->symtab_pos.
(disassemble_data): Set info->symtab and info->symtab_size.
include/
* dis-asm.h (disassemble_info): Add symtab, symtab_pos and
symtab_size.
opcodes/
* arm-dis.c (last_is_thumb, last_mapping_sym, last_mapping_addr): New.
(get_sym_code_type): New function.
(print_insn): Search for mapping symbols.
2006-10-31 20:21:57 +00:00
Alan Modra
e9f5312993
New Cell SPU port.
2006-10-25 06:49:21 +00:00
